1 Specifying GPIO information for devices
2 ============================================
7 Nodes that makes use of GPIOs should specify them using one or more
8 properties, each containing a 'gpio-list':
10 gpio-list ::= <single-gpio> [gpio-list]
11 single-gpio ::= <gpio-phandle> <gpio-specifier>
12 gpio-phandle : phandle to gpio controller node
13 gpio-specifier : Array of #gpio-cells specifying specific gpio
16 GPIO properties should be named "[<name>-]gpios". Exact
17 meaning of each gpios property must be documented in the device tree
18 binding for each device.
20 For example, the following could be used to describe gpios pins to use
21 as chip select lines; with chip selects 0, 1 and 3 populated, and chip
33 chipsel-gpios = <&gpio1 12 0>,
35 <0>, /* holes are permitted, means no GPIO 2 */
38 Note that gpio-specifier length is controller dependent. In the
39 above example, &gpio1 uses 2 cells to specify a gpio, while &gpio2
42 gpio-specifier may encode: bank, pin position inside the bank,
43 whether pin is open-drain and whether pin is logically inverted.
44 Exact meaning of each specifier cell is controller specific, and must
45 be documented in the device tree binding for the device.
47 Example of the node using GPIOs:
50 gpios = <&qe_pio_e 18 0>;
53 In this example gpio-specifier is "18 0" and encodes GPIO pin number,
54 and empty GPIO flags as accepted by the "qe_pio_e" gpio-controller.
56 2) gpio-controller nodes
57 ------------------------
59 Every GPIO controller node must both an empty "gpio-controller"
60 property, and have #gpio-cells contain the size of the gpio-specifier.
62 Example of two SOC GPIO banks defined as gpio-controller nodes:
64 qe_pio_a: gpio-controller@1400 {
66 compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
71 qe_pio_e: gpio-controller@1460 {
73 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";