5 - reg : Offset and length of the register set for the device
6 - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
7 compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
8 mpc5200 or mpc5200b. For the mpc5121, an additional node
9 "fsl,mpc5121-i2c-ctrl" is required as shown in the example below.
11 Recommended properties :
13 - interrupts : <a b> where a is the interrupt number and b is a
14 field that represents an encoding of the sense and level
15 information for the interrupt. This should be encoded based on
16 the information in section 2) depending on the type of interrupt
18 - interrupt-parent : the phandle for the interrupt controller that
19 services interrupts for this device.
20 - fsl,preserve-clocking : boolean; if defined, the clock settings
21 from the bootloader are preserved (not touched).
22 - clock-frequency : desired I2C bus clock frequency in Hz.
23 - fsl,timeout : I2C bus timeout in microseconds.
27 /* MPC5121 based board */
31 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
33 interrupts = <11 0x8>;
34 interrupt-parent = <&ipic>;
35 clock-frequency = <100000>;
39 compatible = "fsl,mpc5121-i2c-ctrl";
43 /* MPC5200B based board */
47 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
49 interrupts = <2 15 0>;
50 interrupt-parent = <&mpc5200_pic>;
51 fsl,preserve-clocking;
54 /* MPC8544 base board */
58 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
61 interrupt-parent = <&mpic>;
62 clock-frequency = <400000>;
63 fsl,timeout = <10000>;