drivers/tty/serial/etraxfs-uart.c

   1 #include <linux/module.h>
   2 #include <linux/init.h>
   3 #include <linux/console.h>
   4 #include <linux/platform_device.h>
   5 #include <linux/serial_core.h>
   6 #include <linux/tty_flip.h>
   7 #include <linux/of.h>
   8 #include <linux/gpio.h>
   9 #include <linux/of_irq.h>
  10 #include <linux/of_address.h>
  11 #include <hwregs/ser_defs.h>
  12
  13 #define DRV_NAME "etraxfs-uart"
  14 #define UART_NR CONFIG_ETRAX_SERIAL_PORTS
  15
  16 #define MODIFY_REG(instance, reg, var)                          \
  17         do {                                                    \
  18                 if (REG_RD_INT(ser, instance, reg) !=           \
  19                     REG_TYPE_CONV(int, reg_ser_##reg, var))     \
  20                         REG_WR(ser, instance, reg, var);        \
  21         } while (0)
  22
  23 struct uart_cris_port {
  24         struct uart_port port;
  25
  26         int initialized;
  27         int irq;
  28
  29         void __iomem *regi_ser;
  30
  31         struct gpio_desc *dtr_pin;
  32         struct gpio_desc *dsr_pin;
  33         struct gpio_desc *ri_pin;
  34         struct gpio_desc *cd_pin;
  35
  36         int write_ongoing;
  37 };
  38
  39 static struct uart_driver etraxfs_uart_driver;
  40 static struct uart_port *console_port;
  41 static int console_baud = 115200;
  42 static struct uart_cris_port *etraxfs_uart_ports[UART_NR];
  43
  44 static void cris_serial_port_init(struct uart_port *port, int line);
  45 static void etraxfs_uart_stop_rx(struct uart_port *port);
  46 static inline void etraxfs_uart_start_tx_bottom(struct uart_port *port);
  47
  48 #ifdef CONFIG_SERIAL_ETRAXFS_CONSOLE
  49 static void
  50 cris_console_write(struct console *co, const char *s, unsigned int count)
  51 {
  52         struct uart_cris_port *up;
  53         int i;
  54         reg_ser_r_stat_din stat;
  55         reg_ser_rw_tr_dma_en tr_dma_en, old;
  56
  57         up = etraxfs_uart_ports[co->index];
  58
  59         if (!up)
  60                 return;
  61
  62         /* Switch to manual mode. */
  63         tr_dma_en = old = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
  64         if (tr_dma_en.en == regk_ser_yes) {
  65                 tr_dma_en.en = regk_ser_no;
  66                 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
  67         }
  68
  69         /* Send data. */
  70         for (i = 0; i < count; i++) {
  71                 /* LF -> CRLF */
  72                 if (s[i] == '\n') {
  73                         do {
  74                                 stat = REG_RD(ser, up->regi_ser, r_stat_din);
  75                         } while (!stat.tr_rdy);
  76                         REG_WR_INT(ser, up->regi_ser, rw_dout, '\r');
  77                 }
  78                 /* Wait until transmitter is ready and send. */
  79                 do {
  80                         stat = REG_RD(ser, up->regi_ser, r_stat_din);
  81                 } while (!stat.tr_rdy);
  82                 REG_WR_INT(ser, up->regi_ser, rw_dout, s[i]);
  83         }
  84
  85         /* Restore mode. */
  86         if (tr_dma_en.en != old.en)
  87                 REG_WR(ser, up->regi_ser, rw_tr_dma_en, old);
  88 }
  89
  90 static int __init
  91 cris_console_setup(struct console *co, char *options)
  92 {
  93         struct uart_port *port;
  94         int baud = 115200;
  95         int bits = 8;
  96         int parity = 'n';
  97         int flow = 'n';
  98
  99         if (co->index < 0 || co->index >= UART_NR)
 100                 co->index = 0;
 101         port = &etraxfs_uart_ports[co->index]->port;
 102         console_port = port;
 103
 104         co->flags |= CON_CONSDEV;
 105
 106         if (options)
 107                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 108         console_baud = baud;
 109         cris_serial_port_init(port, co->index);
 110         uart_set_options(port, co, baud, parity, bits, flow);
 111
 112         return 0;
 113 }
 114
 115 static struct tty_driver *cris_console_device(struct console *co, int *index)
 116 {
 117         struct uart_driver *p = co->data;
 118         *index = co->index;
 119         return p->tty_driver;
 120 }
 121
 122 static struct console cris_console = {
 123         .name = "ttyS",
 124         .write = cris_console_write,
 125         .device = cris_console_device,
 126         .setup = cris_console_setup,
 127         .flags = CON_PRINTBUFFER,
 128         .index = -1,
 129         .data = &etraxfs_uart_driver,
 130 };
 131 #endif /* CONFIG_SERIAL_ETRAXFS_CONSOLE */
 132
 133 static struct uart_driver etraxfs_uart_driver = {
 134         .owner = THIS_MODULE,
 135         .driver_name = "serial",
 136         .dev_name = "ttyS",
 137         .major = TTY_MAJOR,
 138         .minor = 64,
 139         .nr = UART_NR,
 140 #ifdef CONFIG_SERIAL_ETRAXFS_CONSOLE
 141         .cons = &cris_console,
 142 #endif /* CONFIG_SERIAL_ETRAXFS_CONSOLE */
 143 };
 144
 145 static inline int crisv32_serial_get_rts(struct uart_cris_port *up)
 146 {
 147         void __iomem *regi_ser = up->regi_ser;
 148         /*
 149          * Return what the user has controlled rts to or
 150          * what the pin is? (if auto_rts is used it differs during tx)
 151          */
 152         reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
 153
 154         return !(rstat.rts_n == regk_ser_active);
 155 }
 156
 157 /*
 158  * A set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
 159  *                                            0=0V    , 1=3.3V
 160  */
 161 static inline void crisv32_serial_set_rts(struct uart_cris_port *up,
 162                                           int set, int force)
 163 {
 164         void __iomem *regi_ser = up->regi_ser;
 165
 166         unsigned long flags;
 167         reg_ser_rw_rec_ctrl rec_ctrl;
 168
 169         local_irq_save(flags);
 170         rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
 171
 172         if (set)
 173                 rec_ctrl.rts_n = regk_ser_active;
 174         else
 175                 rec_ctrl.rts_n = regk_ser_inactive;
 176         REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
 177         local_irq_restore(flags);
 178 }
 179
 180 static inline int crisv32_serial_get_cts(struct uart_cris_port *up)
 181 {
 182         void __iomem *regi_ser = up->regi_ser;
 183         reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
 184
 185         return (rstat.cts_n == regk_ser_active);
 186 }
 187
 188 /*
 189  * Send a single character for XON/XOFF purposes.  We do it in this separate
 190  * function instead of the alternative support port.x_char, in the ...start_tx
 191  * function, so we don't mix up this case with possibly enabling transmission
 192  * of queued-up data (in case that's disabled after *receiving* an XOFF or
 193  * negative CTS).  This function is used for both DMA and non-DMA case; see HW
 194  * docs specifically blessing sending characters manually when DMA for
 195  * transmission is enabled and running.  We may be asked to transmit despite
 196  * the transmitter being disabled by a ..._stop_tx call so we need to enable
 197  * it temporarily but restore the state afterwards.
 198  */
 199 static void etraxfs_uart_send_xchar(struct uart_port *port, char ch)
 200 {
 201         struct uart_cris_port *up = (struct uart_cris_port *)port;
 202         reg_ser_rw_dout dout = { .data = ch };
 203         reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
 204         reg_ser_r_stat_din rstat;
 205         reg_ser_rw_tr_ctrl prev_tr_ctrl, tr_ctrl;
 206         void __iomem *regi_ser = up->regi_ser;
 207         unsigned long flags;
 208
 209         /*
 210          * Wait for tr_rdy in case a character is already being output.  Make
 211          * sure we have integrity between the register reads and the writes
 212          * below, but don't busy-wait with interrupts off and the port lock
 213          * taken.
 214          */
 215         spin_lock_irqsave(&port->lock, flags);
 216         do {
 217                 spin_unlock_irqrestore(&port->lock, flags);
 218                 spin_lock_irqsave(&port->lock, flags);
 219                 prev_tr_ctrl = tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
 220                 rstat = REG_RD(ser, regi_ser, r_stat_din);
 221         } while (!rstat.tr_rdy);
 222
 223         /*
 224          * Ack an interrupt if one was just issued for the previous character
 225          * that was output.  This is required for non-DMA as the interrupt is
 226          * used as the only indicator that the transmitter is ready and it
 227          * isn't while this x_char is being transmitted.
 228          */
 229         REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
 230
 231         /* Enable the transmitter in case it was disabled. */
 232         tr_ctrl.stop = 0;
 233         REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
 234
 235         /*
 236          * Finally, send the blessed character; nothing should stop it now,
 237          * except for an xoff-detected state, which we'll handle below.
 238          */
 239         REG_WR(ser, regi_ser, rw_dout, dout);
 240         up->port.icount.tx++;
 241
 242         /* There might be an xoff state to clear. */
 243         rstat = REG_RD(ser, up->regi_ser, r_stat_din);
 244
 245         /*
 246          * Clear any xoff state that *may* have been there to
 247          * inhibit transmission of the character.
 248          */
 249         if (rstat.xoff_detect) {
 250                 reg_ser_rw_xoff_clr xoff_clr = { .clr = 1 };
 251                 reg_ser_rw_tr_dma_en tr_dma_en;
 252
 253                 REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
 254                 tr_dma_en = REG_RD(ser, regi_ser, rw_tr_dma_en);
 255
 256                 /*
 257                  * If we had an xoff state but cleared it, instead sneak in a
 258                  * disabled state for the transmitter, after the character we
 259                  * sent.  Thus we keep the port disabled, just as if the xoff
 260                  * state was still in effect (or actually, as if stop_tx had
 261                  * been called, as we stop DMA too).
 262                  */
 263                 prev_tr_ctrl.stop = 1;
 264
 265                 tr_dma_en.en = 0;
 266                 REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
 267         }
 268
 269         /* Restore "previous" enabled/disabled state of the transmitter. */
 270         REG_WR(ser, regi_ser, rw_tr_ctrl, prev_tr_ctrl);
 271
 272         spin_unlock_irqrestore(&port->lock, flags);
 273 }
 274
 275 /*
 276  * Do not spin_lock_irqsave or disable interrupts by other means here; it's
 277  * already done by the caller.
 278  */
 279 static void etraxfs_uart_start_tx(struct uart_port *port)
 280 {
 281         struct uart_cris_port *up = (struct uart_cris_port *)port;
 282
 283         /* we have already done below if a write is ongoing */
 284         if (up->write_ongoing)
 285                 return;
 286
 287         /* Signal that write is ongoing */
 288         up->write_ongoing = 1;
 289
 290         etraxfs_uart_start_tx_bottom(port);
 291 }
 292
 293 static inline void etraxfs_uart_start_tx_bottom(struct uart_port *port)
 294 {
 295         struct uart_cris_port *up = (struct uart_cris_port *)port;
 296         void __iomem *regi_ser = up->regi_ser;
 297         reg_ser_rw_tr_ctrl tr_ctrl;
 298         reg_ser_rw_intr_mask intr_mask;
 299
 300         tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
 301         tr_ctrl.stop = regk_ser_no;
 302         REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
 303         intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
 304         intr_mask.tr_rdy = regk_ser_yes;
 305         REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
 306 }
 307
 308 /*
 309  * This function handles both the DMA and non-DMA case by ordering the
 310  * transmitter to stop of after the current character.  We don't need to wait
 311  * for any such character to be completely transmitted; we do that where it
 312  * matters, like in etraxfs_uart_set_termios.  Don't busy-wait here; see
 313  * Documentation/serial/driver: this function is called within
 314  * spin_lock_irq{,save} and thus separate ones would be disastrous (when SMP).
 315  * There's no documented need to set the txd pin to any particular value;
 316  * break setting is controlled solely by etraxfs_uart_break_ctl.
 317  */
 318 static void etraxfs_uart_stop_tx(struct uart_port *port)
 319 {
 320         struct uart_cris_port *up = (struct uart_cris_port *)port;
 321         void __iomem *regi_ser = up->regi_ser;
 322         reg_ser_rw_tr_ctrl tr_ctrl;
 323         reg_ser_rw_intr_mask intr_mask;
 324         reg_ser_rw_tr_dma_en tr_dma_en = {0};
 325         reg_ser_rw_xoff_clr xoff_clr = {0};
 326
 327         /*
 328          * For the non-DMA case, we'd get a tr_rdy interrupt that we're not
 329          * interested in as we're not transmitting any characters.  For the
 330          * DMA case, that interrupt is already turned off, but no reason to
 331          * waste code on conditionals here.
 332          */
 333         intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
 334         intr_mask.tr_rdy = regk_ser_no;
 335         REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
 336
 337         tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
 338         tr_ctrl.stop = 1;
 339         REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
 340
 341         /*
 342          * Always clear possible hardware xoff-detected state here, no need to
 343          * unnecessary consider mctrl settings and when they change.  We clear
 344          * it here rather than in start_tx: both functions are called as the
 345          * effect of XOFF processing, but start_tx is also called when upper
 346          * levels tell the driver that there are more characters to send, so
 347          * avoid adding code there.
 348          */
 349         xoff_clr.clr = 1;
 350         REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
 351
 352         /*
 353          * Disable transmitter DMA, so that if we're in XON/XOFF, we can send
 354          * those single characters without also giving go-ahead for queued up
 355          * DMA data.
 356          */
 357         tr_dma_en.en = 0;
 358         REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
 359
 360         /*
 361          * Make sure that write_ongoing is reset when stopping tx.
 362          */
 363         up->write_ongoing = 0;
 364 }
 365
 366 static void etraxfs_uart_stop_rx(struct uart_port *port)
 367 {
 368         struct uart_cris_port *up = (struct uart_cris_port *)port;
 369         void __iomem *regi_ser = up->regi_ser;
 370         reg_ser_rw_rec_ctrl rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
 371
 372         rec_ctrl.en = regk_ser_no;
 373         REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
 374 }
 375
 376 static void etraxfs_uart_enable_ms(struct uart_port *port)
 377 {
 378 }
 379
 380 static void check_modem_status(struct uart_cris_port *up)
 381 {
 382 }
 383
 384 static unsigned int etraxfs_uart_tx_empty(struct uart_port *port)
 385 {
 386         struct uart_cris_port *up = (struct uart_cris_port *)port;
 387         unsigned long flags;
 388         unsigned int ret;
 389         reg_ser_r_stat_din rstat = {0};
 390
 391         spin_lock_irqsave(&up->port.lock, flags);
 392
 393         rstat = REG_RD(ser, up->regi_ser, r_stat_din);
 394         ret = rstat.tr_empty ? TIOCSER_TEMT : 0;
 395
 396         spin_unlock_irqrestore(&up->port.lock, flags);
 397         return ret;
 398 }
 399 static unsigned int etraxfs_uart_get_mctrl(struct uart_port *port)
 400 {
 401         struct uart_cris_port *up = (struct uart_cris_port *)port;
 402         unsigned int ret;
 403
 404         ret = 0;
 405         if (crisv32_serial_get_rts(up))
 406                 ret |= TIOCM_RTS;
 407         /* DTR is active low */
 408         if (up->dtr_pin && !gpiod_get_raw_value(up->dtr_pin))
 409                 ret |= TIOCM_DTR;
 410         /* CD is active low */
 411         if (up->cd_pin && !gpiod_get_raw_value(up->cd_pin))
 412                 ret |= TIOCM_CD;
 413         /* RI is active low */
 414         if (up->ri_pin && !gpiod_get_raw_value(up->ri_pin))
 415                 ret |= TIOCM_RI;
 416         /* DSR is active low */
 417         if (up->dsr_pin && !gpiod_get_raw_value(up->dsr_pin))
 418                 ret |= TIOCM_DSR;
 419         if (crisv32_serial_get_cts(up))
 420                 ret |= TIOCM_CTS;
 421         return ret;
 422 }
 423
 424 static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 425 {
 426         struct uart_cris_port *up = (struct uart_cris_port *)port;
 427
 428         crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0, 0);
 429         /* DTR is active low */
 430         if (up->dtr_pin)
 431                 gpiod_set_raw_value(up->dtr_pin, mctrl & TIOCM_DTR ? 0 : 1);
 432         /* RI is active low */
 433         if (up->ri_pin)
 434                 gpiod_set_raw_value(up->ri_pin, mctrl & TIOCM_RNG ? 0 : 1);
 435         /* CD is active low */
 436         if (up->cd_pin)
 437                 gpiod_set_raw_value(up->cd_pin, mctrl & TIOCM_CD ? 0 : 1);
 438 }
 439
 440 static void etraxfs_uart_break_ctl(struct uart_port *port, int break_state)
 441 {
 442         struct uart_cris_port *up = (struct uart_cris_port *)port;
 443         unsigned long flags;
 444         reg_ser_rw_tr_ctrl tr_ctrl;
 445         reg_ser_rw_tr_dma_en tr_dma_en;
 446         reg_ser_rw_intr_mask intr_mask;
 447
 448         spin_lock_irqsave(&up->port.lock, flags);
 449         tr_ctrl = REG_RD(ser, up->regi_ser, rw_tr_ctrl);
 450         tr_dma_en = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
 451         intr_mask = REG_RD(ser, up->regi_ser, rw_intr_mask);
 452
 453         if (break_state != 0) { /* Send break */
 454                 /*
 455                  * We need to disable DMA (if used) or tr_rdy interrupts if no
 456                  * DMA.  No need to make this conditional on use of DMA;
 457                  * disabling will be a no-op for the other mode.
 458                  */
 459                 intr_mask.tr_rdy = regk_ser_no;
 460                 tr_dma_en.en = 0;
 461
 462                 /*
 463                  * Stop transmission and set the txd pin to 0 after the
 464                  * current character.  The txd setting will take effect after
 465                  * any current transmission has completed.
 466                  */
 467                 tr_ctrl.stop = 1;
 468                 tr_ctrl.txd = 0;
 469         } else {
 470                 /* Re-enable the serial interrupt. */
 471                 intr_mask.tr_rdy = regk_ser_yes;
 472
 473                 tr_ctrl.stop = 0;
 474                 tr_ctrl.txd = 1;
 475         }
 476         REG_WR(ser, up->regi_ser, rw_tr_ctrl, tr_ctrl);
 477         REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
 478         REG_WR(ser, up->regi_ser, rw_intr_mask, intr_mask);
 479
 480         spin_unlock_irqrestore(&up->port.lock, flags);
 481 }
 482
 483 static void
 484 transmit_chars_no_dma(struct uart_cris_port *up)
 485 {
 486         int max_count;
 487         struct circ_buf *xmit = &up->port.state->xmit;
 488
 489         void __iomem *regi_ser = up->regi_ser;
 490         reg_ser_r_stat_din rstat;
 491         reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
 492
 493         if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
 494                 /* No more to send, so disable the interrupt. */
 495                 reg_ser_rw_intr_mask intr_mask;
 496
 497                 intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
 498                 intr_mask.tr_rdy = 0;
 499                 intr_mask.tr_empty = 0;
 500                 REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
 501                 up->write_ongoing = 0;
 502                 return;
 503         }
 504
 505         /* If the serport is fast, we send up to max_count bytes before
 506            exiting the loop.  */
 507         max_count = 64;
 508         do {
 509                 reg_ser_rw_dout dout = { .data = xmit->buf[xmit->tail] };
 510
 511                 REG_WR(ser, regi_ser, rw_dout, dout);
 512                 REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
 513                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
 514                 up->port.icount.tx++;
 515                 if (xmit->head == xmit->tail)
 516                         break;
 517                 rstat = REG_RD(ser, regi_ser, r_stat_din);
 518         } while ((--max_count > 0) && rstat.tr_rdy);
 519
 520         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 521                 uart_write_wakeup(&up->port);
 522 }
 523
 524 static void receive_chars_no_dma(struct uart_cris_port *up)
 525 {
 526         reg_ser_rs_stat_din stat_din;
 527         reg_ser_r_stat_din rstat;
 528         struct tty_port *port;
 529         struct uart_icount *icount;
 530         int max_count = 16;
 531         char flag;
 532         reg_ser_rw_ack_intr ack_intr = { 0 };
 533
 534         rstat = REG_RD(ser, up->regi_ser, r_stat_din);
 535         icount = &up->port.icount;
 536         port = &up->port.state->port;
 537
 538         do {
 539                 stat_din = REG_RD(ser, up->regi_ser, rs_stat_din);
 540
 541                 flag = TTY_NORMAL;
 542                 ack_intr.dav = 1;
 543                 REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
 544                 icount->rx++;
 545
 546                 if (stat_din.framing_err | stat_din.par_err | stat_din.orun) {
 547                         if (stat_din.data == 0x00 &&
 548                             stat_din.framing_err) {
 549                                 /* Most likely a break. */
 550                                 flag = TTY_BREAK;
 551                                 icount->brk++;
 552                         } else if (stat_din.par_err) {
 553                                 flag = TTY_PARITY;
 554                                 icount->parity++;
 555                         } else if (stat_din.orun) {
 556                                 flag = TTY_OVERRUN;
 557                                 icount->overrun++;
 558                         } else if (stat_din.framing_err) {
 559                                 flag = TTY_FRAME;
 560                                 icount->frame++;
 561                         }
 562                 }
 563
 564                 /*
 565                  * If this becomes important, we probably *could* handle this
 566                  * gracefully by keeping track of the unhandled character.
 567                  */
 568                 if (!tty_insert_flip_char(port, stat_din.data, flag))
 569                         panic("%s: No tty buffer space", __func__);
 570                 rstat = REG_RD(ser, up->regi_ser, r_stat_din);
 571         } while (rstat.dav && (max_count-- > 0));
 572         spin_unlock(&up->port.lock);
 573         tty_flip_buffer_push(port);
 574         spin_lock(&up->port.lock);
 575 }
 576
 577 static irqreturn_t
 578 ser_interrupt(int irq, void *dev_id)
 579 {
 580         struct uart_cris_port *up = (struct uart_cris_port *)dev_id;
 581         void __iomem *regi_ser;
 582         int handled = 0;
 583
 584         spin_lock(&up->port.lock);
 585
 586         regi_ser = up->regi_ser;
 587
 588         if (regi_ser) {
 589                 reg_ser_r_masked_intr masked_intr;
 590
 591                 masked_intr = REG_RD(ser, regi_ser, r_masked_intr);
 592                 /*
 593                  * Check what interrupts are active before taking
 594                  * actions. If DMA is used the interrupt shouldn't
 595                  * be enabled.
 596                  */
 597                 if (masked_intr.dav) {
 598                         receive_chars_no_dma(up);
 599                         handled = 1;
 600                 }
 601                 check_modem_status(up);
 602
 603                 if (masked_intr.tr_rdy) {
 604                         transmit_chars_no_dma(up);
 605                         handled = 1;
 606                 }
 607         }
 608         spin_unlock(&up->port.lock);
 609         return IRQ_RETVAL(handled);
 610 }
 611
 612 #ifdef CONFIG_CONSOLE_POLL
 613 static int etraxfs_uart_get_poll_char(struct uart_port *port)
 614 {
 615         reg_ser_rs_stat_din stat;
 616         reg_ser_rw_ack_intr ack_intr = { 0 };
 617         struct uart_cris_port *up = (struct uart_cris_port *)port;
 618
 619         do {
 620                 stat = REG_RD(ser, up->regi_ser, rs_stat_din);
 621         } while (!stat.dav);
 622
 623         /* Ack the data_avail interrupt. */
 624         ack_intr.dav = 1;
 625         REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
 626
 627         return stat.data;
 628 }
 629
 630 static void etraxfs_uart_put_poll_char(struct uart_port *port,
 631                                         unsigned char c)
 632 {
 633         reg_ser_r_stat_din stat;
 634         struct uart_cris_port *up = (struct uart_cris_port *)port;
 635
 636         do {
 637                 stat = REG_RD(ser, up->regi_ser, r_stat_din);
 638         } while (!stat.tr_rdy);
 639         REG_WR_INT(ser, up->regi_ser, rw_dout, c);
 640 }
 641 #endif /* CONFIG_CONSOLE_POLL */
 642
 643 static int etraxfs_uart_startup(struct uart_port *port)
 644 {
 645         struct uart_cris_port *up = (struct uart_cris_port *)port;
 646         unsigned long flags;
 647         reg_ser_rw_intr_mask ser_intr_mask = {0};
 648
 649         ser_intr_mask.dav = regk_ser_yes;
 650
 651         if (request_irq(etraxfs_uart_ports[port->line]->irq, ser_interrupt,
 652                         0, DRV_NAME, etraxfs_uart_ports[port->line]))
 653                 panic("irq ser%d", port->line);
 654
 655         spin_lock_irqsave(&up->port.lock, flags);
 656
 657         REG_WR(ser, up->regi_ser, rw_intr_mask, ser_intr_mask);
 658
 659         etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
 660
 661         spin_unlock_irqrestore(&up->port.lock, flags);
 662
 663         return 0;
 664 }
 665
 666 static void etraxfs_uart_shutdown(struct uart_port *port)
 667 {
 668         struct uart_cris_port *up = (struct uart_cris_port *)port;
 669         unsigned long flags;
 670
 671         spin_lock_irqsave(&up->port.lock, flags);
 672
 673         etraxfs_uart_stop_tx(port);
 674         etraxfs_uart_stop_rx(port);
 675
 676         free_irq(etraxfs_uart_ports[port->line]->irq,
 677                  etraxfs_uart_ports[port->line]);
 678
 679         etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
 680
 681         spin_unlock_irqrestore(&up->port.lock, flags);
 682
 683 }
 684
 685 static void
 686 etraxfs_uart_set_termios(struct uart_port *port, struct ktermios *termios,
 687                          struct ktermios *old)
 688 {
 689         struct uart_cris_port *up = (struct uart_cris_port *)port;
 690         unsigned long flags;
 691         reg_ser_rw_xoff xoff;
 692         reg_ser_rw_xoff_clr xoff_clr = {0};
 693         reg_ser_rw_tr_ctrl tx_ctrl = {0};
 694         reg_ser_rw_tr_dma_en tx_dma_en = {0};
 695         reg_ser_rw_rec_ctrl rx_ctrl = {0};
 696         reg_ser_rw_tr_baud_div tx_baud_div = {0};
 697         reg_ser_rw_rec_baud_div rx_baud_div = {0};
 698         int baud;
 699
 700         if (old &&
 701             termios->c_cflag == old->c_cflag &&
 702             termios->c_iflag == old->c_iflag)
 703                 return;
 704
 705         /* Tx: 8 bit, no/even parity, 1 stop bit, no cts. */
 706         tx_ctrl.base_freq = regk_ser_f29_493;
 707         tx_ctrl.en = 0;
 708         tx_ctrl.stop = 0;
 709         tx_ctrl.auto_rts = regk_ser_no;
 710         tx_ctrl.txd = 1;
 711         tx_ctrl.auto_cts = 0;
 712         /* Rx: 8 bit, no/even parity. */
 713         rx_ctrl.dma_err = regk_ser_stop;
 714         rx_ctrl.sampling = regk_ser_majority;
 715         rx_ctrl.timeout = 1;
 716
 717         rx_ctrl.rts_n = regk_ser_inactive;
 718
 719         /* Common for tx and rx: 8N1. */
 720         tx_ctrl.data_bits = regk_ser_bits8;
 721         rx_ctrl.data_bits = regk_ser_bits8;
 722         tx_ctrl.par = regk_ser_even;
 723         rx_ctrl.par = regk_ser_even;
 724         tx_ctrl.par_en = regk_ser_no;
 725         rx_ctrl.par_en = regk_ser_no;
 726
 727         tx_ctrl.stop_bits = regk_ser_bits1;
 728
 729         /*
 730          * Change baud-rate and write it to the hardware.
 731          *
 732          * baud_clock = base_freq / (divisor*8)
 733          * divisor = base_freq / (baud_clock * 8)
 734          * base_freq is either:
 735          * off, ext, 29.493MHz, 32.000 MHz, 32.768 MHz or 100 MHz
 736          * 20.493MHz is used for standard baudrates
 737          */
 738
 739         /*
 740          * For the console port we keep the original baudrate here.  Not very
 741          * beautiful.
 742          */
 743         if ((port != console_port) || old)
 744                 baud = uart_get_baud_rate(port, termios, old, 0,
 745                                           port->uartclk / 8);
 746         else
 747                 baud = console_baud;
 748
 749         tx_baud_div.div = 29493000 / (8 * baud);
 750         /* Rx uses same as tx. */
 751         rx_baud_div.div = tx_baud_div.div;
 752         rx_ctrl.base_freq = tx_ctrl.base_freq;
 753
 754         if ((termios->c_cflag & CSIZE) == CS7) {
 755                 /* Set 7 bit mode. */
 756                 tx_ctrl.data_bits = regk_ser_bits7;
 757                 rx_ctrl.data_bits = regk_ser_bits7;
 758         }
 759
 760         if (termios->c_cflag & CSTOPB) {
 761                 /* Set 2 stop bit mode. */
 762                 tx_ctrl.stop_bits = regk_ser_bits2;
 763         }
 764
 765         if (termios->c_cflag & PARENB) {
 766                 /* Enable parity. */
 767                 tx_ctrl.par_en = regk_ser_yes;
 768                 rx_ctrl.par_en = regk_ser_yes;
 769         }
 770
 771         if (termios->c_cflag & CMSPAR) {
 772                 if (termios->c_cflag & PARODD) {
 773                         /* Set mark parity if PARODD and CMSPAR. */
 774                         tx_ctrl.par = regk_ser_mark;
 775                         rx_ctrl.par = regk_ser_mark;
 776                 } else {
 777                         tx_ctrl.par = regk_ser_space;
 778                         rx_ctrl.par = regk_ser_space;
 779                 }
 780         } else {
 781                 if (termios->c_cflag & PARODD) {
 782                         /* Set odd parity. */
 783                        tx_ctrl.par = regk_ser_odd;
 784                        rx_ctrl.par = regk_ser_odd;
 785                 }
 786         }
 787
 788         if (termios->c_cflag & CRTSCTS) {
 789                 /* Enable automatic CTS handling. */
 790                 tx_ctrl.auto_cts = regk_ser_yes;
 791         }
 792
 793         /* Make sure the tx and rx are enabled. */
 794         tx_ctrl.en = regk_ser_yes;
 795         rx_ctrl.en = regk_ser_yes;
 796
 797         spin_lock_irqsave(&port->lock, flags);
 798
 799         tx_dma_en.en = 0;
 800         REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
 801
 802         /* Actually write the control regs (if modified) to the hardware. */
 803         uart_update_timeout(port, termios->c_cflag, port->uartclk/8);
 804         MODIFY_REG(up->regi_ser, rw_rec_baud_div, rx_baud_div);
 805         MODIFY_REG(up->regi_ser, rw_rec_ctrl, rx_ctrl);
 806
 807         MODIFY_REG(up->regi_ser, rw_tr_baud_div, tx_baud_div);
 808         MODIFY_REG(up->regi_ser, rw_tr_ctrl, tx_ctrl);
 809
 810         tx_dma_en.en = 0;
 811         REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
 812
 813         xoff = REG_RD(ser, up->regi_ser, rw_xoff);
 814
 815         if (up->port.state && up->port.state->port.tty &&
 816             (up->port.state->port.tty->termios.c_iflag & IXON)) {
 817                 xoff.chr = STOP_CHAR(up->port.state->port.tty);
 818                 xoff.automatic = regk_ser_yes;
 819         } else
 820                 xoff.automatic = regk_ser_no;
 821
 822         MODIFY_REG(up->regi_ser, rw_xoff, xoff);
 823
 824         /*
 825          * Make sure we don't start in an automatically shut-off state due to
 826          * a previous early exit.
 827          */
 828         xoff_clr.clr = 1;
 829         REG_WR(ser, up->regi_ser, rw_xoff_clr, xoff_clr);
 830
 831         etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
 832         spin_unlock_irqrestore(&up->port.lock, flags);
 833 }
 834
 835 static const char *
 836 etraxfs_uart_type(struct uart_port *port)
 837 {
 838         return "CRISv32";
 839 }
 840
 841 static void etraxfs_uart_release_port(struct uart_port *port)
 842 {
 843 }
 844
 845 static int etraxfs_uart_request_port(struct uart_port *port)
 846 {
 847         return 0;
 848 }
 849
 850 static void etraxfs_uart_config_port(struct uart_port *port, int flags)
 851 {
 852         struct uart_cris_port *up = (struct uart_cris_port *)port;
 853
 854         up->port.type = PORT_CRIS;
 855 }
 856
 857 static const struct uart_ops etraxfs_uart_pops = {
 858         .tx_empty = etraxfs_uart_tx_empty,
 859         .set_mctrl = etraxfs_uart_set_mctrl,
 860         .get_mctrl = etraxfs_uart_get_mctrl,
 861         .stop_tx = etraxfs_uart_stop_tx,
 862         .start_tx = etraxfs_uart_start_tx,
 863         .send_xchar = etraxfs_uart_send_xchar,
 864         .stop_rx = etraxfs_uart_stop_rx,
 865         .enable_ms = etraxfs_uart_enable_ms,
 866         .break_ctl = etraxfs_uart_break_ctl,
 867         .startup = etraxfs_uart_startup,
 868         .shutdown = etraxfs_uart_shutdown,
 869         .set_termios = etraxfs_uart_set_termios,
 870         .type = etraxfs_uart_type,
 871         .release_port = etraxfs_uart_release_port,
 872         .request_port = etraxfs_uart_request_port,
 873         .config_port = etraxfs_uart_config_port,
 874 #ifdef CONFIG_CONSOLE_POLL
 875         .poll_get_char = etraxfs_uart_get_poll_char,
 876         .poll_put_char = etraxfs_uart_put_poll_char,
 877 #endif
 878 };
 879
 880 static void cris_serial_port_init(struct uart_port *port, int line)
 881 {
 882         struct uart_cris_port *up = (struct uart_cris_port *)port;
 883
 884         if (up->initialized)
 885                 return;
 886         up->initialized = 1;
 887         port->line = line;
 888         spin_lock_init(&port->lock);
 889         port->ops = &etraxfs_uart_pops;
 890         port->irq = up->irq;
 891         port->iobase = (unsigned long) up->regi_ser;
 892         port->uartclk = 29493000;
 893
 894         /*
 895          * We can't fit any more than 255 here (unsigned char), though
 896          * actually UART_XMIT_SIZE characters could be pending output.
 897          * At time of this writing, the definition of "fifosize" is here the
 898          * amount of characters that can be pending output after a start_tx call
 899          * until tx_empty returns 1: see serial_core.c:uart_wait_until_sent.
 900          * This matters for timeout calculations unfortunately, but keeping
 901          * larger amounts at the DMA wouldn't win much so let's just play nice.
 902          */
 903         port->fifosize = 255;
 904         port->flags = UPF_BOOT_AUTOCONF;
 905 }
 906
 907 static int etraxfs_uart_probe(struct platform_device *pdev)
 908 {
 909         struct device_node *np = pdev->dev.of_node;
 910         struct uart_cris_port *up;
 911         int dev_id;
 912
 913         if (!np)
 914                 return -ENODEV;
 915
 916         dev_id = of_alias_get_id(np, "serial");
 917         if (dev_id < 0)
 918                 dev_id = 0;
 919
 920         if (dev_id >= UART_NR)
 921                 return -EINVAL;
 922
 923         if (etraxfs_uart_ports[dev_id])
 924                 return -EBUSY;
 925
 926         up = devm_kzalloc(&pdev->dev, sizeof(struct uart_cris_port),
 927                           GFP_KERNEL);
 928         if (!up)
 929                 return -ENOMEM;
 930
 931         up->irq = irq_of_parse_and_map(np, 0);
 932         up->regi_ser = of_iomap(np, 0);
 933         up->dtr_pin = devm_gpiod_get_optional(&pdev->dev, "dtr");
 934         up->dsr_pin = devm_gpiod_get_optional(&pdev->dev, "dsr");
 935         up->ri_pin = devm_gpiod_get_optional(&pdev->dev, "ri");
 936         up->cd_pin = devm_gpiod_get_optional(&pdev->dev, "cd");
 937         up->port.dev = &pdev->dev;
 938         cris_serial_port_init(&up->port, dev_id);
 939
 940         etraxfs_uart_ports[dev_id] = up;
 941         platform_set_drvdata(pdev, &up->port);
 942         uart_add_one_port(&etraxfs_uart_driver, &up->port);
 943
 944         return 0;
 945 }
 946
 947 static int etraxfs_uart_remove(struct platform_device *pdev)
 948 {
 949         struct uart_port *port;
 950
 951         port = platform_get_drvdata(pdev);
 952         uart_remove_one_port(&etraxfs_uart_driver, port);
 953         etraxfs_uart_ports[pdev->id] = NULL;
 954
 955         return 0;
 956 }
 957
 958 static const struct of_device_id etraxfs_uart_dt_ids[] = {
 959         { .compatible = "axis,etraxfs-uart" },
 960         { /* sentinel */ }
 961 };
 962
 963 MODULE_DEVICE_TABLE(of, etraxfs_uart_dt_ids);
 964
 965 static struct platform_driver etraxfs_uart_platform_driver = {
 966         .driver = {
 967                 .name   = DRV_NAME,
 968                 .of_match_table = of_match_ptr(etraxfs_uart_dt_ids),
 969         },
 970         .probe          = etraxfs_uart_probe,
 971         .remove         = etraxfs_uart_remove,
 972 };
 973
 974 static int __init etraxfs_uart_init(void)
 975 {
 976         int ret;
 977
 978         ret = uart_register_driver(&etraxfs_uart_driver);
 979         if (ret)
 980                 return ret;
 981
 982         ret = platform_driver_register(&etraxfs_uart_platform_driver);
 983         if (ret)
 984                 uart_unregister_driver(&etraxfs_uart_driver);
 985
 986         return ret;
 987 }
 988
 989 static void __exit etraxfs_uart_exit(void)
 990 {
 991         platform_driver_unregister(&etraxfs_uart_platform_driver);
 992         uart_unregister_driver(&etraxfs_uart_driver);
 993 }
 994
 995 module_init(etraxfs_uart_init);
 996 module_exit(etraxfs_uart_exit);