2 * Serial Port driver for a NWP uart device
4 * Copyright (C) 2008 IBM Corp., Benjamin Krill <ben@codiert.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #include <linux/init.h>
13 #include <linux/export.h>
14 #include <linux/console.h>
15 #include <linux/serial.h>
16 #include <linux/serial_reg.h>
17 #include <linux/serial_core.h>
18 #include <linux/tty.h>
19 #include <linux/tty_flip.h>
20 #include <linux/irqreturn.h>
21 #include <linux/mutex.h>
22 #include <linux/of_platform.h>
23 #include <linux/of_device.h>
24 #include <linux/nwpserial.h>
25 #include <linux/delay.h>
29 #define NWPSERIAL_NR 2
31 #define NWPSERIAL_STATUS_RXVALID 0x1
32 #define NWPSERIAL_STATUS_TXFULL 0x2
34 struct nwpserial_port
{
35 struct uart_port port
;
41 static DEFINE_MUTEX(nwpserial_mutex
);
42 static struct nwpserial_port nwpserial_ports
[NWPSERIAL_NR
];
44 static void wait_for_bits(struct nwpserial_port
*up
, int bits
)
46 unsigned int status
, tmout
= 10000;
48 /* Wait up to 10ms for the character(s) to be sent. */
50 status
= dcr_read(up
->dcr_host
, UART_LSR
);
55 } while ((status
& bits
) != bits
);
58 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE
59 static void nwpserial_console_putchar(struct uart_port
*port
, int c
)
61 struct nwpserial_port
*up
;
62 up
= container_of(port
, struct nwpserial_port
, port
);
63 /* check if tx buffer is full */
64 wait_for_bits(up
, UART_LSR_THRE
);
65 dcr_write(up
->dcr_host
, UART_TX
, c
);
70 nwpserial_console_write(struct console
*co
, const char *s
, unsigned int count
)
72 struct nwpserial_port
*up
= &nwpserial_ports
[co
->index
];
77 locked
= spin_trylock_irqsave(&up
->port
.lock
, flags
);
79 spin_lock_irqsave(&up
->port
.lock
, flags
);
81 /* save and disable interrupt */
82 up
->ier
= dcr_read(up
->dcr_host
, UART_IER
);
83 dcr_write(up
->dcr_host
, UART_IER
, up
->ier
& ~UART_IER_RDI
);
85 uart_console_write(&up
->port
, s
, count
, nwpserial_console_putchar
);
87 /* wait for transmitter to become empty */
88 while ((dcr_read(up
->dcr_host
, UART_LSR
) & UART_LSR_THRE
) == 0)
91 /* restore interrupt state */
92 dcr_write(up
->dcr_host
, UART_IER
, up
->ier
);
95 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
98 static struct uart_driver nwpserial_reg
;
99 static struct console nwpserial_console
= {
101 .write
= nwpserial_console_write
,
102 .device
= uart_console_device
,
103 .flags
= CON_PRINTBUFFER
,
105 .data
= &nwpserial_reg
,
107 #define NWPSERIAL_CONSOLE (&nwpserial_console)
109 #define NWPSERIAL_CONSOLE NULL
110 #endif /* CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE */
112 /**************************************************************************/
114 static int nwpserial_request_port(struct uart_port
*port
)
119 static void nwpserial_release_port(struct uart_port
*port
)
124 static void nwpserial_config_port(struct uart_port
*port
, int flags
)
126 port
->type
= PORT_NWPSERIAL
;
129 static irqreturn_t
nwpserial_interrupt(int irq
, void *dev_id
)
131 struct nwpserial_port
*up
= dev_id
;
132 struct tty_port
*port
= &up
->port
.state
->port
;
137 spin_lock(&up
->port
.lock
);
139 /* check if the uart was the interrupt source. */
140 iir
= dcr_read(up
->dcr_host
, UART_IIR
);
147 up
->port
.icount
.rx
++;
148 ch
= dcr_read(up
->dcr_host
, UART_RX
);
149 if (up
->port
.ignore_status_mask
!= NWPSERIAL_STATUS_RXVALID
)
150 tty_insert_flip_char(port
, ch
, TTY_NORMAL
);
151 } while (dcr_read(up
->dcr_host
, UART_LSR
) & UART_LSR_DR
);
153 spin_unlock(&up
->port
.lock
);
154 tty_flip_buffer_push(port
);
155 spin_lock(&up
->port
.lock
);
159 /* clear interrupt */
160 dcr_write(up
->dcr_host
, UART_IIR
, 1);
162 spin_unlock(&up
->port
.lock
);
166 static int nwpserial_startup(struct uart_port
*port
)
168 struct nwpserial_port
*up
;
171 up
= container_of(port
, struct nwpserial_port
, port
);
173 /* disable flow control by default */
174 up
->mcr
= dcr_read(up
->dcr_host
, UART_MCR
) & ~UART_MCR_AFE
;
175 dcr_write(up
->dcr_host
, UART_MCR
, up
->mcr
);
177 /* register interrupt handler */
178 err
= request_irq(up
->port
.irq
, nwpserial_interrupt
,
179 IRQF_SHARED
, "nwpserial", up
);
183 /* enable interrupts */
184 up
->ier
= UART_IER_RDI
;
185 dcr_write(up
->dcr_host
, UART_IER
, up
->ier
);
187 /* enable receiving */
188 up
->port
.ignore_status_mask
&= ~NWPSERIAL_STATUS_RXVALID
;
193 static void nwpserial_shutdown(struct uart_port
*port
)
195 struct nwpserial_port
*up
;
196 up
= container_of(port
, struct nwpserial_port
, port
);
198 /* disable receiving */
199 up
->port
.ignore_status_mask
|= NWPSERIAL_STATUS_RXVALID
;
201 /* disable interrupts from this port */
203 dcr_write(up
->dcr_host
, UART_IER
, up
->ier
);
206 free_irq(up
->port
.irq
, up
);
209 static int nwpserial_verify_port(struct uart_port
*port
,
210 struct serial_struct
*ser
)
215 static const char *nwpserial_type(struct uart_port
*port
)
217 return port
->type
== PORT_NWPSERIAL
? "nwpserial" : NULL
;
220 static void nwpserial_set_termios(struct uart_port
*port
,
221 struct ktermios
*termios
, struct ktermios
*old
)
223 struct nwpserial_port
*up
;
224 up
= container_of(port
, struct nwpserial_port
, port
);
226 up
->port
.read_status_mask
= NWPSERIAL_STATUS_RXVALID
227 | NWPSERIAL_STATUS_TXFULL
;
229 up
->port
.ignore_status_mask
= 0;
230 /* ignore all characters if CREAD is not set */
231 if ((termios
->c_cflag
& CREAD
) == 0)
232 up
->port
.ignore_status_mask
|= NWPSERIAL_STATUS_RXVALID
;
234 /* Copy back the old hardware settings */
236 tty_termios_copy_hw(termios
, old
);
239 static void nwpserial_break_ctl(struct uart_port
*port
, int ctl
)
244 static void nwpserial_stop_rx(struct uart_port
*port
)
246 struct nwpserial_port
*up
;
247 up
= container_of(port
, struct nwpserial_port
, port
);
248 /* don't forward any more data (like !CREAD) */
249 up
->port
.ignore_status_mask
= NWPSERIAL_STATUS_RXVALID
;
252 static void nwpserial_putchar(struct nwpserial_port
*up
, unsigned char c
)
254 /* check if tx buffer is full */
255 wait_for_bits(up
, UART_LSR_THRE
);
256 dcr_write(up
->dcr_host
, UART_TX
, c
);
257 up
->port
.icount
.tx
++;
260 static void nwpserial_start_tx(struct uart_port
*port
)
262 struct nwpserial_port
*up
;
263 struct circ_buf
*xmit
;
264 up
= container_of(port
, struct nwpserial_port
, port
);
265 xmit
= &up
->port
.state
->xmit
;
268 nwpserial_putchar(up
, up
->port
.x_char
);
272 while (!(uart_circ_empty(xmit
) || uart_tx_stopped(&up
->port
))) {
273 nwpserial_putchar(up
, xmit
->buf
[xmit
->tail
]);
274 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
-1);
278 static unsigned int nwpserial_get_mctrl(struct uart_port
*port
)
283 static void nwpserial_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
288 static void nwpserial_stop_tx(struct uart_port
*port
)
293 static unsigned int nwpserial_tx_empty(struct uart_port
*port
)
295 struct nwpserial_port
*up
;
298 up
= container_of(port
, struct nwpserial_port
, port
);
300 spin_lock_irqsave(&up
->port
.lock
, flags
);
301 ret
= dcr_read(up
->dcr_host
, UART_LSR
);
302 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
304 return ret
& UART_LSR_TEMT
? TIOCSER_TEMT
: 0;
307 static struct uart_ops nwpserial_pops
= {
308 .tx_empty
= nwpserial_tx_empty
,
309 .set_mctrl
= nwpserial_set_mctrl
,
310 .get_mctrl
= nwpserial_get_mctrl
,
311 .stop_tx
= nwpserial_stop_tx
,
312 .start_tx
= nwpserial_start_tx
,
313 .stop_rx
= nwpserial_stop_rx
,
314 .break_ctl
= nwpserial_break_ctl
,
315 .startup
= nwpserial_startup
,
316 .shutdown
= nwpserial_shutdown
,
317 .set_termios
= nwpserial_set_termios
,
318 .type
= nwpserial_type
,
319 .release_port
= nwpserial_release_port
,
320 .request_port
= nwpserial_request_port
,
321 .config_port
= nwpserial_config_port
,
322 .verify_port
= nwpserial_verify_port
,
325 static struct uart_driver nwpserial_reg
= {
326 .owner
= THIS_MODULE
,
327 .driver_name
= "nwpserial",
332 .cons
= NWPSERIAL_CONSOLE
,
335 int nwpserial_register_port(struct uart_port
*port
)
337 struct nwpserial_port
*up
= NULL
;
340 static int first
= 1;
343 struct device_node
*dn
;
345 mutex_lock(&nwpserial_mutex
);
347 dn
= port
->dev
->of_node
;
352 dcr_base
= dcr_resource_start(dn
, 0);
354 /* find matching entry */
355 for (i
= 0; i
< NWPSERIAL_NR
; i
++)
356 if (nwpserial_ports
[i
].port
.iobase
== dcr_base
) {
357 up
= &nwpserial_ports
[i
];
361 /* we didn't find a mtching entry, search for a free port */
363 for (i
= 0; i
< NWPSERIAL_NR
; i
++)
364 if (nwpserial_ports
[i
].port
.type
== PORT_UNKNOWN
&&
365 nwpserial_ports
[i
].port
.iobase
== 0) {
366 up
= &nwpserial_ports
[i
];
376 uart_register_driver(&nwpserial_reg
);
379 up
->port
.membase
= port
->membase
;
380 up
->port
.irq
= port
->irq
;
381 up
->port
.uartclk
= port
->uartclk
;
382 up
->port
.fifosize
= port
->fifosize
;
383 up
->port
.regshift
= port
->regshift
;
384 up
->port
.iotype
= port
->iotype
;
385 up
->port
.flags
= port
->flags
;
386 up
->port
.mapbase
= port
->mapbase
;
387 up
->port
.private_data
= port
->private_data
;
390 up
->port
.dev
= port
->dev
;
392 if (up
->port
.iobase
!= dcr_base
) {
393 up
->port
.ops
= &nwpserial_pops
;
394 up
->port
.fifosize
= 16;
396 spin_lock_init(&up
->port
.lock
);
398 up
->port
.iobase
= dcr_base
;
399 dcr_len
= dcr_resource_len(dn
, 0);
401 up
->dcr_host
= dcr_map(dn
, dcr_base
, dcr_len
);
402 if (!DCR_MAP_OK(up
->dcr_host
)) {
403 printk(KERN_ERR
"Cannot map DCR resources for NWPSERIAL");
408 ret
= uart_add_one_port(&nwpserial_reg
, &up
->port
);
413 mutex_unlock(&nwpserial_mutex
);
417 EXPORT_SYMBOL(nwpserial_register_port
);
419 void nwpserial_unregister_port(int line
)
421 struct nwpserial_port
*up
= &nwpserial_ports
[line
];
422 mutex_lock(&nwpserial_mutex
);
423 uart_remove_one_port(&nwpserial_reg
, &up
->port
);
425 up
->port
.type
= PORT_UNKNOWN
;
427 mutex_unlock(&nwpserial_mutex
);
429 EXPORT_SYMBOL(nwpserial_unregister_port
);
431 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE
432 static int __init
nwpserial_console_init(void)
434 struct nwpserial_port
*up
= NULL
;
435 struct device_node
*dn
;
441 /* search for a free port */
442 for (i
= 0; i
< NWPSERIAL_NR
; i
++)
443 if (nwpserial_ports
[i
].port
.type
== PORT_UNKNOWN
) {
444 up
= &nwpserial_ports
[i
];
451 name
= of_get_property(of_chosen
, "linux,stdout-path", NULL
);
455 dn
= of_find_node_by_path(name
);
459 spin_lock_init(&up
->port
.lock
);
460 up
->port
.ops
= &nwpserial_pops
;
461 up
->port
.type
= PORT_NWPSERIAL
;
462 up
->port
.fifosize
= 16;
464 dcr_base
= dcr_resource_start(dn
, 0);
465 dcr_len
= dcr_resource_len(dn
, 0);
466 up
->port
.iobase
= dcr_base
;
468 up
->dcr_host
= dcr_map(dn
, dcr_base
, dcr_len
);
469 if (!DCR_MAP_OK(up
->dcr_host
)) {
470 printk("Cannot map DCR resources for SERIAL");
473 register_console(&nwpserial_console
);
476 console_initcall(nwpserial_console_init
);
477 #endif /* CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE */