include/asm-arm/arch-s3c2410/system.h

   1 /* linux/include/asm-arm/arch-s3c2410/system.h
   2  *
   3  * Copyright (c) 2003 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2410 - System function defines and includes
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #include <asm/hardware.h>
  14 #include <asm/io.h>
  15
  16 #include <asm/arch/map.h>
  17 #include <asm/arch/idle.h>
  18
  19 #include <asm/arch/regs-watchdog.h>
  20 #include <asm/arch/regs-clock.h>
  21
  22 void (*s3c24xx_idle)(void);
  23
  24 void s3c24xx_default_idle(void)
  25 {
  26         void __iomem *reg = S3C2410_CLKCON;
  27         unsigned long tmp;
  28         int i;
  29
  30         /* idle the system by using the idle mode which will wait for an
  31          * interrupt to happen before restarting the system.
  32          */
  33
  34         /* Warning: going into idle state upsets jtag scanning */
  35
  36         __raw_writel(__raw_readl(reg) | (1<<2), reg);
  37
  38         /* the samsung port seems to do a loop and then unset idle.. */
  39         for (i = 0; i < 50; i++) {
  40                 tmp += __raw_readl(reg); /* ensure loop not optimised out */
  41         }
  42
  43         /* this bit is not cleared on re-start... */
  44
  45         __raw_writel(__raw_readl(reg) & ~(1<<2), reg);
  46 }
  47
  48 static void arch_idle(void)
  49 {
  50         if (s3c24xx_idle != NULL)
  51                 (s3c24xx_idle)();
  52         else
  53                 s3c24xx_default_idle();
  54 }
  55
  56
  57 static void
  58 arch_reset(char mode)
  59 {
  60         if (mode == 's') {
  61                 cpu_reset(0);
  62         }
  63
  64         printk("arch_reset: attempting watchdog reset\n");
  65
  66         __raw_writel(0, S3C2410_WTCON);   /* disable watchdog, to be safe  */
  67
  68         /* put initial values into count and data */
  69         __raw_writel(0x100, S3C2410_WTCNT);
  70         __raw_writel(0x100, S3C2410_WTDAT);
  71
  72         /* set the watchdog to go and reset... */
  73         __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
  74                      S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);
  75
  76         /* wait for reset to assert... */
  77         mdelay(5000);
  78
  79         printk(KERN_ERR "Watchdog reset failed to assert reset\n");
  80
  81         /* we'll take a jump through zero as a poor second */
  82         cpu_reset(0);
  83 }