include/asm-arm/dma-mapping.h

   1 #ifndef ASMARM_DMA_MAPPING_H
   2 #define ASMARM_DMA_MAPPING_H
   3
   4 #ifdef __KERNEL__
   5
   6 #include <linux/mm.h> /* need struct page */
   7
   8 #include <asm/scatterlist.h>
   9
  10 /*
  11  * DMA-consistent mapping functions.  These allocate/free a region of
  12  * uncached, unwrite-buffered mapped memory space for use with DMA
  13  * devices.  This is the "generic" version.  The PCI specific version
  14  * is in pci.h
  15  *
  16  * Note: Drivers should NOT use this function directly, as it will break
  17  * platforms with CONFIG_DMABOUNCE.
  18  * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
  19  */
  20 extern void consistent_sync(void *kaddr, size_t size, int rw);
  21
  22 /*
  23  * Return whether the given device DMA address mask can be supported
  24  * properly.  For example, if your device can only drive the low 24-bits
  25  * during bus mastering, then you would pass 0x00ffffff as the mask
  26  * to this function.
  27  *
  28  * FIXME: This should really be a platform specific issue - we should
  29  * return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
  30  */
  31 static inline int dma_supported(struct device *dev, u64 mask)
  32 {
  33         return dev->dma_mask && *dev->dma_mask != 0;
  34 }
  35
  36 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  37 {
  38         if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  39                 return -EIO;
  40
  41         *dev->dma_mask = dma_mask;
  42
  43         return 0;
  44 }
  45
  46 static inline int dma_get_cache_alignment(void)
  47 {
  48         return 32;
  49 }
  50
  51 static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
  52 {
  53         return !!arch_is_coherent();
  54 }
  55
  56 /*
  57  * DMA errors are defined by all-bits-set in the DMA address.
  58  */
  59 static inline int dma_mapping_error(dma_addr_t dma_addr)
  60 {
  61         return dma_addr == ~0;
  62 }
  63
  64 /**
  65  * dma_alloc_coherent - allocate consistent memory for DMA
  66  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  67  * @size: required memory size
  68  * @handle: bus-specific DMA address
  69  *
  70  * Allocate some uncached, unbuffered memory for a device for
  71  * performing DMA.  This function allocates pages, and will
  72  * return the CPU-viewed address, and sets @handle to be the
  73  * device-viewed address.
  74  */
  75 extern void *
  76 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
  77
  78 /**
  79  * dma_free_coherent - free memory allocated by dma_alloc_coherent
  80  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  81  * @size: size of memory originally requested in dma_alloc_coherent
  82  * @cpu_addr: CPU-view address returned from dma_alloc_coherent
  83  * @handle: device-view address returned from dma_alloc_coherent
  84  *
  85  * Free (and unmap) a DMA buffer previously allocated by
  86  * dma_alloc_coherent().
  87  *
  88  * References to memory and mappings associated with cpu_addr/handle
  89  * during and after this call executing are illegal.
  90  */
  91 extern void
  92 dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
  93                   dma_addr_t handle);
  94
  95 /**
  96  * dma_mmap_coherent - map a coherent DMA allocation into user space
  97  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  98  * @vma: vm_area_struct describing requested user mapping
  99  * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
 100  * @handle: device-view address returned from dma_alloc_coherent
 101  * @size: size of memory originally requested in dma_alloc_coherent
 102  *
 103  * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
 104  * into user space.  The coherent DMA buffer must not be freed by the
 105  * driver until the user space mapping has been released.
 106  */
 107 int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
 108                       void *cpu_addr, dma_addr_t handle, size_t size);
 109
 110
 111 /**
 112  * dma_alloc_writecombine - allocate writecombining memory for DMA
 113  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 114  * @size: required memory size
 115  * @handle: bus-specific DMA address
 116  *
 117  * Allocate some uncached, buffered memory for a device for
 118  * performing DMA.  This function allocates pages, and will
 119  * return the CPU-viewed address, and sets @handle to be the
 120  * device-viewed address.
 121  */
 122 extern void *
 123 dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
 124
 125 #define dma_free_writecombine(dev,size,cpu_addr,handle) \
 126         dma_free_coherent(dev,size,cpu_addr,handle)
 127
 128 int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
 129                           void *cpu_addr, dma_addr_t handle, size_t size);
 130
 131
 132 /**
 133  * dma_map_single - map a single buffer for streaming DMA
 134  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 135  * @cpu_addr: CPU direct mapped address of buffer
 136  * @size: size of buffer to map
 137  * @dir: DMA transfer direction
 138  *
 139  * Ensure that any data held in the cache is appropriately discarded
 140  * or written back.
 141  *
 142  * The device owns this memory once this call has completed.  The CPU
 143  * can regain ownership by calling dma_unmap_single() or
 144  * dma_sync_single_for_cpu().
 145  */
 146 #ifndef CONFIG_DMABOUNCE
 147 static inline dma_addr_t
 148 dma_map_single(struct device *dev, void *cpu_addr, size_t size,
 149                enum dma_data_direction dir)
 150 {
 151         if (!arch_is_coherent())
 152                 consistent_sync(cpu_addr, size, dir);
 153
 154         return virt_to_dma(dev, (unsigned long)cpu_addr);
 155 }
 156 #else
 157 extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction);
 158 #endif
 159
 160 /**
 161  * dma_map_page - map a portion of a page for streaming DMA
 162  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 163  * @page: page that buffer resides in
 164  * @offset: offset into page for start of buffer
 165  * @size: size of buffer to map
 166  * @dir: DMA transfer direction
 167  *
 168  * Ensure that any data held in the cache is appropriately discarded
 169  * or written back.
 170  *
 171  * The device owns this memory once this call has completed.  The CPU
 172  * can regain ownership by calling dma_unmap_page() or
 173  * dma_sync_single_for_cpu().
 174  */
 175 static inline dma_addr_t
 176 dma_map_page(struct device *dev, struct page *page,
 177              unsigned long offset, size_t size,
 178              enum dma_data_direction dir)
 179 {
 180         return dma_map_single(dev, page_address(page) + offset, size, (int)dir);
 181 }
 182
 183 /**
 184  * dma_unmap_single - unmap a single buffer previously mapped
 185  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 186  * @handle: DMA address of buffer
 187  * @size: size of buffer to map
 188  * @dir: DMA transfer direction
 189  *
 190  * Unmap a single streaming mode DMA translation.  The handle and size
 191  * must match what was provided in the previous dma_map_single() call.
 192  * All other usages are undefined.
 193  *
 194  * After this call, reads by the CPU to the buffer are guaranteed to see
 195  * whatever the device wrote there.
 196  */
 197 #ifndef CONFIG_DMABOUNCE
 198 static inline void
 199 dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size,
 200                  enum dma_data_direction dir)
 201 {
 202         /* nothing to do */
 203 }
 204 #else
 205 extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction);
 206 #endif
 207
 208 /**
 209  * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
 210  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 211  * @handle: DMA address of buffer
 212  * @size: size of buffer to map
 213  * @dir: DMA transfer direction
 214  *
 215  * Unmap a single streaming mode DMA translation.  The handle and size
 216  * must match what was provided in the previous dma_map_single() call.
 217  * All other usages are undefined.
 218  *
 219  * After this call, reads by the CPU to the buffer are guaranteed to see
 220  * whatever the device wrote there.
 221  */
 222 static inline void
 223 dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
 224                enum dma_data_direction dir)
 225 {
 226         dma_unmap_single(dev, handle, size, (int)dir);
 227 }
 228
 229 /**
 230  * dma_map_sg - map a set of SG buffers for streaming mode DMA
 231  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 232  * @sg: list of buffers
 233  * @nents: number of buffers to map
 234  * @dir: DMA transfer direction
 235  *
 236  * Map a set of buffers described by scatterlist in streaming
 237  * mode for DMA.  This is the scatter-gather version of the
 238  * above dma_map_single interface.  Here the scatter gather list
 239  * elements are each tagged with the appropriate dma address
 240  * and length.  They are obtained via sg_dma_{address,length}(SG).
 241  *
 242  * NOTE: An implementation may be able to use a smaller number of
 243  *       DMA address/length pairs than there are SG table elements.
 244  *       (for example via virtual mapping capabilities)
 245  *       The routine returns the number of addr/length pairs actually
 246  *       used, at most nents.
 247  *
 248  * Device ownership issues as mentioned above for dma_map_single are
 249  * the same here.
 250  */
 251 #ifndef CONFIG_DMABOUNCE
 252 static inline int
 253 dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 254            enum dma_data_direction dir)
 255 {
 256         int i;
 257
 258         for (i = 0; i < nents; i++, sg++) {
 259                 char *virt;
 260
 261                 sg->dma_address = page_to_dma(dev, sg->page) + sg->offset;
 262                 virt = page_address(sg->page) + sg->offset;
 263
 264                 if (!arch_is_coherent())
 265                         consistent_sync(virt, sg->length, dir);
 266         }
 267
 268         return nents;
 269 }
 270 #else
 271 extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
 272 #endif
 273
 274 /**
 275  * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
 276  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 277  * @sg: list of buffers
 278  * @nents: number of buffers to map
 279  * @dir: DMA transfer direction
 280  *
 281  * Unmap a set of streaming mode DMA translations.
 282  * Again, CPU read rules concerning calls here are the same as for
 283  * dma_unmap_single() above.
 284  */
 285 #ifndef CONFIG_DMABOUNCE
 286 static inline void
 287 dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
 288              enum dma_data_direction dir)
 289 {
 290
 291         /* nothing to do */
 292 }
 293 #else
 294 extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
 295 #endif
 296
 297
 298 /**
 299  * dma_sync_single_for_cpu
 300  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 301  * @handle: DMA address of buffer
 302  * @size: size of buffer to map
 303  * @dir: DMA transfer direction
 304  *
 305  * Make physical memory consistent for a single streaming mode DMA
 306  * translation after a transfer.
 307  *
 308  * If you perform a dma_map_single() but wish to interrogate the
 309  * buffer using the cpu, yet do not wish to teardown the PCI dma
 310  * mapping, you must call this function before doing so.  At the
 311  * next point you give the PCI dma address back to the card, you
 312  * must first the perform a dma_sync_for_device, and then the
 313  * device again owns the buffer.
 314  */
 315 #ifndef CONFIG_DMABOUNCE
 316 static inline void
 317 dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size,
 318                         enum dma_data_direction dir)
 319 {
 320         if (!arch_is_coherent())
 321                 consistent_sync((void *)dma_to_virt(dev, handle), size, dir);
 322 }
 323
 324 static inline void
 325 dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size,
 326                            enum dma_data_direction dir)
 327 {
 328         if (!arch_is_coherent())
 329                 consistent_sync((void *)dma_to_virt(dev, handle), size, dir);
 330 }
 331 #else
 332 extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction);
 333 extern void dma_sync_single_for_device(struct device*, dma_addr_t, size_t, enum dma_data_direction);
 334 #endif
 335
 336
 337 /**
 338  * dma_sync_sg_for_cpu
 339  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 340  * @sg: list of buffers
 341  * @nents: number of buffers to map
 342  * @dir: DMA transfer direction
 343  *
 344  * Make physical memory consistent for a set of streaming
 345  * mode DMA translations after a transfer.
 346  *
 347  * The same as dma_sync_single_for_* but for a scatter-gather list,
 348  * same rules and usage.
 349  */
 350 #ifndef CONFIG_DMABOUNCE
 351 static inline void
 352 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
 353                     enum dma_data_direction dir)
 354 {
 355         int i;
 356
 357         for (i = 0; i < nents; i++, sg++) {
 358                 char *virt = page_address(sg->page) + sg->offset;
 359                 if (!arch_is_coherent())
 360                         consistent_sync(virt, sg->length, dir);
 361         }
 362 }
 363
 364 static inline void
 365 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
 366                        enum dma_data_direction dir)
 367 {
 368         int i;
 369
 370         for (i = 0; i < nents; i++, sg++) {
 371                 char *virt = page_address(sg->page) + sg->offset;
 372                 if (!arch_is_coherent())
 373                         consistent_sync(virt, sg->length, dir);
 374         }
 375 }
 376 #else
 377 extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction);
 378 extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction);
 379 #endif
 380
 381 #ifdef CONFIG_DMABOUNCE
 382 /*
 383  * For SA-1111, IXP425, and ADI systems  the dma-mapping functions are "magic"
 384  * and utilize bounce buffers as needed to work around limited DMA windows.
 385  *
 386  * On the SA-1111, a bug limits DMA to only certain regions of RAM.
 387  * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
 388  * On some ADI engineering sytems, PCI inbound window is 32MB (12MB total RAM)
 389  *
 390  * The following are helper functions used by the dmabounce subystem
 391  *
 392  */
 393
 394 /**
 395  * dmabounce_register_dev
 396  *
 397  * @dev: valid struct device pointer
 398  * @small_buf_size: size of buffers to use with small buffer pool
 399  * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
 400  *
 401  * This function should be called by low-level platform code to register
 402  * a device as requireing DMA buffer bouncing. The function will allocate
 403  * appropriate DMA pools for the device.
 404  *
 405  */
 406 extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long);
 407
 408 /**
 409  * dmabounce_unregister_dev
 410  *
 411  * @dev: valid struct device pointer
 412  *
 413  * This function should be called by low-level platform code when device
 414  * that was previously registered with dmabounce_register_dev is removed
 415  * from the system.
 416  *
 417  */
 418 extern void dmabounce_unregister_dev(struct device *);
 419
 420 /**
 421  * dma_needs_bounce
 422  *
 423  * @dev: valid struct device pointer
 424  * @dma_handle: dma_handle of unbounced buffer
 425  * @size: size of region being mapped
 426  *
 427  * Platforms that utilize the dmabounce mechanism must implement
 428  * this function.
 429  *
 430  * The dmabounce routines call this function whenever a dma-mapping
 431  * is requested to determine whether a given buffer needs to be bounced
 432  * or not. The function must return 0 if the the buffer is OK for
 433  * DMA access and 1 if the buffer needs to be bounced.
 434  *
 435  */
 436 extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
 437 #endif /* CONFIG_DMABOUNCE */
 438
 439 #endif /* __KERNEL__ */
 440 #endif