1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains quirk handling code for PnP devices
4 * Some devices do not report all their resources, and need to have extra
5 * resources added. This is most easily accomplished at initialisation time
6 * when building up the resource structure for the first time.
8 * Copyright (c) 2000 Peter Denison <peterd@pnd-pc.demon.co.uk>
9 * Copyright (C) 2008 Hewlett-Packard Development Company, L.P.
10 * Bjorn Helgaas <bjorn.helgaas@hp.com>
12 * Heavily based on PCI quirks handling which is
14 * Copyright (c) 1999 Martin Mares <mj@ucw.cz>
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/pci.h>
20 #include <linux/string.h>
21 #include <linux/slab.h>
22 #include <linux/pnp.h>
26 static void quirk_awe32_add_ports(struct pnp_dev
*dev
,
27 struct pnp_option
*option
,
30 struct pnp_option
*new_option
;
32 new_option
= kmalloc(sizeof(struct pnp_option
), GFP_KERNEL
);
34 dev_err(&dev
->dev
, "couldn't add ioport region to option set "
35 "%d\n", pnp_option_set(option
));
39 *new_option
= *option
;
40 new_option
->u
.port
.min
+= offset
;
41 new_option
->u
.port
.max
+= offset
;
42 list_add(&new_option
->list
, &option
->list
);
44 dev_info(&dev
->dev
, "added ioport region %#llx-%#llx to set %d\n",
45 (unsigned long long) new_option
->u
.port
.min
,
46 (unsigned long long) new_option
->u
.port
.max
,
47 pnp_option_set(option
));
50 static void quirk_awe32_resources(struct pnp_dev
*dev
)
52 struct pnp_option
*option
;
53 unsigned int set
= ~0;
56 * Add two extra ioport regions (at offset 0x400 and 0x800 from the
57 * one given) to every dependent option set.
59 list_for_each_entry(option
, &dev
->options
, list
) {
60 if (pnp_option_is_dependent(option
) &&
61 pnp_option_set(option
) != set
) {
62 set
= pnp_option_set(option
);
63 quirk_awe32_add_ports(dev
, option
, 0x800);
64 quirk_awe32_add_ports(dev
, option
, 0x400);
69 static void quirk_cmi8330_resources(struct pnp_dev
*dev
)
71 struct pnp_option
*option
;
75 list_for_each_entry(option
, &dev
->options
, list
) {
76 if (!pnp_option_is_dependent(option
))
79 if (option
->type
== IORESOURCE_IRQ
) {
81 bitmap_zero(irq
->map
.bits
, PNP_IRQ_NR
);
82 __set_bit(5, irq
->map
.bits
);
83 __set_bit(7, irq
->map
.bits
);
84 __set_bit(10, irq
->map
.bits
);
85 dev_info(&dev
->dev
, "set possible IRQs in "
86 "option set %d to 5, 7, 10\n",
87 pnp_option_set(option
));
88 } else if (option
->type
== IORESOURCE_DMA
) {
90 if ((dma
->flags
& IORESOURCE_DMA_TYPE_MASK
) ==
91 IORESOURCE_DMA_8BIT
&&
93 dev_info(&dev
->dev
, "changing possible "
94 "DMA channel mask in option set %d "
95 "from %#02x to 0x0A (1, 3)\n",
96 pnp_option_set(option
), dma
->map
);
103 static void quirk_sb16audio_resources(struct pnp_dev
*dev
)
105 struct pnp_option
*option
;
106 unsigned int prev_option_flags
= ~0, n
= 0;
107 struct pnp_port
*port
;
110 * The default range on the OPL port for these devices is 0x388-0x388.
111 * Here we increase that range so that two such cards can be
114 list_for_each_entry(option
, &dev
->options
, list
) {
115 if (prev_option_flags
!= option
->flags
) {
116 prev_option_flags
= option
->flags
;
120 if (pnp_option_is_dependent(option
) &&
121 option
->type
== IORESOURCE_IO
) {
123 port
= &option
->u
.port
;
124 if (n
== 3 && port
->min
== port
->max
) {
126 dev_info(&dev
->dev
, "increased option port "
127 "range from %#llx-%#llx to "
129 (unsigned long long) port
->min
,
130 (unsigned long long) port
->min
,
131 (unsigned long long) port
->min
,
132 (unsigned long long) port
->max
);
138 static struct pnp_option
*pnp_clone_dependent_set(struct pnp_dev
*dev
,
141 struct pnp_option
*tail
= NULL
, *first_new_option
= NULL
;
142 struct pnp_option
*option
, *new_option
;
145 list_for_each_entry(option
, &dev
->options
, list
) {
146 if (pnp_option_is_dependent(option
))
150 dev_err(&dev
->dev
, "no dependent option sets\n");
154 flags
= pnp_new_dependent_set(dev
, PNP_RES_PRIORITY_FUNCTIONAL
);
155 list_for_each_entry(option
, &dev
->options
, list
) {
156 if (pnp_option_is_dependent(option
) &&
157 pnp_option_set(option
) == set
) {
158 new_option
= kmalloc(sizeof(struct pnp_option
),
161 dev_err(&dev
->dev
, "couldn't clone dependent "
166 *new_option
= *option
;
167 new_option
->flags
= flags
;
168 if (!first_new_option
)
169 first_new_option
= new_option
;
171 list_add(&new_option
->list
, &tail
->list
);
176 return first_new_option
;
180 static void quirk_add_irq_optional_dependent_sets(struct pnp_dev
*dev
)
182 struct pnp_option
*new_option
;
183 unsigned int num_sets
, i
, set
;
186 num_sets
= dev
->num_dependent_sets
;
187 for (i
= 0; i
< num_sets
; i
++) {
188 new_option
= pnp_clone_dependent_set(dev
, i
);
192 set
= pnp_option_set(new_option
);
193 while (new_option
&& pnp_option_set(new_option
) == set
) {
194 if (new_option
->type
== IORESOURCE_IRQ
) {
195 irq
= &new_option
->u
.irq
;
196 irq
->flags
|= IORESOURCE_IRQ_OPTIONAL
;
198 dbg_pnp_show_option(dev
, new_option
);
199 new_option
= list_entry(new_option
->list
.next
,
200 struct pnp_option
, list
);
203 dev_info(&dev
->dev
, "added dependent option set %d (same as "
204 "set %d except IRQ optional)\n", set
, i
);
208 static void quirk_ad1815_mpu_resources(struct pnp_dev
*dev
)
210 struct pnp_option
*option
;
211 struct pnp_irq
*irq
= NULL
;
212 unsigned int independent_irqs
= 0;
214 list_for_each_entry(option
, &dev
->options
, list
) {
215 if (option
->type
== IORESOURCE_IRQ
&&
216 !pnp_option_is_dependent(option
)) {
218 irq
= &option
->u
.irq
;
222 if (independent_irqs
!= 1)
225 irq
->flags
|= IORESOURCE_IRQ_OPTIONAL
;
226 dev_info(&dev
->dev
, "made independent IRQ optional\n");
229 #include <linux/pci.h>
231 static void quirk_system_pci_resources(struct pnp_dev
*dev
)
233 struct pci_dev
*pdev
= NULL
;
234 struct resource
*res
;
235 resource_size_t pnp_start
, pnp_end
, pci_start
, pci_end
;
239 * Some BIOSes have PNP motherboard devices with resources that
240 * partially overlap PCI BARs. The PNP system driver claims these
241 * motherboard resources, which prevents the normal PCI driver from
242 * requesting them later.
244 * This patch disables the PNP resources that conflict with PCI BARs
245 * so they won't be claimed by the PNP system driver.
247 for_each_pci_dev(pdev
) {
248 for (i
= 0; i
< DEVICE_COUNT_RESOURCE
; i
++) {
249 unsigned long flags
, type
;
251 flags
= pci_resource_flags(pdev
, i
);
252 type
= flags
& (IORESOURCE_IO
| IORESOURCE_MEM
);
253 if (!type
|| pci_resource_len(pdev
, i
) == 0)
256 if (flags
& IORESOURCE_UNSET
)
259 pci_start
= pci_resource_start(pdev
, i
);
260 pci_end
= pci_resource_end(pdev
, i
);
262 (res
= pnp_get_resource(dev
, type
, j
)); j
++) {
263 if (res
->start
== 0 && res
->end
== 0)
266 pnp_start
= res
->start
;
270 * If the PNP region doesn't overlap the PCI
271 * region at all, there's no problem.
273 if (pnp_end
< pci_start
|| pnp_start
> pci_end
)
277 * If the PNP region completely encloses (or is
278 * at least as large as) the PCI region, that's
279 * also OK. For example, this happens when the
280 * PNP device describes a bridge with PCI
283 if (pnp_start
<= pci_start
&&
288 * Otherwise, the PNP region overlaps *part* of
289 * the PCI region, and that might prevent a PCI
290 * driver from requesting its resources.
293 "disabling %pR because it overlaps "
294 "%s BAR %d %pR\n", res
,
295 pci_name(pdev
), i
, &pdev
->resource
[i
]);
296 res
->flags
|= IORESOURCE_DISABLED
;
304 #include <asm/amd_nb.h>
306 static void quirk_amd_mmconfig_area(struct pnp_dev
*dev
)
308 resource_size_t start
, end
;
309 struct pnp_resource
*pnp_res
;
310 struct resource
*res
;
311 struct resource mmconfig_res
, *mmconfig
;
313 mmconfig
= amd_get_mmconfig_range(&mmconfig_res
);
317 list_for_each_entry(pnp_res
, &dev
->resources
, list
) {
319 if (res
->end
< mmconfig
->start
|| res
->start
> mmconfig
->end
||
320 (res
->start
== mmconfig
->start
&& res
->end
== mmconfig
->end
))
323 dev_info(&dev
->dev
, FW_BUG
324 "%pR covers only part of AMD MMCONFIG area %pR; adding more reservations\n",
326 if (mmconfig
->start
< res
->start
) {
327 start
= mmconfig
->start
;
328 end
= res
->start
- 1;
329 pnp_add_mem_resource(dev
, start
, end
, 0);
331 if (mmconfig
->end
> res
->end
) {
332 start
= res
->end
+ 1;
334 pnp_add_mem_resource(dev
, start
, end
, 0);
342 /* Device IDs of parts that have 32KB MCH space */
343 static const unsigned int mch_quirk_devices
[] = {
344 0x0154, /* Ivy Bridge */
345 0x0a04, /* Haswell-ULT */
346 0x0c00, /* Haswell */
347 0x1604, /* Broadwell */
350 static struct pci_dev
*get_intel_host(void)
353 struct pci_dev
*host
;
355 for (i
= 0; i
< ARRAY_SIZE(mch_quirk_devices
); i
++) {
356 host
= pci_get_device(PCI_VENDOR_ID_INTEL
, mch_quirk_devices
[i
],
364 static void quirk_intel_mch(struct pnp_dev
*dev
)
366 struct pci_dev
*host
;
367 u32 addr_lo
, addr_hi
;
368 struct pci_bus_region region
;
370 struct pnp_resource
*pnp_res
;
371 struct resource
*res
;
373 host
= get_intel_host();
378 * MCHBAR is not an architected PCI BAR, so MCH space is usually
379 * reported as a PNP0C02 resource. The MCH space was originally
380 * 16KB, but is 32KB in newer parts. Some BIOSes still report a
381 * PNP0C02 resource that is only 16KB, which means the rest of the
382 * MCH space is consumed but unreported.
386 * Read MCHBAR for Host Member Mapped Register Range Base
387 * https://www-ssl.intel.com/content/www/us/en/processors/core/4th-gen-core-family-desktop-vol-2-datasheet
390 pci_read_config_dword(host
, 0x48, &addr_lo
);
391 region
.start
= addr_lo
& ~0x7fff;
392 pci_read_config_dword(host
, 0x4c, &addr_hi
);
393 region
.start
|= (u64
) addr_hi
<< 32;
394 region
.end
= region
.start
+ 32*1024 - 1;
396 memset(&mch
, 0, sizeof(mch
));
397 mch
.flags
= IORESOURCE_MEM
;
398 pcibios_bus_to_resource(host
->bus
, &mch
, ®ion
);
400 list_for_each_entry(pnp_res
, &dev
->resources
, list
) {
402 if (res
->end
< mch
.start
|| res
->start
> mch
.end
)
403 continue; /* no overlap */
404 if (res
->start
== mch
.start
&& res
->end
== mch
.end
)
405 continue; /* exact match */
407 dev_info(&dev
->dev
, FW_BUG
"PNP resource %pR covers only part of %s Intel MCH; extending to %pR\n",
408 res
, pci_name(host
), &mch
);
409 res
->start
= mch
.start
;
420 * Cards or devices that need some tweaking due to incomplete resource info
423 static struct pnp_fixup pnp_fixups
[] = {
424 /* Soundblaster awe io port quirk */
425 {"CTL0021", quirk_awe32_resources
},
426 {"CTL0022", quirk_awe32_resources
},
427 {"CTL0023", quirk_awe32_resources
},
428 /* CMI 8330 interrupt and dma fix */
429 {"@X@0001", quirk_cmi8330_resources
},
430 /* Soundblaster audio device io port range quirk */
431 {"CTL0001", quirk_sb16audio_resources
},
432 {"CTL0031", quirk_sb16audio_resources
},
433 {"CTL0041", quirk_sb16audio_resources
},
434 {"CTL0042", quirk_sb16audio_resources
},
435 {"CTL0043", quirk_sb16audio_resources
},
436 {"CTL0044", quirk_sb16audio_resources
},
437 {"CTL0045", quirk_sb16audio_resources
},
438 /* Add IRQ-optional MPU options */
439 {"ADS7151", quirk_ad1815_mpu_resources
},
440 {"ADS7181", quirk_add_irq_optional_dependent_sets
},
441 {"AZT0002", quirk_add_irq_optional_dependent_sets
},
442 /* PnP resources that might overlap PCI BARs */
443 {"PNP0c01", quirk_system_pci_resources
},
444 {"PNP0c02", quirk_system_pci_resources
},
446 {"PNP0c01", quirk_amd_mmconfig_area
},
449 {"PNP0c02", quirk_intel_mch
},
454 void pnp_fixup_device(struct pnp_dev
*dev
)
458 for (f
= pnp_fixups
; *f
->id
; f
++) {
459 if (!compare_pnp_id(dev
->id
, f
->id
))
461 pnp_dbg(&dev
->dev
, "%s: calling %pS\n", f
->id
,
463 f
->quirk_function(dev
);