staging: erofs: integrate decompression inplace
[linux/fpc-iii.git] / drivers / tty / serial / 8250 / 8250_lpss.c
blob53ca9ba6ab4b1bd5721fe49f0998658e6dcf1db4
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs
5 * Copyright (C) 2016 Intel Corporation
6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 */
9 #include <linux/bitops.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/rational.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma/dw.h>
17 #include "8250.h"
19 #define PCI_DEVICE_ID_INTEL_QRK_UARTx 0x0936
21 #define PCI_DEVICE_ID_INTEL_BYT_UART1 0x0f0a
22 #define PCI_DEVICE_ID_INTEL_BYT_UART2 0x0f0c
24 #define PCI_DEVICE_ID_INTEL_BSW_UART1 0x228a
25 #define PCI_DEVICE_ID_INTEL_BSW_UART2 0x228c
27 #define PCI_DEVICE_ID_INTEL_BDW_UART1 0x9ce3
28 #define PCI_DEVICE_ID_INTEL_BDW_UART2 0x9ce4
30 /* Intel LPSS specific registers */
32 #define BYT_PRV_CLK 0x800
33 #define BYT_PRV_CLK_EN BIT(0)
34 #define BYT_PRV_CLK_M_VAL_SHIFT 1
35 #define BYT_PRV_CLK_N_VAL_SHIFT 16
36 #define BYT_PRV_CLK_UPDATE BIT(31)
38 #define BYT_TX_OVF_INT 0x820
39 #define BYT_TX_OVF_INT_MASK BIT(1)
41 struct lpss8250;
43 struct lpss8250_board {
44 unsigned long freq;
45 unsigned int base_baud;
46 int (*setup)(struct lpss8250 *, struct uart_port *p);
47 void (*exit)(struct lpss8250 *);
50 struct lpss8250 {
51 int line;
52 struct lpss8250_board *board;
54 /* DMA parameters */
55 struct uart_8250_dma dma;
56 struct dw_dma_chip dma_chip;
57 struct dw_dma_slave dma_param;
58 u8 dma_maxburst;
61 static void byt_set_termios(struct uart_port *p, struct ktermios *termios,
62 struct ktermios *old)
64 unsigned int baud = tty_termios_baud_rate(termios);
65 struct lpss8250 *lpss = p->private_data;
66 unsigned long fref = lpss->board->freq, fuart = baud * 16;
67 unsigned long w = BIT(15) - 1;
68 unsigned long m, n;
69 u32 reg;
71 /* Gracefully handle the B0 case: fall back to B9600 */
72 fuart = fuart ? fuart : 9600 * 16;
74 /* Get Fuart closer to Fref */
75 fuart *= rounddown_pow_of_two(fref / fuart);
78 * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the
79 * dividers must be adjusted.
81 * uartclk = (m / n) * 100 MHz, where m <= n
83 rational_best_approximation(fuart, fref, w, w, &m, &n);
84 p->uartclk = fuart;
86 /* Reset the clock */
87 reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT);
88 writel(reg, p->membase + BYT_PRV_CLK);
89 reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE;
90 writel(reg, p->membase + BYT_PRV_CLK);
92 p->status &= ~UPSTAT_AUTOCTS;
93 if (termios->c_cflag & CRTSCTS)
94 p->status |= UPSTAT_AUTOCTS;
96 serial8250_do_set_termios(p, termios, old);
99 static unsigned int byt_get_mctrl(struct uart_port *port)
101 unsigned int ret = serial8250_do_get_mctrl(port);
103 /* Force DCD and DSR signals to permanently be reported as active */
104 ret |= TIOCM_CAR | TIOCM_DSR;
106 return ret;
109 static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
111 struct dw_dma_slave *param = &lpss->dma_param;
112 struct uart_8250_port *up = up_to_u8250p(port);
113 struct pci_dev *pdev = to_pci_dev(port->dev);
114 unsigned int dma_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
115 struct pci_dev *dma_dev = pci_get_slot(pdev->bus, dma_devfn);
117 switch (pdev->device) {
118 case PCI_DEVICE_ID_INTEL_BYT_UART1:
119 case PCI_DEVICE_ID_INTEL_BSW_UART1:
120 case PCI_DEVICE_ID_INTEL_BDW_UART1:
121 param->src_id = 3;
122 param->dst_id = 2;
123 break;
124 case PCI_DEVICE_ID_INTEL_BYT_UART2:
125 case PCI_DEVICE_ID_INTEL_BSW_UART2:
126 case PCI_DEVICE_ID_INTEL_BDW_UART2:
127 param->src_id = 5;
128 param->dst_id = 4;
129 break;
130 default:
131 return -EINVAL;
134 param->dma_dev = &dma_dev->dev;
135 param->m_master = 0;
136 param->p_master = 1;
138 /* TODO: Detect FIFO size automaticaly for DesignWare 8250 */
139 port->fifosize = 64;
140 up->tx_loadsz = 64;
142 lpss->dma_maxburst = 16;
144 port->set_termios = byt_set_termios;
145 port->get_mctrl = byt_get_mctrl;
147 /* Disable TX counter interrupts */
148 writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT);
150 return 0;
153 #ifdef CONFIG_SERIAL_8250_DMA
154 static const struct dw_dma_platform_data qrk_serial_dma_pdata = {
155 .nr_channels = 2,
156 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
157 .chan_priority = CHAN_PRIORITY_ASCENDING,
158 .block_size = 4095,
159 .nr_masters = 1,
160 .data_width = {4},
161 .multi_block = {0},
164 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port)
166 struct uart_8250_dma *dma = &lpss->dma;
167 struct dw_dma_chip *chip = &lpss->dma_chip;
168 struct dw_dma_slave *param = &lpss->dma_param;
169 struct pci_dev *pdev = to_pci_dev(port->dev);
170 int ret;
172 chip->dev = &pdev->dev;
173 chip->irq = pci_irq_vector(pdev, 0);
174 chip->regs = pci_ioremap_bar(pdev, 1);
175 chip->pdata = &qrk_serial_dma_pdata;
177 /* Falling back to PIO mode if DMA probing fails */
178 ret = dw_dma_probe(chip);
179 if (ret)
180 return;
182 pci_try_set_mwi(pdev);
184 /* Special DMA address for UART */
185 dma->rx_dma_addr = 0xfffff000;
186 dma->tx_dma_addr = 0xfffff000;
188 param->dma_dev = &pdev->dev;
189 param->src_id = 0;
190 param->dst_id = 1;
191 param->hs_polarity = true;
193 lpss->dma_maxburst = 8;
196 static void qrk_serial_exit_dma(struct lpss8250 *lpss)
198 struct dw_dma_slave *param = &lpss->dma_param;
200 if (!param->dma_dev)
201 return;
202 dw_dma_remove(&lpss->dma_chip);
204 #else /* CONFIG_SERIAL_8250_DMA */
205 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {}
206 static void qrk_serial_exit_dma(struct lpss8250 *lpss) {}
207 #endif /* !CONFIG_SERIAL_8250_DMA */
209 static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
211 struct pci_dev *pdev = to_pci_dev(port->dev);
212 int ret;
214 pci_set_master(pdev);
216 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
217 if (ret < 0)
218 return ret;
220 port->irq = pci_irq_vector(pdev, 0);
222 qrk_serial_setup_dma(lpss, port);
223 return 0;
226 static void qrk_serial_exit(struct lpss8250 *lpss)
228 qrk_serial_exit_dma(lpss);
231 static bool lpss8250_dma_filter(struct dma_chan *chan, void *param)
233 struct dw_dma_slave *dws = param;
235 if (dws->dma_dev != chan->device->dev)
236 return false;
238 chan->private = dws;
239 return true;
242 static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port)
244 struct uart_8250_dma *dma = &lpss->dma;
245 struct dw_dma_slave *rx_param, *tx_param;
246 struct device *dev = port->port.dev;
248 if (!lpss->dma_param.dma_dev)
249 return 0;
251 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
252 if (!rx_param)
253 return -ENOMEM;
255 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
256 if (!tx_param)
257 return -ENOMEM;
259 *rx_param = lpss->dma_param;
260 dma->rxconf.src_maxburst = lpss->dma_maxburst;
262 *tx_param = lpss->dma_param;
263 dma->txconf.dst_maxburst = lpss->dma_maxburst;
265 dma->fn = lpss8250_dma_filter;
266 dma->rx_param = rx_param;
267 dma->tx_param = tx_param;
269 port->dma = dma;
270 return 0;
273 static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
275 struct uart_8250_port uart;
276 struct lpss8250 *lpss;
277 int ret;
279 ret = pcim_enable_device(pdev);
280 if (ret)
281 return ret;
283 lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL);
284 if (!lpss)
285 return -ENOMEM;
287 lpss->board = (struct lpss8250_board *)id->driver_data;
289 memset(&uart, 0, sizeof(struct uart_8250_port));
291 uart.port.dev = &pdev->dev;
292 uart.port.irq = pdev->irq;
293 uart.port.private_data = lpss;
294 uart.port.type = PORT_16550A;
295 uart.port.iotype = UPIO_MEM;
296 uart.port.regshift = 2;
297 uart.port.uartclk = lpss->board->base_baud * 16;
298 uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
299 uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE;
300 uart.port.mapbase = pci_resource_start(pdev, 0);
301 uart.port.membase = pcim_iomap(pdev, 0, 0);
302 if (!uart.port.membase)
303 return -ENOMEM;
305 ret = lpss->board->setup(lpss, &uart.port);
306 if (ret)
307 return ret;
309 ret = lpss8250_dma_setup(lpss, &uart);
310 if (ret)
311 goto err_exit;
313 ret = serial8250_register_8250_port(&uart);
314 if (ret < 0)
315 goto err_exit;
317 lpss->line = ret;
319 pci_set_drvdata(pdev, lpss);
320 return 0;
322 err_exit:
323 if (lpss->board->exit)
324 lpss->board->exit(lpss);
325 return ret;
328 static void lpss8250_remove(struct pci_dev *pdev)
330 struct lpss8250 *lpss = pci_get_drvdata(pdev);
332 serial8250_unregister_port(lpss->line);
334 if (lpss->board->exit)
335 lpss->board->exit(lpss);
338 static const struct lpss8250_board byt_board = {
339 .freq = 100000000,
340 .base_baud = 2764800,
341 .setup = byt_serial_setup,
344 static const struct lpss8250_board qrk_board = {
345 .freq = 44236800,
346 .base_baud = 2764800,
347 .setup = qrk_serial_setup,
348 .exit = qrk_serial_exit,
351 #define LPSS_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
353 static const struct pci_device_id pci_ids[] = {
354 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_QRK_UARTx, qrk_board),
355 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BYT_UART1, byt_board),
356 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BYT_UART2, byt_board),
357 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BSW_UART1, byt_board),
358 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BSW_UART2, byt_board),
359 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BDW_UART1, byt_board),
360 LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BDW_UART2, byt_board),
361 { },
363 MODULE_DEVICE_TABLE(pci, pci_ids);
365 static struct pci_driver lpss8250_pci_driver = {
366 .name = "8250_lpss",
367 .id_table = pci_ids,
368 .probe = lpss8250_probe,
369 .remove = lpss8250_remove,
372 module_pci_driver(lpss8250_pci_driver);
374 MODULE_AUTHOR("Intel Corporation");
375 MODULE_LICENSE("GPL v2");
376 MODULE_DESCRIPTION("Intel LPSS UART driver");