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staging: erofs: integrate decompression inplace
[linux/fpc-iii.git] / drivers / tty / serial / 8250 / 8250_mtk.c
blob417c7c810df9bd0d5396dc7a3f37470c5b458bfb
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Mediatek 8250 driver.
4 *
5 * Copyright (c) 2014 MundoReader S.L.
6 * Author: Matthias Brugger <matthias.bgg@gmail.com>
7 */
8 #include <linux/clk.h>
9 #include <linux/io.h>
10 #include <linux/module.h>
11 #include <linux/of_irq.h>
12 #include <linux/of_platform.h>
13 #include <linux/platform_device.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/serial_8250.h>
16 #include <linux/serial_reg.h>
17 #include <linux/console.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/tty.h>
20 #include <linux/tty_flip.h>
21
22 #include "8250.h"
23
24 #define MTK_UART_HIGHS 0x09 /* Highspeed register */
25 #define MTK_UART_SAMPLE_COUNT 0x0a /* Sample count register */
26 #define MTK_UART_SAMPLE_POINT 0x0b /* Sample point register */
27 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
28 #define MTK_UART_ESCAPE_DAT 0x10 /* Escape Character register */
29 #define MTK_UART_ESCAPE_EN 0x11 /* Escape Enable register */
30 #define MTK_UART_DMA_EN 0x13 /* DMA Enable register */
31 #define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */
32 #define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */
33 #define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */
34 #define MTK_UART_IER_XOFFI 0x20 /* Enable XOFF character interrupt */
35 #define MTK_UART_IER_RTSI 0x40 /* Enable RTS Modem status interrupt */
36 #define MTK_UART_IER_CTSI 0x80 /* Enable CTS Modem status interrupt */
37
38 #define MTK_UART_EFR_EN 0x10 /* Enable enhancement feature */
39 #define MTK_UART_EFR_RTS 0x40 /* Enable hardware rx flow control */
40 #define MTK_UART_EFR_CTS 0x80 /* Enable hardware tx flow control */
41 #define MTK_UART_EFR_NO_SW_FC 0x0 /* no sw flow control */
42 #define MTK_UART_EFR_XON1_XOFF1 0xa /* XON1/XOFF1 as sw flow control */
43 #define MTK_UART_EFR_XON2_XOFF2 0x5 /* XON2/XOFF2 as sw flow control */
44 #define MTK_UART_EFR_SW_FC_MASK 0xf /* Enable CTS Modem status interrupt */
45 #define MTK_UART_EFR_HW_FC (MTK_UART_EFR_RTS | MTK_UART_EFR_CTS)
46 #define MTK_UART_DMA_EN_TX 0x2
47 #define MTK_UART_DMA_EN_RX 0x5
48
49 #define MTK_UART_ESCAPE_CHAR 0x77 /* Escape char added under sw fc */
50 #define MTK_UART_TX_SIZE UART_XMIT_SIZE
51 #define MTK_UART_RX_SIZE 0x8000
52 #define MTK_UART_TX_TRIGGER 1
53 #define MTK_UART_RX_TRIGGER MTK_UART_RX_SIZE
54
55 #ifdef CONFIG_SERIAL_8250_DMA
56 enum dma_rx_status {
57 DMA_RX_START = 0,
58 DMA_RX_RUNNING = 1,
59 DMA_RX_SHUTDOWN = 2,
60 };
61 #endif
62
63 struct mtk8250_data {
64 int line;
65 unsigned int rx_pos;
66 unsigned int clk_count;
67 struct clk *uart_clk;
68 struct clk *bus_clk;
69 struct uart_8250_dma *dma;
70 #ifdef CONFIG_SERIAL_8250_DMA
71 enum dma_rx_status rx_status;
72 #endif
73 };
74
75 /* flow control mode */
76 enum {
77 MTK_UART_FC_NONE,
78 MTK_UART_FC_SW,
79 MTK_UART_FC_HW,
80 };
81
82 #ifdef CONFIG_SERIAL_8250_DMA
83 static void mtk8250_rx_dma(struct uart_8250_port *up);
84
85 static void mtk8250_dma_rx_complete(void *param)
86 {
87 struct uart_8250_port *up = param;
88 struct uart_8250_dma *dma = up->dma;
89 struct mtk8250_data *data = up->port.private_data;
90 struct tty_port *tty_port = &up->port.state->port;
91 struct dma_tx_state state;
92 unsigned char *ptr;
93 int copied;
94
95 dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr,
96 dma->rx_size, DMA_FROM_DEVICE);
97
98 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
99
100 if (data->rx_status == DMA_RX_SHUTDOWN)
101 return;
102
103 if ((data->rx_pos + state.residue) <= dma->rx_size) {
104 ptr = (unsigned char *)(data->rx_pos + dma->rx_buf);
105 copied = tty_insert_flip_string(tty_port, ptr, state.residue);
106 } else {
107 ptr = (unsigned char *)(data->rx_pos + dma->rx_buf);
108 copied = tty_insert_flip_string(tty_port, ptr,
109 dma->rx_size - data->rx_pos);
110 ptr = (unsigned char *)(dma->rx_buf);
111 copied += tty_insert_flip_string(tty_port, ptr,
112 data->rx_pos + state.residue - dma->rx_size);
113 }
114 up->port.icount.rx += copied;
115
116 tty_flip_buffer_push(tty_port);
117
118 mtk8250_rx_dma(up);
119 }
120
121 static void mtk8250_rx_dma(struct uart_8250_port *up)
122 {
123 struct uart_8250_dma *dma = up->dma;
124 struct mtk8250_data *data = up->port.private_data;
125 struct dma_async_tx_descriptor *desc;
126 struct dma_tx_state state;
127
128 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
129 dma->rx_size, DMA_DEV_TO_MEM,
130 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
131 if (!desc) {
132 pr_err("failed to prepare rx slave single\n");
133 return;
134 }
135
136 desc->callback = mtk8250_dma_rx_complete;
137 desc->callback_param = up;
138
139 dma->rx_cookie = dmaengine_submit(desc);
140
141 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
142 data->rx_pos = state.residue;
143
144 dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr,
145 dma->rx_size, DMA_FROM_DEVICE);
146
147 dma_async_issue_pending(dma->rxchan);
148 }
149
150 static void mtk8250_dma_enable(struct uart_8250_port *up)
151 {
152 struct uart_8250_dma *dma = up->dma;
153 struct mtk8250_data *data = up->port.private_data;
154 int lcr = serial_in(up, UART_LCR);
155
156 if (data->rx_status != DMA_RX_START)
157 return;
158
159 dma->rxconf.direction = DMA_DEV_TO_MEM;
160 dma->rxconf.src_addr_width = dma->rx_size / 1024;
161 dma->rxconf.src_addr = dma->rx_addr;
162
163 dma->txconf.direction = DMA_MEM_TO_DEV;
164 dma->txconf.dst_addr_width = MTK_UART_TX_SIZE / 1024;
165 dma->txconf.dst_addr = dma->tx_addr;
166
167 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
168 UART_FCR_CLEAR_XMIT);
169 serial_out(up, MTK_UART_DMA_EN,
170 MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX);
171
172 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
173 serial_out(up, UART_EFR, UART_EFR_ECB);
174 serial_out(up, UART_LCR, lcr);
175
176 if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0)
177 pr_err("failed to configure rx dma channel\n");
178 if (dmaengine_slave_config(dma->txchan, &dma->txconf) != 0)
179 pr_err("failed to configure tx dma channel\n");
180
181 data->rx_status = DMA_RX_RUNNING;
182 data->rx_pos = 0;
183 mtk8250_rx_dma(up);
184 }
185 #endif
186
187 static int mtk8250_startup(struct uart_port *port)
188 {
189 #ifdef CONFIG_SERIAL_8250_DMA
190 struct uart_8250_port *up = up_to_u8250p(port);
191 struct mtk8250_data *data = port->private_data;
192
193 /* disable DMA for console */
194 if (uart_console(port))
195 up->dma = NULL;
196
197 if (up->dma) {
198 data->rx_status = DMA_RX_START;
199 uart_circ_clear(&port->state->xmit);
200 }
201 #endif
202 memset(&port->icount, 0, sizeof(port->icount));
203
204 return serial8250_do_startup(port);
205 }
206
207 static void mtk8250_shutdown(struct uart_port *port)
208 {
209 #ifdef CONFIG_SERIAL_8250_DMA
210 struct uart_8250_port *up = up_to_u8250p(port);
211 struct mtk8250_data *data = port->private_data;
212
213 if (up->dma)
214 data->rx_status = DMA_RX_SHUTDOWN;
215 #endif
216
217 return serial8250_do_shutdown(port);
218 }
219
220 static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask)
221 {
222 serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask));
223 }
224
225 static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask)
226 {
227 serial_out(up, UART_IER, serial_in(up, UART_IER) | mask);
228 }
229
230 static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)
231 {
232 struct uart_port *port = &up->port;
233 int lcr = serial_in(up, UART_LCR);
234
235 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
236 serial_out(up, UART_EFR, UART_EFR_ECB);
237 serial_out(up, UART_LCR, lcr);
238 lcr = serial_in(up, UART_LCR);
239
240 switch (mode) {
241 case MTK_UART_FC_NONE:
242 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
243 serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
244 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
245 serial_out(up, UART_EFR, serial_in(up, UART_EFR) &
246 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)));
247 serial_out(up, UART_LCR, lcr);
248 mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI |
249 MTK_UART_IER_RTSI | MTK_UART_IER_CTSI);
250 break;
251
252 case MTK_UART_FC_HW:
253 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
254 serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
255 serial_out(up, UART_MCR, UART_MCR_RTS);
256 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
257
258 /*enable hw flow control*/
259 serial_out(up, UART_EFR, MTK_UART_EFR_HW_FC |
260 (serial_in(up, UART_EFR) &
261 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
262
263 serial_out(up, UART_LCR, lcr);
264 mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI);
265 mtk8250_enable_intrs(up, MTK_UART_IER_CTSI | MTK_UART_IER_RTSI);
266 break;
267
268 case MTK_UART_FC_SW: /*MTK software flow control */
269 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
270 serial_out(up, MTK_UART_ESCAPE_EN, 0x01);
271 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
272
273 /*enable sw flow control */
274 serial_out(up, UART_EFR, MTK_UART_EFR_XON1_XOFF1 |
275 (serial_in(up, UART_EFR) &
276 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
277
278 serial_out(up, UART_XON1, START_CHAR(port->state->port.tty));
279 serial_out(up, UART_XOFF1, STOP_CHAR(port->state->port.tty));
280 serial_out(up, UART_LCR, lcr);
281 mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI);
282 mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI);
283 break;
284 default:
285 break;
286 }
287 }
288
289 static void
290 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
291 struct ktermios *old)
292 {
293 unsigned short fraction_L_mapping[] = {
294 0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF
295 };
296 unsigned short fraction_M_mapping[] = {
297 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3
298 };
299 struct uart_8250_port *up = up_to_u8250p(port);
300 unsigned int baud, quot, fraction;
301 unsigned long flags;
302 int mode;
303
304 #ifdef CONFIG_SERIAL_8250_DMA
305 if (up->dma) {
306 if (uart_console(port)) {
307 devm_kfree(up->port.dev, up->dma);
308 up->dma = NULL;
309 } else {
310 mtk8250_dma_enable(up);
311 }
312 }
313 #endif
314
315 serial8250_do_set_termios(port, termios, old);
316
317 /*
318 * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS)
319 *
320 * We need to recalcualte the quot register, as the claculation depends
321 * on the vaule in the highspeed register.
322 *
323 * Some baudrates are not supported by the chip, so we use the next
324 * lower rate supported and update termios c_flag.
325 *
326 * If highspeed register is set to 3, we need to specify sample count
327 * and sample point to increase accuracy. If not, we reset the
328 * registers to their default values.
329 */
330 baud = uart_get_baud_rate(port, termios, old,
331 port->uartclk / 16 / UART_DIV_MAX,
332 port->uartclk);
333
334 if (baud < 115200) {
335 serial_port_out(port, MTK_UART_HIGHS, 0x0);
336 quot = uart_get_divisor(port, baud);
337 } else {
338 serial_port_out(port, MTK_UART_HIGHS, 0x3);
339 quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
340 }
341
342 /*
343 * Ok, we're now changing the port state. Do it with
344 * interrupts disabled.
345 */
346 spin_lock_irqsave(&port->lock, flags);
347
348 /* set DLAB we have cval saved in up->lcr from the call to the core */
349 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
350 serial_dl_write(up, quot);
351
352 /* reset DLAB */
353 serial_port_out(port, UART_LCR, up->lcr);
354
355 if (baud >= 115200) {
356 unsigned int tmp;
357
358 tmp = (port->uartclk / (baud * quot)) - 1;
359 serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp);
360 serial_port_out(port, MTK_UART_SAMPLE_POINT,
361 (tmp >> 1) - 1);
362
363 /*count fraction to set fractoin register */
364 fraction = ((port->uartclk * 100) / baud / quot) % 100;
365 fraction = DIV_ROUND_CLOSEST(fraction, 10);
366 serial_port_out(port, MTK_UART_FRACDIV_L,
367 fraction_L_mapping[fraction]);
368 serial_port_out(port, MTK_UART_FRACDIV_M,
369 fraction_M_mapping[fraction]);
370 } else {
371 serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00);
372 serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff);
373 serial_port_out(port, MTK_UART_FRACDIV_L, 0x00);
374 serial_port_out(port, MTK_UART_FRACDIV_M, 0x00);
375 }
376
377 if ((termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & CRTSCTS)))
378 mode = MTK_UART_FC_HW;
379 else if (termios->c_iflag & CRTSCTS)
380 mode = MTK_UART_FC_SW;
381 else
382 mode = MTK_UART_FC_NONE;
383
384 mtk8250_set_flow_ctrl(up, mode);
385
386 if (uart_console(port))
387 up->port.cons->cflag = termios->c_cflag;
388
389 spin_unlock_irqrestore(&port->lock, flags);
390 /* Don't rewrite B0 */
391 if (tty_termios_baud_rate(termios))
392 tty_termios_encode_baud_rate(termios, baud, baud);
393 }
394
395 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
396 {
397 struct mtk8250_data *data = dev_get_drvdata(dev);
398
399 clk_disable_unprepare(data->uart_clk);
400 clk_disable_unprepare(data->bus_clk);
401
402 return 0;
403 }
404
405 static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
406 {
407 struct mtk8250_data *data = dev_get_drvdata(dev);
408 int err;
409
410 err = clk_prepare_enable(data->uart_clk);
411 if (err) {
412 dev_warn(dev, "Can't enable clock\n");
413 return err;
414 }
415
416 err = clk_prepare_enable(data->bus_clk);
417 if (err) {
418 dev_warn(dev, "Can't enable bus clock\n");
419 return err;
420 }
421
422 return 0;
423 }
424
425 static void
426 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
427 {
428 if (!state)
429 pm_runtime_get_sync(port->dev);
430
431 serial8250_do_pm(port, state, old);
432
433 if (state)
434 pm_runtime_put_sync_suspend(port->dev);
435 }
436
437 #ifdef CONFIG_SERIAL_8250_DMA
438 static bool mtk8250_dma_filter(struct dma_chan *chan, void *param)
439 {
440 return false;
441 }
442 #endif
443
444 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
445 struct mtk8250_data *data)
446 {
447 #ifdef CONFIG_SERIAL_8250_DMA
448 int dmacnt;
449 #endif
450
451 data->uart_clk = devm_clk_get(&pdev->dev, "baud");
452 if (IS_ERR(data->uart_clk)) {
453 /*
454 * For compatibility with older device trees try unnamed
455 * clk when no baud clk can be found.
456 */
457 data->uart_clk = devm_clk_get(&pdev->dev, NULL);
458 if (IS_ERR(data->uart_clk)) {
459 dev_warn(&pdev->dev, "Can't get uart clock\n");
460 return PTR_ERR(data->uart_clk);
461 }
462
463 return 0;
464 }
465
466 data->bus_clk = devm_clk_get(&pdev->dev, "bus");
467 if (IS_ERR(data->bus_clk))
468 return PTR_ERR(data->bus_clk);
469
470 data->dma = NULL;
471 #ifdef CONFIG_SERIAL_8250_DMA
472 dmacnt = of_property_count_strings(pdev->dev.of_node, "dma-names");
473 if (dmacnt == 2) {
474 data->dma = devm_kzalloc(&pdev->dev, sizeof(*data->dma),
475 GFP_KERNEL);
476 if (!data->dma)
477 return -ENOMEM;
478
479 data->dma->fn = mtk8250_dma_filter;
480 data->dma->rx_size = MTK_UART_RX_SIZE;
481 data->dma->rxconf.src_maxburst = MTK_UART_RX_TRIGGER;
482 data->dma->txconf.dst_maxburst = MTK_UART_TX_TRIGGER;
483 }
484 #endif
485
486 return 0;
487 }
488
489 static int mtk8250_probe(struct platform_device *pdev)
490 {
491 struct uart_8250_port uart = {};
492 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
493 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
494 struct mtk8250_data *data;
495 int err;
496
497 if (!regs || !irq) {
498 dev_err(&pdev->dev, "no registers/irq defined\n");
499 return -EINVAL;
500 }
501
502 uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
503 resource_size(regs));
504 if (!uart.port.membase)
505 return -ENOMEM;
506
507 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
508 if (!data)
509 return -ENOMEM;
510
511 if (pdev->dev.of_node) {
512 err = mtk8250_probe_of(pdev, &uart.port, data);
513 if (err)
514 return err;
515 } else
516 return -ENODEV;
517
518 spin_lock_init(&uart.port.lock);
519 uart.port.mapbase = regs->start;
520 uart.port.irq = irq->start;
521 uart.port.pm = mtk8250_do_pm;
522 uart.port.type = PORT_16550;
523 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
524 uart.port.dev = &pdev->dev;
525 uart.port.iotype = UPIO_MEM32;
526 uart.port.regshift = 2;
527 uart.port.private_data = data;
528 uart.port.shutdown = mtk8250_shutdown;
529 uart.port.startup = mtk8250_startup;
530 uart.port.set_termios = mtk8250_set_termios;
531 uart.port.uartclk = clk_get_rate(data->uart_clk);
532 #ifdef CONFIG_SERIAL_8250_DMA
533 if (data->dma)
534 uart.dma = data->dma;
535 #endif
536
537 /* Disable Rate Fix function */
538 writel(0x0, uart.port.membase +
539 (MTK_UART_RATE_FIX << uart.port.regshift));
540
541 platform_set_drvdata(pdev, data);
542
543 err = mtk8250_runtime_resume(&pdev->dev);
544 if (err)
545 return err;
546
547 data->line = serial8250_register_8250_port(&uart);
548 if (data->line < 0)
549 return data->line;
550
551 pm_runtime_set_active(&pdev->dev);
552 pm_runtime_enable(&pdev->dev);
553
554 return 0;
555 }
556
557 static int mtk8250_remove(struct platform_device *pdev)
558 {
559 struct mtk8250_data *data = platform_get_drvdata(pdev);
560
561 pm_runtime_get_sync(&pdev->dev);
562
563 serial8250_unregister_port(data->line);
564 mtk8250_runtime_suspend(&pdev->dev);
565
566 pm_runtime_disable(&pdev->dev);
567 pm_runtime_put_noidle(&pdev->dev);
568
569 return 0;
570 }
571
572 static int __maybe_unused mtk8250_suspend(struct device *dev)
573 {
574 struct mtk8250_data *data = dev_get_drvdata(dev);
575
576 serial8250_suspend_port(data->line);
577
578 return 0;
579 }
580
581 static int __maybe_unused mtk8250_resume(struct device *dev)
582 {
583 struct mtk8250_data *data = dev_get_drvdata(dev);
584
585 serial8250_resume_port(data->line);
586
587 return 0;
588 }
589
590 static const struct dev_pm_ops mtk8250_pm_ops = {
591 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
592 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
593 NULL)
594 };
595
596 static const struct of_device_id mtk8250_of_match[] = {
597 { .compatible = "mediatek,mt6577-uart" },
598 { /* Sentinel */ }
599 };
600 MODULE_DEVICE_TABLE(of, mtk8250_of_match);
601
602 static struct platform_driver mtk8250_platform_driver = {
603 .driver = {
604 .name = "mt6577-uart",
605 .pm = &mtk8250_pm_ops,
606 .of_match_table = mtk8250_of_match,
607 },
608 .probe = mtk8250_probe,
609 .remove = mtk8250_remove,
610 };
611 module_platform_driver(mtk8250_platform_driver);
612
613 #ifdef CONFIG_SERIAL_8250_CONSOLE
614 static int __init early_mtk8250_setup(struct earlycon_device *device,
615 const char *options)
616 {
617 if (!device->port.membase)
618 return -ENODEV;
619
620 device->port.iotype = UPIO_MEM32;
621
622 return early_serial8250_setup(device, NULL);
623 }
624
625 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
626 #endif
627
628 MODULE_AUTHOR("Matthias Brugger");
629 MODULE_LICENSE("GPL");
630 MODULE_DESCRIPTION("Mediatek 8250 serial port driver");
Linux with added FPC-III support