1 // SPDX-License-Identifier: GPL-2.0+
3 * RDA8810PL serial device driver
5 * Copyright RDA Microelectronics Company Limited
6 * Copyright (c) 2017 Andreas Färber
7 * Copyright (c) 2018 Manivannan Sadhasivam
10 #include <linux/clk.h>
11 #include <linux/console.h>
12 #include <linux/delay.h>
14 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/serial.h>
18 #include <linux/serial_core.h>
19 #include <linux/tty.h>
20 #include <linux/tty_flip.h>
22 #define RDA_UART_PORT_NUM 3
23 #define RDA_UART_DEV_NAME "ttyRDA"
25 #define RDA_UART_CTRL 0x00
26 #define RDA_UART_STATUS 0x04
27 #define RDA_UART_RXTX_BUFFER 0x08
28 #define RDA_UART_IRQ_MASK 0x0c
29 #define RDA_UART_IRQ_CAUSE 0x10
30 #define RDA_UART_IRQ_TRIGGERS 0x14
31 #define RDA_UART_CMD_SET 0x18
32 #define RDA_UART_CMD_CLR 0x1c
35 #define RDA_UART_ENABLE BIT(0)
36 #define RDA_UART_DBITS_8 BIT(1)
37 #define RDA_UART_TX_SBITS_2 BIT(2)
38 #define RDA_UART_PARITY_EN BIT(3)
39 #define RDA_UART_PARITY(x) (((x) & 0x3) << 4)
40 #define RDA_UART_PARITY_ODD RDA_UART_PARITY(0)
41 #define RDA_UART_PARITY_EVEN RDA_UART_PARITY(1)
42 #define RDA_UART_PARITY_SPACE RDA_UART_PARITY(2)
43 #define RDA_UART_PARITY_MARK RDA_UART_PARITY(3)
44 #define RDA_UART_DIV_MODE BIT(20)
45 #define RDA_UART_IRDA_EN BIT(21)
46 #define RDA_UART_DMA_EN BIT(22)
47 #define RDA_UART_FLOW_CNT_EN BIT(23)
48 #define RDA_UART_LOOP_BACK_EN BIT(24)
49 #define RDA_UART_RX_LOCK_ERR BIT(25)
50 #define RDA_UART_RX_BREAK_LEN(x) (((x) & 0xf) << 28)
52 /* UART_STATUS Bits */
53 #define RDA_UART_RX_FIFO(x) (((x) & 0x7f) << 0)
54 #define RDA_UART_RX_FIFO_MASK (0x7f << 0)
55 #define RDA_UART_TX_FIFO(x) (((x) & 0x1f) << 8)
56 #define RDA_UART_TX_FIFO_MASK (0x1f << 8)
57 #define RDA_UART_TX_ACTIVE BIT(14)
58 #define RDA_UART_RX_ACTIVE BIT(15)
59 #define RDA_UART_RX_OVERFLOW_ERR BIT(16)
60 #define RDA_UART_TX_OVERFLOW_ERR BIT(17)
61 #define RDA_UART_RX_PARITY_ERR BIT(18)
62 #define RDA_UART_RX_FRAMING_ERR BIT(19)
63 #define RDA_UART_RX_BREAK_INT BIT(20)
64 #define RDA_UART_DCTS BIT(24)
65 #define RDA_UART_CTS BIT(25)
66 #define RDA_UART_DTR BIT(28)
67 #define RDA_UART_CLK_ENABLED BIT(31)
69 /* UART_RXTX_BUFFER Bits */
70 #define RDA_UART_RX_DATA(x) (((x) & 0xff) << 0)
71 #define RDA_UART_TX_DATA(x) (((x) & 0xff) << 0)
73 /* UART_IRQ_MASK Bits */
74 #define RDA_UART_TX_MODEM_STATUS BIT(0)
75 #define RDA_UART_RX_DATA_AVAILABLE BIT(1)
76 #define RDA_UART_TX_DATA_NEEDED BIT(2)
77 #define RDA_UART_RX_TIMEOUT BIT(3)
78 #define RDA_UART_RX_LINE_ERR BIT(4)
79 #define RDA_UART_TX_DMA_DONE BIT(5)
80 #define RDA_UART_RX_DMA_DONE BIT(6)
81 #define RDA_UART_RX_DMA_TIMEOUT BIT(7)
82 #define RDA_UART_DTR_RISE BIT(8)
83 #define RDA_UART_DTR_FALL BIT(9)
85 /* UART_IRQ_CAUSE Bits */
86 #define RDA_UART_TX_MODEM_STATUS_U BIT(16)
87 #define RDA_UART_RX_DATA_AVAILABLE_U BIT(17)
88 #define RDA_UART_TX_DATA_NEEDED_U BIT(18)
89 #define RDA_UART_RX_TIMEOUT_U BIT(19)
90 #define RDA_UART_RX_LINE_ERR_U BIT(20)
91 #define RDA_UART_TX_DMA_DONE_U BIT(21)
92 #define RDA_UART_RX_DMA_DONE_U BIT(22)
93 #define RDA_UART_RX_DMA_TIMEOUT_U BIT(23)
94 #define RDA_UART_DTR_RISE_U BIT(24)
95 #define RDA_UART_DTR_FALL_U BIT(25)
97 /* UART_TRIGGERS Bits */
98 #define RDA_UART_RX_TRIGGER(x) (((x) & 0x1f) << 0)
99 #define RDA_UART_TX_TRIGGER(x) (((x) & 0xf) << 8)
100 #define RDA_UART_AFC_LEVEL(x) (((x) & 0x1f) << 16)
102 /* UART_CMD_SET Bits */
103 #define RDA_UART_RI BIT(0)
104 #define RDA_UART_DCD BIT(1)
105 #define RDA_UART_DSR BIT(2)
106 #define RDA_UART_TX_BREAK_CONTROL BIT(3)
107 #define RDA_UART_TX_FINISH_N_WAIT BIT(4)
108 #define RDA_UART_RTS BIT(5)
109 #define RDA_UART_RX_FIFO_RESET BIT(6)
110 #define RDA_UART_TX_FIFO_RESET BIT(7)
112 #define RDA_UART_TX_FIFO_SIZE 16
114 static struct uart_driver rda_uart_driver
;
116 struct rda_uart_port
{
117 struct uart_port port
;
121 #define to_rda_uart_port(port) container_of(port, struct rda_uart_port, port)
123 static struct rda_uart_port
*rda_uart_ports
[RDA_UART_PORT_NUM
];
125 static inline void rda_uart_write(struct uart_port
*port
, u32 val
,
128 writel(val
, port
->membase
+ off
);
131 static inline u32
rda_uart_read(struct uart_port
*port
, unsigned int off
)
133 return readl(port
->membase
+ off
);
136 static unsigned int rda_uart_tx_empty(struct uart_port
*port
)
142 spin_lock_irqsave(&port
->lock
, flags
);
144 val
= rda_uart_read(port
, RDA_UART_STATUS
);
145 ret
= (val
& RDA_UART_TX_FIFO_MASK
) ? TIOCSER_TEMT
: 0;
147 spin_unlock_irqrestore(&port
->lock
, flags
);
152 static unsigned int rda_uart_get_mctrl(struct uart_port
*port
)
154 unsigned int mctrl
= 0;
157 cmd_set
= rda_uart_read(port
, RDA_UART_CMD_SET
);
158 status
= rda_uart_read(port
, RDA_UART_STATUS
);
159 if (cmd_set
& RDA_UART_RTS
)
161 if (!(status
& RDA_UART_CTS
))
167 static void rda_uart_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
171 if (mctrl
& TIOCM_RTS
) {
172 val
= rda_uart_read(port
, RDA_UART_CMD_SET
);
173 rda_uart_write(port
, (val
| RDA_UART_RTS
), RDA_UART_CMD_SET
);
175 /* Clear RTS to stop to receive. */
176 val
= rda_uart_read(port
, RDA_UART_CMD_CLR
);
177 rda_uart_write(port
, (val
| RDA_UART_RTS
), RDA_UART_CMD_CLR
);
180 val
= rda_uart_read(port
, RDA_UART_CTRL
);
182 if (mctrl
& TIOCM_LOOP
)
183 val
|= RDA_UART_LOOP_BACK_EN
;
185 val
&= ~RDA_UART_LOOP_BACK_EN
;
187 rda_uart_write(port
, val
, RDA_UART_CTRL
);
190 static void rda_uart_stop_tx(struct uart_port
*port
)
194 val
= rda_uart_read(port
, RDA_UART_IRQ_MASK
);
195 val
&= ~RDA_UART_TX_DATA_NEEDED
;
196 rda_uart_write(port
, val
, RDA_UART_IRQ_MASK
);
198 val
= rda_uart_read(port
, RDA_UART_CMD_SET
);
199 val
|= RDA_UART_TX_FIFO_RESET
;
200 rda_uart_write(port
, val
, RDA_UART_CMD_SET
);
203 static void rda_uart_stop_rx(struct uart_port
*port
)
207 val
= rda_uart_read(port
, RDA_UART_IRQ_MASK
);
208 val
&= ~(RDA_UART_RX_DATA_AVAILABLE
| RDA_UART_RX_TIMEOUT
);
209 rda_uart_write(port
, val
, RDA_UART_IRQ_MASK
);
211 /* Read Rx buffer before reset to avoid Rx timeout interrupt */
212 val
= rda_uart_read(port
, RDA_UART_RXTX_BUFFER
);
214 val
= rda_uart_read(port
, RDA_UART_CMD_SET
);
215 val
|= RDA_UART_RX_FIFO_RESET
;
216 rda_uart_write(port
, val
, RDA_UART_CMD_SET
);
219 static void rda_uart_start_tx(struct uart_port
*port
)
223 if (uart_tx_stopped(port
)) {
224 rda_uart_stop_tx(port
);
228 val
= rda_uart_read(port
, RDA_UART_IRQ_MASK
);
229 val
|= RDA_UART_TX_DATA_NEEDED
;
230 rda_uart_write(port
, val
, RDA_UART_IRQ_MASK
);
233 static void rda_uart_change_baudrate(struct rda_uart_port
*rda_port
,
236 clk_set_rate(rda_port
->clk
, baud
* 8);
239 static void rda_uart_set_termios(struct uart_port
*port
,
240 struct ktermios
*termios
,
241 struct ktermios
*old
)
243 struct rda_uart_port
*rda_port
= to_rda_uart_port(port
);
245 unsigned int ctrl
, cmd_set
, cmd_clr
, triggers
;
249 spin_lock_irqsave(&port
->lock
, flags
);
251 baud
= uart_get_baud_rate(port
, termios
, old
, 9600, port
->uartclk
/ 4);
252 rda_uart_change_baudrate(rda_port
, baud
);
254 ctrl
= rda_uart_read(port
, RDA_UART_CTRL
);
255 cmd_set
= rda_uart_read(port
, RDA_UART_CMD_SET
);
256 cmd_clr
= rda_uart_read(port
, RDA_UART_CMD_CLR
);
258 switch (termios
->c_cflag
& CSIZE
) {
261 dev_warn(port
->dev
, "bit size not supported, using 7 bits\n");
264 ctrl
&= ~RDA_UART_DBITS_8
;
267 ctrl
|= RDA_UART_DBITS_8
;
272 if (termios
->c_cflag
& CSTOPB
)
273 ctrl
|= RDA_UART_TX_SBITS_2
;
275 ctrl
&= ~RDA_UART_TX_SBITS_2
;
278 if (termios
->c_cflag
& PARENB
) {
279 ctrl
|= RDA_UART_PARITY_EN
;
281 /* Mark or Space parity */
282 if (termios
->c_cflag
& CMSPAR
) {
283 if (termios
->c_cflag
& PARODD
)
284 ctrl
|= RDA_UART_PARITY_MARK
;
286 ctrl
|= RDA_UART_PARITY_SPACE
;
287 } else if (termios
->c_cflag
& PARODD
) {
288 ctrl
|= RDA_UART_PARITY_ODD
;
290 ctrl
|= RDA_UART_PARITY_EVEN
;
293 ctrl
&= ~RDA_UART_PARITY_EN
;
296 /* Hardware handshake (RTS/CTS) */
297 if (termios
->c_cflag
& CRTSCTS
) {
298 ctrl
|= RDA_UART_FLOW_CNT_EN
;
299 cmd_set
|= RDA_UART_RTS
;
301 ctrl
&= ~RDA_UART_FLOW_CNT_EN
;
302 cmd_clr
|= RDA_UART_RTS
;
305 ctrl
|= RDA_UART_ENABLE
;
306 ctrl
&= ~RDA_UART_DMA_EN
;
308 triggers
= (RDA_UART_AFC_LEVEL(20) | RDA_UART_RX_TRIGGER(16));
309 irq_mask
= rda_uart_read(port
, RDA_UART_IRQ_MASK
);
310 rda_uart_write(port
, 0, RDA_UART_IRQ_MASK
);
312 rda_uart_write(port
, triggers
, RDA_UART_IRQ_TRIGGERS
);
313 rda_uart_write(port
, ctrl
, RDA_UART_CTRL
);
314 rda_uart_write(port
, cmd_set
, RDA_UART_CMD_SET
);
315 rda_uart_write(port
, cmd_clr
, RDA_UART_CMD_CLR
);
317 rda_uart_write(port
, irq_mask
, RDA_UART_IRQ_MASK
);
319 /* Don't rewrite B0 */
320 if (tty_termios_baud_rate(termios
))
321 tty_termios_encode_baud_rate(termios
, baud
, baud
);
323 /* update the per-port timeout */
324 uart_update_timeout(port
, termios
->c_cflag
, baud
);
326 spin_unlock_irqrestore(&port
->lock
, flags
);
329 static void rda_uart_send_chars(struct uart_port
*port
)
331 struct circ_buf
*xmit
= &port
->state
->xmit
;
335 if (uart_tx_stopped(port
))
339 while (!(rda_uart_read(port
, RDA_UART_STATUS
) &
340 RDA_UART_TX_FIFO_MASK
))
343 rda_uart_write(port
, port
->x_char
, RDA_UART_RXTX_BUFFER
);
348 while (rda_uart_read(port
, RDA_UART_STATUS
) & RDA_UART_TX_FIFO_MASK
) {
349 if (uart_circ_empty(xmit
))
352 ch
= xmit
->buf
[xmit
->tail
];
353 rda_uart_write(port
, ch
, RDA_UART_RXTX_BUFFER
);
354 xmit
->tail
= (xmit
->tail
+ 1) & (SERIAL_XMIT_SIZE
- 1);
358 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
359 uart_write_wakeup(port
);
361 if (!uart_circ_empty(xmit
)) {
362 /* Re-enable Tx FIFO interrupt */
363 val
= rda_uart_read(port
, RDA_UART_IRQ_MASK
);
364 val
|= RDA_UART_TX_DATA_NEEDED
;
365 rda_uart_write(port
, val
, RDA_UART_IRQ_MASK
);
369 static void rda_uart_receive_chars(struct uart_port
*port
)
373 status
= rda_uart_read(port
, RDA_UART_STATUS
);
374 while ((status
& RDA_UART_RX_FIFO_MASK
)) {
375 char flag
= TTY_NORMAL
;
377 if (status
& RDA_UART_RX_PARITY_ERR
) {
378 port
->icount
.parity
++;
382 if (status
& RDA_UART_RX_FRAMING_ERR
) {
383 port
->icount
.frame
++;
387 if (status
& RDA_UART_RX_OVERFLOW_ERR
) {
388 port
->icount
.overrun
++;
392 val
= rda_uart_read(port
, RDA_UART_RXTX_BUFFER
);
396 tty_insert_flip_char(&port
->state
->port
, val
, flag
);
398 status
= rda_uart_read(port
, RDA_UART_STATUS
);
401 spin_unlock(&port
->lock
);
402 tty_flip_buffer_push(&port
->state
->port
);
403 spin_lock(&port
->lock
);
406 static irqreturn_t
rda_interrupt(int irq
, void *dev_id
)
408 struct uart_port
*port
= dev_id
;
412 spin_lock_irqsave(&port
->lock
, flags
);
414 /* Clear IRQ cause */
415 val
= rda_uart_read(port
, RDA_UART_IRQ_CAUSE
);
416 rda_uart_write(port
, val
, RDA_UART_IRQ_CAUSE
);
418 if (val
& (RDA_UART_RX_DATA_AVAILABLE
| RDA_UART_RX_TIMEOUT
))
419 rda_uart_receive_chars(port
);
421 if (val
& (RDA_UART_TX_DATA_NEEDED
)) {
422 irq_mask
= rda_uart_read(port
, RDA_UART_IRQ_MASK
);
423 irq_mask
&= ~RDA_UART_TX_DATA_NEEDED
;
424 rda_uart_write(port
, irq_mask
, RDA_UART_IRQ_MASK
);
426 rda_uart_send_chars(port
);
429 spin_unlock_irqrestore(&port
->lock
, flags
);
434 static int rda_uart_startup(struct uart_port
*port
)
440 spin_lock_irqsave(&port
->lock
, flags
);
441 rda_uart_write(port
, 0, RDA_UART_IRQ_MASK
);
442 spin_unlock_irqrestore(&port
->lock
, flags
);
444 ret
= request_irq(port
->irq
, rda_interrupt
, IRQF_NO_SUSPEND
,
449 spin_lock_irqsave(&port
->lock
, flags
);
451 val
= rda_uart_read(port
, RDA_UART_CTRL
);
452 val
|= RDA_UART_ENABLE
;
453 rda_uart_write(port
, val
, RDA_UART_CTRL
);
455 /* enable rx interrupt */
456 val
= rda_uart_read(port
, RDA_UART_IRQ_MASK
);
457 val
|= (RDA_UART_RX_DATA_AVAILABLE
| RDA_UART_RX_TIMEOUT
);
458 rda_uart_write(port
, val
, RDA_UART_IRQ_MASK
);
460 spin_unlock_irqrestore(&port
->lock
, flags
);
465 static void rda_uart_shutdown(struct uart_port
*port
)
470 spin_lock_irqsave(&port
->lock
, flags
);
472 rda_uart_stop_tx(port
);
473 rda_uart_stop_rx(port
);
475 val
= rda_uart_read(port
, RDA_UART_CTRL
);
476 val
&= ~RDA_UART_ENABLE
;
477 rda_uart_write(port
, val
, RDA_UART_CTRL
);
479 spin_unlock_irqrestore(&port
->lock
, flags
);
482 static const char *rda_uart_type(struct uart_port
*port
)
484 return (port
->type
== PORT_RDA
) ? "rda-uart" : NULL
;
487 static int rda_uart_request_port(struct uart_port
*port
)
489 struct platform_device
*pdev
= to_platform_device(port
->dev
);
490 struct resource
*res
;
492 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
496 if (!devm_request_mem_region(port
->dev
, port
->mapbase
,
497 resource_size(res
), dev_name(port
->dev
)))
500 if (port
->flags
& UPF_IOREMAP
) {
501 port
->membase
= devm_ioremap_nocache(port
->dev
, port
->mapbase
,
510 static void rda_uart_config_port(struct uart_port
*port
, int flags
)
512 unsigned long irq_flags
;
514 if (flags
& UART_CONFIG_TYPE
) {
515 port
->type
= PORT_RDA
;
516 rda_uart_request_port(port
);
519 spin_lock_irqsave(&port
->lock
, irq_flags
);
521 /* Clear mask, so no surprise interrupts. */
522 rda_uart_write(port
, 0, RDA_UART_IRQ_MASK
);
524 /* Clear status register */
525 rda_uart_write(port
, 0, RDA_UART_STATUS
);
527 spin_unlock_irqrestore(&port
->lock
, irq_flags
);
530 static void rda_uart_release_port(struct uart_port
*port
)
532 struct platform_device
*pdev
= to_platform_device(port
->dev
);
533 struct resource
*res
;
535 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
539 if (port
->flags
& UPF_IOREMAP
) {
540 devm_release_mem_region(port
->dev
, port
->mapbase
,
542 devm_iounmap(port
->dev
, port
->membase
);
543 port
->membase
= NULL
;
547 static int rda_uart_verify_port(struct uart_port
*port
,
548 struct serial_struct
*ser
)
550 if (port
->type
!= PORT_RDA
)
553 if (port
->irq
!= ser
->irq
)
559 static const struct uart_ops rda_uart_ops
= {
560 .tx_empty
= rda_uart_tx_empty
,
561 .get_mctrl
= rda_uart_get_mctrl
,
562 .set_mctrl
= rda_uart_set_mctrl
,
563 .start_tx
= rda_uart_start_tx
,
564 .stop_tx
= rda_uart_stop_tx
,
565 .stop_rx
= rda_uart_stop_rx
,
566 .startup
= rda_uart_startup
,
567 .shutdown
= rda_uart_shutdown
,
568 .set_termios
= rda_uart_set_termios
,
569 .type
= rda_uart_type
,
570 .request_port
= rda_uart_request_port
,
571 .release_port
= rda_uart_release_port
,
572 .config_port
= rda_uart_config_port
,
573 .verify_port
= rda_uart_verify_port
,
576 #ifdef CONFIG_SERIAL_RDA_CONSOLE
578 static void rda_console_putchar(struct uart_port
*port
, int ch
)
583 while (!(rda_uart_read(port
, RDA_UART_STATUS
) & RDA_UART_TX_FIFO_MASK
))
586 rda_uart_write(port
, ch
, RDA_UART_RXTX_BUFFER
);
589 static void rda_uart_port_write(struct uart_port
*port
, const char *s
,
596 local_irq_save(flags
);
600 } else if (oops_in_progress
) {
601 locked
= spin_trylock(&port
->lock
);
603 spin_lock(&port
->lock
);
607 old_irq_mask
= rda_uart_read(port
, RDA_UART_IRQ_MASK
);
608 rda_uart_write(port
, 0, RDA_UART_IRQ_MASK
);
610 uart_console_write(port
, s
, count
, rda_console_putchar
);
612 /* wait until all contents have been sent out */
613 while (!(rda_uart_read(port
, RDA_UART_STATUS
) & RDA_UART_TX_FIFO_MASK
))
616 rda_uart_write(port
, old_irq_mask
, RDA_UART_IRQ_MASK
);
619 spin_unlock(&port
->lock
);
621 local_irq_restore(flags
);
624 static void rda_uart_console_write(struct console
*co
, const char *s
,
627 struct rda_uart_port
*rda_port
;
629 rda_port
= rda_uart_ports
[co
->index
];
633 rda_uart_port_write(&rda_port
->port
, s
, count
);
636 static int rda_uart_console_setup(struct console
*co
, char *options
)
638 struct rda_uart_port
*rda_port
;
644 if (co
->index
< 0 || co
->index
>= RDA_UART_PORT_NUM
)
647 rda_port
= rda_uart_ports
[co
->index
];
648 if (!rda_port
|| !rda_port
->port
.membase
)
652 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
654 return uart_set_options(&rda_port
->port
, co
, baud
, parity
, bits
, flow
);
657 static struct console rda_uart_console
= {
658 .name
= RDA_UART_DEV_NAME
,
659 .write
= rda_uart_console_write
,
660 .device
= uart_console_device
,
661 .setup
= rda_uart_console_setup
,
662 .flags
= CON_PRINTBUFFER
,
664 .data
= &rda_uart_driver
,
667 static int __init
rda_uart_console_init(void)
669 register_console(&rda_uart_console
);
673 console_initcall(rda_uart_console_init
);
675 static void rda_uart_early_console_write(struct console
*co
,
679 struct earlycon_device
*dev
= co
->data
;
681 rda_uart_port_write(&dev
->port
, s
, count
);
685 rda_uart_early_console_setup(struct earlycon_device
*device
, const char *opt
)
687 if (!device
->port
.membase
)
690 device
->con
->write
= rda_uart_early_console_write
;
695 OF_EARLYCON_DECLARE(rda
, "rda,8810pl-uart",
696 rda_uart_early_console_setup
);
698 #define RDA_UART_CONSOLE (&rda_uart_console)
700 #define RDA_UART_CONSOLE NULL
701 #endif /* CONFIG_SERIAL_RDA_CONSOLE */
703 static struct uart_driver rda_uart_driver
= {
704 .owner
= THIS_MODULE
,
705 .driver_name
= "rda-uart",
706 .dev_name
= RDA_UART_DEV_NAME
,
707 .nr
= RDA_UART_PORT_NUM
,
708 .cons
= RDA_UART_CONSOLE
,
711 static const struct of_device_id rda_uart_dt_matches
[] = {
712 { .compatible
= "rda,8810pl-uart" },
715 MODULE_DEVICE_TABLE(of
, rda_uart_dt_matches
);
717 static int rda_uart_probe(struct platform_device
*pdev
)
719 struct resource
*res_mem
;
720 struct rda_uart_port
*rda_port
;
723 if (pdev
->dev
.of_node
)
724 pdev
->id
= of_alias_get_id(pdev
->dev
.of_node
, "serial");
726 if (pdev
->id
< 0 || pdev
->id
>= RDA_UART_PORT_NUM
) {
727 dev_err(&pdev
->dev
, "id %d out of range\n", pdev
->id
);
731 res_mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
733 dev_err(&pdev
->dev
, "could not get mem\n");
737 irq
= platform_get_irq(pdev
, 0);
739 dev_err(&pdev
->dev
, "could not get irq\n");
743 if (rda_uart_ports
[pdev
->id
]) {
744 dev_err(&pdev
->dev
, "port %d already allocated\n", pdev
->id
);
748 rda_port
= devm_kzalloc(&pdev
->dev
, sizeof(*rda_port
), GFP_KERNEL
);
752 rda_port
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
753 if (IS_ERR(rda_port
->clk
)) {
754 dev_err(&pdev
->dev
, "could not get clk\n");
755 return PTR_ERR(rda_port
->clk
);
758 rda_port
->port
.dev
= &pdev
->dev
;
759 rda_port
->port
.regshift
= 0;
760 rda_port
->port
.line
= pdev
->id
;
761 rda_port
->port
.type
= PORT_RDA
;
762 rda_port
->port
.iotype
= UPIO_MEM
;
763 rda_port
->port
.mapbase
= res_mem
->start
;
764 rda_port
->port
.irq
= irq
;
765 rda_port
->port
.uartclk
= clk_get_rate(rda_port
->clk
);
766 if (rda_port
->port
.uartclk
== 0) {
767 dev_err(&pdev
->dev
, "clock rate is zero\n");
770 rda_port
->port
.flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
|
772 rda_port
->port
.x_char
= 0;
773 rda_port
->port
.fifosize
= RDA_UART_TX_FIFO_SIZE
;
774 rda_port
->port
.ops
= &rda_uart_ops
;
776 rda_uart_ports
[pdev
->id
] = rda_port
;
777 platform_set_drvdata(pdev
, rda_port
);
779 ret
= uart_add_one_port(&rda_uart_driver
, &rda_port
->port
);
781 rda_uart_ports
[pdev
->id
] = NULL
;
786 static int rda_uart_remove(struct platform_device
*pdev
)
788 struct rda_uart_port
*rda_port
= platform_get_drvdata(pdev
);
790 uart_remove_one_port(&rda_uart_driver
, &rda_port
->port
);
791 rda_uart_ports
[pdev
->id
] = NULL
;
796 static struct platform_driver rda_uart_platform_driver
= {
797 .probe
= rda_uart_probe
,
798 .remove
= rda_uart_remove
,
801 .of_match_table
= rda_uart_dt_matches
,
805 static int __init
rda_uart_init(void)
809 ret
= uart_register_driver(&rda_uart_driver
);
813 ret
= platform_driver_register(&rda_uart_platform_driver
);
815 uart_unregister_driver(&rda_uart_driver
);
820 static void __init
rda_uart_exit(void)
822 platform_driver_unregister(&rda_uart_platform_driver
);
823 uart_unregister_driver(&rda_uart_driver
);
826 module_init(rda_uart_init
);
827 module_exit(rda_uart_exit
);
829 MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
830 MODULE_DESCRIPTION("RDA8810PL serial device driver");
831 MODULE_LICENSE("GPL");