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mac80211: move last_txrate_idx into RC algorithms
[linux/fpc-iii.git] / drivers / net / irda / nsc-ircc.c
blob8583d951a6ad15529fb4c8ec2169865582e5aa6f
1 /*********************************************************************
2 *
3 * Filename: nsc-ircc.c
4 * Version: 1.0
5 * Description: Driver for the NSC PC'108 and PC'338 IrDA chipsets
6 * Status: Stable.
7 * Author: Dag Brattli <dagb@cs.uit.no>
8 * Created at: Sat Nov 7 21:43:15 1998
9 * Modified at: Wed Mar 1 11:29:34 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
11 *
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14 * Copyright (c) 1998 Actisys Corp., www.actisys.com
15 * Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
16 * All Rights Reserved
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * Neither Dag Brattli nor University of Tromsø admit liability nor
24 * provide warranty for any of this software. This material is
25 * provided "AS-IS" and at no charge.
26 *
27 * Notice that all functions that needs to access the chip in _any_
28 * way, must save BSR register on entry, and restore it on exit.
29 * It is _very_ important to follow this policy!
30 *
31 * __u8 bank;
32 *
33 * bank = inb(iobase+BSR);
34 *
35 * do_your_stuff_here();
36 *
37 * outb(bank, iobase+BSR);
38 *
39 * If you find bugs in this file, its very likely that the same bug
40 * will also be in w83977af_ir.c since the implementations are quite
41 * similar.
42 *
43 ********************************************************************/
44
45 #include <linux/module.h>
46
47 #include <linux/kernel.h>
48 #include <linux/types.h>
49 #include <linux/skbuff.h>
50 #include <linux/netdevice.h>
51 #include <linux/ioport.h>
52 #include <linux/delay.h>
53 #include <linux/slab.h>
54 #include <linux/init.h>
55 #include <linux/rtnetlink.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/pnp.h>
58 #include <linux/platform_device.h>
59
60 #include <asm/io.h>
61 #include <asm/dma.h>
62 #include <asm/byteorder.h>
63
64 #include <net/irda/wrapper.h>
65 #include <net/irda/irda.h>
66 #include <net/irda/irda_device.h>
67
68 #include "nsc-ircc.h"
69
70 #define CHIP_IO_EXTENT 8
71 #define BROKEN_DONGLE_ID
72
73 static char *driver_name = "nsc-ircc";
74
75 /* Power Management */
76 #define NSC_IRCC_DRIVER_NAME "nsc-ircc"
77 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
78 static int nsc_ircc_resume(struct platform_device *dev);
79
80 static struct platform_driver nsc_ircc_driver = {
81 .suspend = nsc_ircc_suspend,
82 .resume = nsc_ircc_resume,
83 .driver = {
84 .name = NSC_IRCC_DRIVER_NAME,
85 },
86 };
87
88 /* Module parameters */
89 static int qos_mtt_bits = 0x07; /* 1 ms or more */
90 static int dongle_id;
91
92 /* Use BIOS settions by default, but user may supply module parameters */
93 static unsigned int io[] = { ~0, ~0, ~0, ~0, ~0 };
94 static unsigned int irq[] = { 0, 0, 0, 0, 0 };
95 static unsigned int dma[] = { 0, 0, 0, 0, 0 };
96
97 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
98 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
99 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
100 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
101 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
102 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
103 #ifdef CONFIG_PNP
104 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
105 #endif
106
107 /* These are the known NSC chips */
108 static nsc_chip_t chips[] = {
109 /* Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
110 { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
111 nsc_ircc_probe_108, nsc_ircc_init_108 },
112 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
113 nsc_ircc_probe_338, nsc_ircc_init_338 },
114 /* Contributed by Steffen Pingel - IBM X40 */
115 { "PC8738x", { 0x164e, 0x4e, 0x2e }, 0x20, 0xf4, 0xff,
116 nsc_ircc_probe_39x, nsc_ircc_init_39x },
117 /* Contributed by Jan Frey - IBM A30/A31 */
118 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
119 nsc_ircc_probe_39x, nsc_ircc_init_39x },
120 /* IBM ThinkPads using PC8738x (T60/X60/Z60) */
121 { "IBM-PC8738x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
122 nsc_ircc_probe_39x, nsc_ircc_init_39x },
123 /* IBM ThinkPads using PC8394T (T43/R52/?) */
124 { "IBM-PC8394T", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf9, 0xff,
125 nsc_ircc_probe_39x, nsc_ircc_init_39x },
126 { NULL }
127 };
128
129 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
130
131 static char *dongle_types[] = {
132 "Differential serial interface",
133 "Differential serial interface",
134 "Reserved",
135 "Reserved",
136 "Sharp RY5HD01",
137 "Reserved",
138 "Single-ended serial interface",
139 "Consumer-IR only",
140 "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
141 "IBM31T1100 or Temic TFDS6000/TFDS6500",
142 "Reserved",
143 "Reserved",
144 "HP HSDL-1100/HSDL-2100",
145 "HP HSDL-1100/HSDL-2100",
146 "Supports SIR Mode only",
147 "No dongle connected",
148 };
149
150 /* PNP probing */
151 static chipio_t pnp_info;
152 static const struct pnp_device_id nsc_ircc_pnp_table[] = {
153 { .id = "NSC6001", .driver_data = 0 },
154 { .id = "HWPC224", .driver_data = 0 },
155 { .id = "IBM0071", .driver_data = NSC_FORCE_DONGLE_TYPE9 },
156 { }
157 };
158
159 MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
160
161 static struct pnp_driver nsc_ircc_pnp_driver = {
162 #ifdef CONFIG_PNP
163 .name = "nsc-ircc",
164 .id_table = nsc_ircc_pnp_table,
165 .probe = nsc_ircc_pnp_probe,
166 #endif
167 };
168
169 /* Some prototypes */
170 static int nsc_ircc_open(chipio_t *info);
171 static int nsc_ircc_close(struct nsc_ircc_cb *self);
172 static int nsc_ircc_setup(chipio_t *info);
173 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
174 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
175 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
176 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
177 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
178 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
179 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
180 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
181 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
182 static int nsc_ircc_read_dongle_id (int iobase);
183 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
184
185 static int nsc_ircc_net_open(struct net_device *dev);
186 static int nsc_ircc_net_close(struct net_device *dev);
187 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
188 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
189
190 /* Globals */
191 static int pnp_registered;
192 static int pnp_succeeded;
193
194 /*
195 * Function nsc_ircc_init ()
196 *
197 * Initialize chip. Just try to find out how many chips we are dealing with
198 * and where they are
199 */
200 static int __init nsc_ircc_init(void)
201 {
202 chipio_t info;
203 nsc_chip_t *chip;
204 int ret;
205 int cfg_base;
206 int cfg, id;
207 int reg;
208 int i = 0;
209
210 ret = platform_driver_register(&nsc_ircc_driver);
211 if (ret) {
212 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
213 return ret;
214 }
215
216 /* Register with PnP subsystem to detect disable ports */
217 ret = pnp_register_driver(&nsc_ircc_pnp_driver);
218
219 if (!ret)
220 pnp_registered = 1;
221
222 ret = -ENODEV;
223
224 /* Probe for all the NSC chipsets we know about */
225 for (chip = chips; chip->name ; chip++) {
226 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__,
227 chip->name);
228
229 /* Try all config registers for this chip */
230 for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
231 cfg_base = chip->cfg[cfg];
232 if (!cfg_base)
233 continue;
234
235 /* Read index register */
236 reg = inb(cfg_base);
237 if (reg == 0xff) {
238 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __func__, cfg_base);
239 continue;
240 }
241
242 /* Read chip identification register */
243 outb(chip->cid_index, cfg_base);
244 id = inb(cfg_base+1);
245 if ((id & chip->cid_mask) == chip->cid_value) {
246 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
247 __func__, chip->name, id & ~chip->cid_mask);
248
249 /*
250 * If we found a correct PnP setting,
251 * we first try it.
252 */
253 if (pnp_succeeded) {
254 memset(&info, 0, sizeof(chipio_t));
255 info.cfg_base = cfg_base;
256 info.fir_base = pnp_info.fir_base;
257 info.dma = pnp_info.dma;
258 info.irq = pnp_info.irq;
259
260 if (info.fir_base < 0x2000) {
261 IRDA_MESSAGE("%s, chip->init\n", driver_name);
262 chip->init(chip, &info);
263 } else
264 chip->probe(chip, &info);
265
266 if (nsc_ircc_open(&info) >= 0)
267 ret = 0;
268 }
269
270 /*
271 * Opening based on PnP values failed.
272 * Let's fallback to user values, or probe
273 * the chip.
274 */
275 if (ret) {
276 IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
277 memset(&info, 0, sizeof(chipio_t));
278 info.cfg_base = cfg_base;
279 info.fir_base = io[i];
280 info.dma = dma[i];
281 info.irq = irq[i];
282
283 /*
284 * If the user supplies the base address, then
285 * we init the chip, if not we probe the values
286 * set by the BIOS
287 */
288 if (io[i] < 0x2000) {
289 chip->init(chip, &info);
290 } else
291 chip->probe(chip, &info);
292
293 if (nsc_ircc_open(&info) >= 0)
294 ret = 0;
295 }
296 i++;
297 } else {
298 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __func__, id);
299 }
300 }
301 }
302
303 if (ret) {
304 platform_driver_unregister(&nsc_ircc_driver);
305 pnp_unregister_driver(&nsc_ircc_pnp_driver);
306 pnp_registered = 0;
307 }
308
309 return ret;
310 }
311
312 /*
313 * Function nsc_ircc_cleanup ()
314 *
315 * Close all configured chips
316 *
317 */
318 static void __exit nsc_ircc_cleanup(void)
319 {
320 int i;
321
322 for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
323 if (dev_self[i])
324 nsc_ircc_close(dev_self[i]);
325 }
326
327 platform_driver_unregister(&nsc_ircc_driver);
328
329 if (pnp_registered)
330 pnp_unregister_driver(&nsc_ircc_pnp_driver);
331
332 pnp_registered = 0;
333 }
334
335 /*
336 * Function nsc_ircc_open (iobase, irq)
337 *
338 * Open driver instance
339 *
340 */
341 static int __init nsc_ircc_open(chipio_t *info)
342 {
343 struct net_device *dev;
344 struct nsc_ircc_cb *self;
345 void *ret;
346 int err, chip_index;
347
348 IRDA_DEBUG(2, "%s()\n", __func__);
349
350
351 for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
352 if (!dev_self[chip_index])
353 break;
354 }
355
356 if (chip_index == ARRAY_SIZE(dev_self)) {
357 IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __func__);
358 return -ENOMEM;
359 }
360
361 IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
362 info->cfg_base);
363
364 if ((nsc_ircc_setup(info)) == -1)
365 return -1;
366
367 IRDA_MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
368
369 dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
370 if (dev == NULL) {
371 IRDA_ERROR("%s(), can't allocate memory for "
372 "control block!\n", __func__);
373 return -ENOMEM;
374 }
375
376 self = dev->priv;
377 self->netdev = dev;
378 spin_lock_init(&self->lock);
379
380 /* Need to store self somewhere */
381 dev_self[chip_index] = self;
382 self->index = chip_index;
383
384 /* Initialize IO */
385 self->io.cfg_base = info->cfg_base;
386 self->io.fir_base = info->fir_base;
387 self->io.irq = info->irq;
388 self->io.fir_ext = CHIP_IO_EXTENT;
389 self->io.dma = info->dma;
390 self->io.fifo_size = 32;
391
392 /* Reserve the ioports that we need */
393 ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
394 if (!ret) {
395 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n",
396 __func__, self->io.fir_base);
397 err = -ENODEV;
398 goto out1;
399 }
400
401 /* Initialize QoS for this device */
402 irda_init_max_qos_capabilies(&self->qos);
403
404 /* The only value we must override it the baudrate */
405 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
406 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
407
408 self->qos.min_turn_time.bits = qos_mtt_bits;
409 irda_qos_bits_to_value(&self->qos);
410
411 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
412 self->rx_buff.truesize = 14384;
413 self->tx_buff.truesize = 14384;
414
415 /* Allocate memory if needed */
416 self->rx_buff.head =
417 dma_alloc_coherent(NULL, self->rx_buff.truesize,
418 &self->rx_buff_dma, GFP_KERNEL);
419 if (self->rx_buff.head == NULL) {
420 err = -ENOMEM;
421 goto out2;
422
423 }
424 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
425
426 self->tx_buff.head =
427 dma_alloc_coherent(NULL, self->tx_buff.truesize,
428 &self->tx_buff_dma, GFP_KERNEL);
429 if (self->tx_buff.head == NULL) {
430 err = -ENOMEM;
431 goto out3;
432 }
433 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
434
435 self->rx_buff.in_frame = FALSE;
436 self->rx_buff.state = OUTSIDE_FRAME;
437 self->tx_buff.data = self->tx_buff.head;
438 self->rx_buff.data = self->rx_buff.head;
439
440 /* Reset Tx queue info */
441 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
442 self->tx_fifo.tail = self->tx_buff.head;
443
444 /* Override the network functions we need to use */
445 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
446 dev->open = nsc_ircc_net_open;
447 dev->stop = nsc_ircc_net_close;
448 dev->do_ioctl = nsc_ircc_net_ioctl;
449 dev->get_stats = nsc_ircc_net_get_stats;
450
451 err = register_netdev(dev);
452 if (err) {
453 IRDA_ERROR("%s(), register_netdev() failed!\n", __func__);
454 goto out4;
455 }
456 IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
457
458 /* Check if user has supplied a valid dongle id or not */
459 if ((dongle_id <= 0) ||
460 (dongle_id >= ARRAY_SIZE(dongle_types))) {
461 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
462
463 IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
464 dongle_types[dongle_id]);
465 } else {
466 IRDA_MESSAGE("%s, Using dongle: %s\n", driver_name,
467 dongle_types[dongle_id]);
468 }
469
470 self->io.dongle_id = dongle_id;
471 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
472
473 self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
474 self->index, NULL, 0);
475 if (IS_ERR(self->pldev)) {
476 err = PTR_ERR(self->pldev);
477 goto out5;
478 }
479 platform_set_drvdata(self->pldev, self);
480
481 return chip_index;
482
483 out5:
484 unregister_netdev(dev);
485 out4:
486 dma_free_coherent(NULL, self->tx_buff.truesize,
487 self->tx_buff.head, self->tx_buff_dma);
488 out3:
489 dma_free_coherent(NULL, self->rx_buff.truesize,
490 self->rx_buff.head, self->rx_buff_dma);
491 out2:
492 release_region(self->io.fir_base, self->io.fir_ext);
493 out1:
494 free_netdev(dev);
495 dev_self[chip_index] = NULL;
496 return err;
497 }
498
499 /*
500 * Function nsc_ircc_close (self)
501 *
502 * Close driver instance
503 *
504 */
505 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
506 {
507 int iobase;
508
509 IRDA_DEBUG(4, "%s()\n", __func__);
510
511 IRDA_ASSERT(self != NULL, return -1;);
512
513 iobase = self->io.fir_base;
514
515 platform_device_unregister(self->pldev);
516
517 /* Remove netdevice */
518 unregister_netdev(self->netdev);
519
520 /* Release the PORT that this driver is using */
521 IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
522 __func__, self->io.fir_base);
523 release_region(self->io.fir_base, self->io.fir_ext);
524
525 if (self->tx_buff.head)
526 dma_free_coherent(NULL, self->tx_buff.truesize,
527 self->tx_buff.head, self->tx_buff_dma);
528
529 if (self->rx_buff.head)
530 dma_free_coherent(NULL, self->rx_buff.truesize,
531 self->rx_buff.head, self->rx_buff_dma);
532
533 dev_self[self->index] = NULL;
534 free_netdev(self->netdev);
535
536 return 0;
537 }
538
539 /*
540 * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
541 *
542 * Initialize the NSC '108 chip
543 *
544 */
545 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
546 {
547 int cfg_base = info->cfg_base;
548 __u8 temp=0;
549
550 outb(2, cfg_base); /* Mode Control Register (MCTL) */
551 outb(0x00, cfg_base+1); /* Disable device */
552
553 /* Base Address and Interrupt Control Register (BAIC) */
554 outb(CFG_108_BAIC, cfg_base);
555 switch (info->fir_base) {
556 case 0x3e8: outb(0x14, cfg_base+1); break;
557 case 0x2e8: outb(0x15, cfg_base+1); break;
558 case 0x3f8: outb(0x16, cfg_base+1); break;
559 case 0x2f8: outb(0x17, cfg_base+1); break;
560 default: IRDA_ERROR("%s(), invalid base_address", __func__);
561 }
562
563 /* Control Signal Routing Register (CSRT) */
564 switch (info->irq) {
565 case 3: temp = 0x01; break;
566 case 4: temp = 0x02; break;
567 case 5: temp = 0x03; break;
568 case 7: temp = 0x04; break;
569 case 9: temp = 0x05; break;
570 case 11: temp = 0x06; break;
571 case 15: temp = 0x07; break;
572 default: IRDA_ERROR("%s(), invalid irq", __func__);
573 }
574 outb(CFG_108_CSRT, cfg_base);
575
576 switch (info->dma) {
577 case 0: outb(0x08+temp, cfg_base+1); break;
578 case 1: outb(0x10+temp, cfg_base+1); break;
579 case 3: outb(0x18+temp, cfg_base+1); break;
580 default: IRDA_ERROR("%s(), invalid dma", __func__);
581 }
582
583 outb(CFG_108_MCTL, cfg_base); /* Mode Control Register (MCTL) */
584 outb(0x03, cfg_base+1); /* Enable device */
585
586 return 0;
587 }
588
589 /*
590 * Function nsc_ircc_probe_108 (chip, info)
591 *
592 *
593 *
594 */
595 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
596 {
597 int cfg_base = info->cfg_base;
598 int reg;
599
600 /* Read address and interrupt control register (BAIC) */
601 outb(CFG_108_BAIC, cfg_base);
602 reg = inb(cfg_base+1);
603
604 switch (reg & 0x03) {
605 case 0:
606 info->fir_base = 0x3e8;
607 break;
608 case 1:
609 info->fir_base = 0x2e8;
610 break;
611 case 2:
612 info->fir_base = 0x3f8;
613 break;
614 case 3:
615 info->fir_base = 0x2f8;
616 break;
617 }
618 info->sir_base = info->fir_base;
619 IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__,
620 info->fir_base);
621
622 /* Read control signals routing register (CSRT) */
623 outb(CFG_108_CSRT, cfg_base);
624 reg = inb(cfg_base+1);
625
626 switch (reg & 0x07) {
627 case 0:
628 info->irq = -1;
629 break;
630 case 1:
631 info->irq = 3;
632 break;
633 case 2:
634 info->irq = 4;
635 break;
636 case 3:
637 info->irq = 5;
638 break;
639 case 4:
640 info->irq = 7;
641 break;
642 case 5:
643 info->irq = 9;
644 break;
645 case 6:
646 info->irq = 11;
647 break;
648 case 7:
649 info->irq = 15;
650 break;
651 }
652 IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq);
653
654 /* Currently we only read Rx DMA but it will also be used for Tx */
655 switch ((reg >> 3) & 0x03) {
656 case 0:
657 info->dma = -1;
658 break;
659 case 1:
660 info->dma = 0;
661 break;
662 case 2:
663 info->dma = 1;
664 break;
665 case 3:
666 info->dma = 3;
667 break;
668 }
669 IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma);
670
671 /* Read mode control register (MCTL) */
672 outb(CFG_108_MCTL, cfg_base);
673 reg = inb(cfg_base+1);
674
675 info->enabled = reg & 0x01;
676 info->suspended = !((reg >> 1) & 0x01);
677
678 return 0;
679 }
680
681 /*
682 * Function nsc_ircc_init_338 (chip, info)
683 *
684 * Initialize the NSC '338 chip. Remember that the 87338 needs two
685 * consecutive writes to the data registers while CPU interrupts are
686 * disabled. The 97338 does not require this, but shouldn't be any
687 * harm if we do it anyway.
688 */
689 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
690 {
691 /* No init yet */
692
693 return 0;
694 }
695
696 /*
697 * Function nsc_ircc_probe_338 (chip, info)
698 *
699 *
700 *
701 */
702 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
703 {
704 int cfg_base = info->cfg_base;
705 int reg, com = 0;
706 int pnp;
707
708 /* Read funtion enable register (FER) */
709 outb(CFG_338_FER, cfg_base);
710 reg = inb(cfg_base+1);
711
712 info->enabled = (reg >> 2) & 0x01;
713
714 /* Check if we are in Legacy or PnP mode */
715 outb(CFG_338_PNP0, cfg_base);
716 reg = inb(cfg_base+1);
717
718 pnp = (reg >> 3) & 0x01;
719 if (pnp) {
720 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
721 outb(0x46, cfg_base);
722 reg = (inb(cfg_base+1) & 0xfe) << 2;
723
724 outb(0x47, cfg_base);
725 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
726
727 info->fir_base = reg;
728 } else {
729 /* Read function address register (FAR) */
730 outb(CFG_338_FAR, cfg_base);
731 reg = inb(cfg_base+1);
732
733 switch ((reg >> 4) & 0x03) {
734 case 0:
735 info->fir_base = 0x3f8;
736 break;
737 case 1:
738 info->fir_base = 0x2f8;
739 break;
740 case 2:
741 com = 3;
742 break;
743 case 3:
744 com = 4;
745 break;
746 }
747
748 if (com) {
749 switch ((reg >> 6) & 0x03) {
750 case 0:
751 if (com == 3)
752 info->fir_base = 0x3e8;
753 else
754 info->fir_base = 0x2e8;
755 break;
756 case 1:
757 if (com == 3)
758 info->fir_base = 0x338;
759 else
760 info->fir_base = 0x238;
761 break;
762 case 2:
763 if (com == 3)
764 info->fir_base = 0x2e8;
765 else
766 info->fir_base = 0x2e0;
767 break;
768 case 3:
769 if (com == 3)
770 info->fir_base = 0x220;
771 else
772 info->fir_base = 0x228;
773 break;
774 }
775 }
776 }
777 info->sir_base = info->fir_base;
778
779 /* Read PnP register 1 (PNP1) */
780 outb(CFG_338_PNP1, cfg_base);
781 reg = inb(cfg_base+1);
782
783 info->irq = reg >> 4;
784
785 /* Read PnP register 3 (PNP3) */
786 outb(CFG_338_PNP3, cfg_base);
787 reg = inb(cfg_base+1);
788
789 info->dma = (reg & 0x07) - 1;
790
791 /* Read power and test register (PTR) */
792 outb(CFG_338_PTR, cfg_base);
793 reg = inb(cfg_base+1);
794
795 info->suspended = reg & 0x01;
796
797 return 0;
798 }
799
800
801 /*
802 * Function nsc_ircc_init_39x (chip, info)
803 *
804 * Now that we know it's a '39x (see probe below), we need to
805 * configure it so we can use it.
806 *
807 * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
808 * the configuration of the different functionality (serial, parallel,
809 * floppy...) are each in a different bank (Logical Device Number).
810 * The base address, irq and dma configuration registers are common
811 * to all functionalities (index 0x30 to 0x7F).
812 * There is only one configuration register specific to the
813 * serial port, CFG_39X_SPC.
814 * JeanII
815 *
816 * Note : this code was written by Jan Frey <janfrey@web.de>
817 */
818 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
819 {
820 int cfg_base = info->cfg_base;
821 int enabled;
822
823 /* User is sure about his config... accept it. */
824 IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
825 "io=0x%04x, irq=%d, dma=%d\n",
826 __func__, info->fir_base, info->irq, info->dma);
827
828 /* Access bank for SP2 */
829 outb(CFG_39X_LDN, cfg_base);
830 outb(0x02, cfg_base+1);
831
832 /* Configure SP2 */
833
834 /* We want to enable the device if not enabled */
835 outb(CFG_39X_ACT, cfg_base);
836 enabled = inb(cfg_base+1) & 0x01;
837
838 if (!enabled) {
839 /* Enable the device */
840 outb(CFG_39X_SIOCF1, cfg_base);
841 outb(0x01, cfg_base+1);
842 /* May want to update info->enabled. Jean II */
843 }
844
845 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
846 * power mode (wake up from sleep mode) (bit 1) */
847 outb(CFG_39X_SPC, cfg_base);
848 outb(0x82, cfg_base+1);
849
850 return 0;
851 }
852
853 /*
854 * Function nsc_ircc_probe_39x (chip, info)
855 *
856 * Test if we really have a '39x chip at the given address
857 *
858 * Note : this code was written by Jan Frey <janfrey@web.de>
859 */
860 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
861 {
862 int cfg_base = info->cfg_base;
863 int reg1, reg2, irq, irqt, dma1, dma2;
864 int enabled, susp;
865
866 IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
867 __func__, cfg_base);
868
869 /* This function should be executed with irq off to avoid
870 * another driver messing with the Super I/O bank - Jean II */
871
872 /* Access bank for SP2 */
873 outb(CFG_39X_LDN, cfg_base);
874 outb(0x02, cfg_base+1);
875
876 /* Read infos about SP2 ; store in info struct */
877 outb(CFG_39X_BASEH, cfg_base);
878 reg1 = inb(cfg_base+1);
879 outb(CFG_39X_BASEL, cfg_base);
880 reg2 = inb(cfg_base+1);
881 info->fir_base = (reg1 << 8) | reg2;
882
883 outb(CFG_39X_IRQNUM, cfg_base);
884 irq = inb(cfg_base+1);
885 outb(CFG_39X_IRQSEL, cfg_base);
886 irqt = inb(cfg_base+1);
887 info->irq = irq;
888
889 outb(CFG_39X_DMA0, cfg_base);
890 dma1 = inb(cfg_base+1);
891 outb(CFG_39X_DMA1, cfg_base);
892 dma2 = inb(cfg_base+1);
893 info->dma = dma1 -1;
894
895 outb(CFG_39X_ACT, cfg_base);
896 info->enabled = enabled = inb(cfg_base+1) & 0x01;
897
898 outb(CFG_39X_SPC, cfg_base);
899 susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
900
901 IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __func__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
902
903 /* Configure SP2 */
904
905 /* We want to enable the device if not enabled */
906 outb(CFG_39X_ACT, cfg_base);
907 enabled = inb(cfg_base+1) & 0x01;
908
909 if (!enabled) {
910 /* Enable the device */
911 outb(CFG_39X_SIOCF1, cfg_base);
912 outb(0x01, cfg_base+1);
913 /* May want to update info->enabled. Jean II */
914 }
915
916 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
917 * power mode (wake up from sleep mode) (bit 1) */
918 outb(CFG_39X_SPC, cfg_base);
919 outb(0x82, cfg_base+1);
920
921 return 0;
922 }
923
924 #ifdef CONFIG_PNP
925 /* PNP probing */
926 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
927 {
928 memset(&pnp_info, 0, sizeof(chipio_t));
929 pnp_info.irq = -1;
930 pnp_info.dma = -1;
931 pnp_succeeded = 1;
932
933 if (id->driver_data & NSC_FORCE_DONGLE_TYPE9)
934 dongle_id = 0x9;
935
936 /* There doesn't seem to be any way of getting the cfg_base.
937 * On my box, cfg_base is in the PnP descriptor of the
938 * motherboard. Oh well... Jean II */
939
940 if (pnp_port_valid(dev, 0) &&
941 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
942 pnp_info.fir_base = pnp_port_start(dev, 0);
943
944 if (pnp_irq_valid(dev, 0) &&
945 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
946 pnp_info.irq = pnp_irq(dev, 0);
947
948 if (pnp_dma_valid(dev, 0) &&
949 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
950 pnp_info.dma = pnp_dma(dev, 0);
951
952 IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
953 __func__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
954
955 if((pnp_info.fir_base == 0) ||
956 (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
957 /* Returning an error will disable the device. Yuck ! */
958 //return -EINVAL;
959 pnp_succeeded = 0;
960 }
961
962 return 0;
963 }
964 #endif
965
966 /*
967 * Function nsc_ircc_setup (info)
968 *
969 * Returns non-negative on success.
970 *
971 */
972 static int nsc_ircc_setup(chipio_t *info)
973 {
974 int version;
975 int iobase = info->fir_base;
976
977 /* Read the Module ID */
978 switch_bank(iobase, BANK3);
979 version = inb(iobase+MID);
980
981 IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
982 __func__, driver_name, version);
983
984 /* Should be 0x2? */
985 if (0x20 != (version & 0xf0)) {
986 IRDA_ERROR("%s, Wrong chip version %02x\n",
987 driver_name, version);
988 return -1;
989 }
990
991 /* Switch to advanced mode */
992 switch_bank(iobase, BANK2);
993 outb(ECR1_EXT_SL, iobase+ECR1);
994 switch_bank(iobase, BANK0);
995
996 /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
997 switch_bank(iobase, BANK0);
998 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
999
1000 outb(0x03, iobase+LCR); /* 8 bit word length */
1001 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/
1002
1003 /* Set FIFO size to 32 */
1004 switch_bank(iobase, BANK2);
1005 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1006
1007 /* IRCR2: FEND_MD is not set */
1008 switch_bank(iobase, BANK5);
1009 outb(0x02, iobase+4);
1010
1011 /* Make sure that some defaults are OK */
1012 switch_bank(iobase, BANK6);
1013 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
1014 outb(0x0a, iobase+1); /* Set MIR pulse width */
1015 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
1016 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
1017
1018 /* Enable receive interrupts */
1019 switch_bank(iobase, BANK0);
1020 outb(IER_RXHDL_IE, iobase+IER);
1021
1022 return 0;
1023 }
1024
1025 /*
1026 * Function nsc_ircc_read_dongle_id (void)
1027 *
1028 * Try to read dongle indentification. This procedure needs to be executed
1029 * once after power-on/reset. It also needs to be used whenever you suspect
1030 * that the user may have plugged/unplugged the IrDA Dongle.
1031 */
1032 static int nsc_ircc_read_dongle_id (int iobase)
1033 {
1034 int dongle_id;
1035 __u8 bank;
1036
1037 bank = inb(iobase+BSR);
1038
1039 /* Select Bank 7 */
1040 switch_bank(iobase, BANK7);
1041
1042 /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
1043 outb(0x00, iobase+7);
1044
1045 /* ID0, 1, and 2 are pulled up/down very slowly */
1046 udelay(50);
1047
1048 /* IRCFG1: read the ID bits */
1049 dongle_id = inb(iobase+4) & 0x0f;
1050
1051 #ifdef BROKEN_DONGLE_ID
1052 if (dongle_id == 0x0a)
1053 dongle_id = 0x09;
1054 #endif
1055 /* Go back to bank 0 before returning */
1056 switch_bank(iobase, BANK0);
1057
1058 outb(bank, iobase+BSR);
1059
1060 return dongle_id;
1061 }
1062
1063 /*
1064 * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
1065 *
1066 * This function initializes the dongle for the transceiver that is
1067 * used. This procedure needs to be executed once after
1068 * power-on/reset. It also needs to be used whenever you suspect that
1069 * the dongle is changed.
1070 */
1071 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
1072 {
1073 int bank;
1074
1075 /* Save current bank */
1076 bank = inb(iobase+BSR);
1077
1078 /* Select Bank 7 */
1079 switch_bank(iobase, BANK7);
1080
1081 /* IRCFG4: set according to dongle_id */
1082 switch (dongle_id) {
1083 case 0x00: /* same as */
1084 case 0x01: /* Differential serial interface */
1085 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1086 __func__, dongle_types[dongle_id]);
1087 break;
1088 case 0x02: /* same as */
1089 case 0x03: /* Reserved */
1090 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1091 __func__, dongle_types[dongle_id]);
1092 break;
1093 case 0x04: /* Sharp RY5HD01 */
1094 break;
1095 case 0x05: /* Reserved, but this is what the Thinkpad reports */
1096 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1097 __func__, dongle_types[dongle_id]);
1098 break;
1099 case 0x06: /* Single-ended serial interface */
1100 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1101 __func__, dongle_types[dongle_id]);
1102 break;
1103 case 0x07: /* Consumer-IR only */
1104 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1105 __func__, dongle_types[dongle_id]);
1106 break;
1107 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1108 IRDA_DEBUG(0, "%s(), %s\n",
1109 __func__, dongle_types[dongle_id]);
1110 break;
1111 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1112 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1113 break;
1114 case 0x0A: /* same as */
1115 case 0x0B: /* Reserved */
1116 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1117 __func__, dongle_types[dongle_id]);
1118 break;
1119 case 0x0C: /* same as */
1120 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1121 /*
1122 * Set irsl0 as input, irsl[1-2] as output, and separate
1123 * inputs are used for SIR and MIR/FIR
1124 */
1125 outb(0x48, iobase+7);
1126 break;
1127 case 0x0E: /* Supports SIR Mode only */
1128 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1129 break;
1130 case 0x0F: /* No dongle connected */
1131 IRDA_DEBUG(0, "%s(), %s\n",
1132 __func__, dongle_types[dongle_id]);
1133
1134 switch_bank(iobase, BANK0);
1135 outb(0x62, iobase+MCR);
1136 break;
1137 default:
1138 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
1139 __func__, dongle_id);
1140 }
1141
1142 /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1143 outb(0x00, iobase+4);
1144
1145 /* Restore bank register */
1146 outb(bank, iobase+BSR);
1147
1148 } /* set_up_dongle_interface */
1149
1150 /*
1151 * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1152 *
1153 * Change speed of the attach dongle
1154 *
1155 */
1156 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1157 {
1158 __u8 bank;
1159
1160 /* Save current bank */
1161 bank = inb(iobase+BSR);
1162
1163 /* Select Bank 7 */
1164 switch_bank(iobase, BANK7);
1165
1166 /* IRCFG1: set according to dongle_id */
1167 switch (dongle_id) {
1168 case 0x00: /* same as */
1169 case 0x01: /* Differential serial interface */
1170 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1171 __func__, dongle_types[dongle_id]);
1172 break;
1173 case 0x02: /* same as */
1174 case 0x03: /* Reserved */
1175 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1176 __func__, dongle_types[dongle_id]);
1177 break;
1178 case 0x04: /* Sharp RY5HD01 */
1179 break;
1180 case 0x05: /* Reserved */
1181 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1182 __func__, dongle_types[dongle_id]);
1183 break;
1184 case 0x06: /* Single-ended serial interface */
1185 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1186 __func__, dongle_types[dongle_id]);
1187 break;
1188 case 0x07: /* Consumer-IR only */
1189 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1190 __func__, dongle_types[dongle_id]);
1191 break;
1192 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1193 IRDA_DEBUG(0, "%s(), %s\n",
1194 __func__, dongle_types[dongle_id]);
1195 outb(0x00, iobase+4);
1196 if (speed > 115200)
1197 outb(0x01, iobase+4);
1198 break;
1199 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1200 outb(0x01, iobase+4);
1201
1202 if (speed == 4000000) {
1203 /* There was a cli() there, but we now are already
1204 * under spin_lock_irqsave() - JeanII */
1205 outb(0x81, iobase+4);
1206 outb(0x80, iobase+4);
1207 } else
1208 outb(0x00, iobase+4);
1209 break;
1210 case 0x0A: /* same as */
1211 case 0x0B: /* Reserved */
1212 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1213 __func__, dongle_types[dongle_id]);
1214 break;
1215 case 0x0C: /* same as */
1216 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1217 break;
1218 case 0x0E: /* Supports SIR Mode only */
1219 break;
1220 case 0x0F: /* No dongle connected */
1221 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1222 __func__, dongle_types[dongle_id]);
1223
1224 switch_bank(iobase, BANK0);
1225 outb(0x62, iobase+MCR);
1226 break;
1227 default:
1228 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __func__);
1229 }
1230 /* Restore bank register */
1231 outb(bank, iobase+BSR);
1232 }
1233
1234 /*
1235 * Function nsc_ircc_change_speed (self, baud)
1236 *
1237 * Change the speed of the device
1238 *
1239 * This function *must* be called with irq off and spin-lock.
1240 */
1241 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1242 {
1243 struct net_device *dev = self->netdev;
1244 __u8 mcr = MCR_SIR;
1245 int iobase;
1246 __u8 bank;
1247 __u8 ier; /* Interrupt enable register */
1248
1249 IRDA_DEBUG(2, "%s(), speed=%d\n", __func__, speed);
1250
1251 IRDA_ASSERT(self != NULL, return 0;);
1252
1253 iobase = self->io.fir_base;
1254
1255 /* Update accounting for new speed */
1256 self->io.speed = speed;
1257
1258 /* Save current bank */
1259 bank = inb(iobase+BSR);
1260
1261 /* Disable interrupts */
1262 switch_bank(iobase, BANK0);
1263 outb(0, iobase+IER);
1264
1265 /* Select Bank 2 */
1266 switch_bank(iobase, BANK2);
1267
1268 outb(0x00, iobase+BGDH);
1269 switch (speed) {
1270 case 9600: outb(0x0c, iobase+BGDL); break;
1271 case 19200: outb(0x06, iobase+BGDL); break;
1272 case 38400: outb(0x03, iobase+BGDL); break;
1273 case 57600: outb(0x02, iobase+BGDL); break;
1274 case 115200: outb(0x01, iobase+BGDL); break;
1275 case 576000:
1276 switch_bank(iobase, BANK5);
1277
1278 /* IRCR2: MDRS is set */
1279 outb(inb(iobase+4) | 0x04, iobase+4);
1280
1281 mcr = MCR_MIR;
1282 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __func__);
1283 break;
1284 case 1152000:
1285 mcr = MCR_MIR;
1286 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __func__);
1287 break;
1288 case 4000000:
1289 mcr = MCR_FIR;
1290 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __func__);
1291 break;
1292 default:
1293 mcr = MCR_FIR;
1294 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1295 __func__, speed);
1296 break;
1297 }
1298
1299 /* Set appropriate speed mode */
1300 switch_bank(iobase, BANK0);
1301 outb(mcr | MCR_TX_DFR, iobase+MCR);
1302
1303 /* Give some hits to the transceiver */
1304 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1305
1306 /* Set FIFO threshold to TX17, RX16 */
1307 switch_bank(iobase, BANK0);
1308 outb(0x00, iobase+FCR);
1309 outb(FCR_FIFO_EN, iobase+FCR);
1310 outb(FCR_RXTH| /* Set Rx FIFO threshold */
1311 FCR_TXTH| /* Set Tx FIFO threshold */
1312 FCR_TXSR| /* Reset Tx FIFO */
1313 FCR_RXSR| /* Reset Rx FIFO */
1314 FCR_FIFO_EN, /* Enable FIFOs */
1315 iobase+FCR);
1316
1317 /* Set FIFO size to 32 */
1318 switch_bank(iobase, BANK2);
1319 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1320
1321 /* Enable some interrupts so we can receive frames */
1322 switch_bank(iobase, BANK0);
1323 if (speed > 115200) {
1324 /* Install FIR xmit handler */
1325 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1326 ier = IER_SFIF_IE;
1327 nsc_ircc_dma_receive(self);
1328 } else {
1329 /* Install SIR xmit handler */
1330 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1331 ier = IER_RXHDL_IE;
1332 }
1333 /* Set our current interrupt mask */
1334 outb(ier, iobase+IER);
1335
1336 /* Restore BSR */
1337 outb(bank, iobase+BSR);
1338
1339 /* Make sure interrupt handlers keep the proper interrupt mask */
1340 return(ier);
1341 }
1342
1343 /*
1344 * Function nsc_ircc_hard_xmit (skb, dev)
1345 *
1346 * Transmit the frame!
1347 *
1348 */
1349 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1350 {
1351 struct nsc_ircc_cb *self;
1352 unsigned long flags;
1353 int iobase;
1354 __s32 speed;
1355 __u8 bank;
1356
1357 self = (struct nsc_ircc_cb *) dev->priv;
1358
1359 IRDA_ASSERT(self != NULL, return 0;);
1360
1361 iobase = self->io.fir_base;
1362
1363 netif_stop_queue(dev);
1364
1365 /* Make sure tests *& speed change are atomic */
1366 spin_lock_irqsave(&self->lock, flags);
1367
1368 /* Check if we need to change the speed */
1369 speed = irda_get_next_speed(skb);
1370 if ((speed != self->io.speed) && (speed != -1)) {
1371 /* Check for empty frame. */
1372 if (!skb->len) {
1373 /* If we just sent a frame, we get called before
1374 * the last bytes get out (because of the SIR FIFO).
1375 * If this is the case, let interrupt handler change
1376 * the speed itself... Jean II */
1377 if (self->io.direction == IO_RECV) {
1378 nsc_ircc_change_speed(self, speed);
1379 /* TODO : For SIR->SIR, the next packet
1380 * may get corrupted - Jean II */
1381 netif_wake_queue(dev);
1382 } else {
1383 self->new_speed = speed;
1384 /* Queue will be restarted after speed change
1385 * to make sure packets gets through the
1386 * proper xmit handler - Jean II */
1387 }
1388 dev->trans_start = jiffies;
1389 spin_unlock_irqrestore(&self->lock, flags);
1390 dev_kfree_skb(skb);
1391 return 0;
1392 } else
1393 self->new_speed = speed;
1394 }
1395
1396 /* Save current bank */
1397 bank = inb(iobase+BSR);
1398
1399 self->tx_buff.data = self->tx_buff.head;
1400
1401 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1402 self->tx_buff.truesize);
1403
1404 self->stats.tx_bytes += self->tx_buff.len;
1405
1406 /* Add interrupt on tx low level (will fire immediately) */
1407 switch_bank(iobase, BANK0);
1408 outb(IER_TXLDL_IE, iobase+IER);
1409
1410 /* Restore bank register */
1411 outb(bank, iobase+BSR);
1412
1413 dev->trans_start = jiffies;
1414 spin_unlock_irqrestore(&self->lock, flags);
1415
1416 dev_kfree_skb(skb);
1417
1418 return 0;
1419 }
1420
1421 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1422 {
1423 struct nsc_ircc_cb *self;
1424 unsigned long flags;
1425 int iobase;
1426 __s32 speed;
1427 __u8 bank;
1428 int mtt, diff;
1429
1430 self = (struct nsc_ircc_cb *) dev->priv;
1431 iobase = self->io.fir_base;
1432
1433 netif_stop_queue(dev);
1434
1435 /* Make sure tests *& speed change are atomic */
1436 spin_lock_irqsave(&self->lock, flags);
1437
1438 /* Check if we need to change the speed */
1439 speed = irda_get_next_speed(skb);
1440 if ((speed != self->io.speed) && (speed != -1)) {
1441 /* Check for empty frame. */
1442 if (!skb->len) {
1443 /* If we are currently transmitting, defer to
1444 * interrupt handler. - Jean II */
1445 if(self->tx_fifo.len == 0) {
1446 nsc_ircc_change_speed(self, speed);
1447 netif_wake_queue(dev);
1448 } else {
1449 self->new_speed = speed;
1450 /* Keep queue stopped :
1451 * the speed change operation may change the
1452 * xmit handler, and we want to make sure
1453 * the next packet get through the proper
1454 * Tx path, so block the Tx queue until
1455 * the speed change has been done.
1456 * Jean II */
1457 }
1458 dev->trans_start = jiffies;
1459 spin_unlock_irqrestore(&self->lock, flags);
1460 dev_kfree_skb(skb);
1461 return 0;
1462 } else {
1463 /* Change speed after current frame */
1464 self->new_speed = speed;
1465 }
1466 }
1467
1468 /* Save current bank */
1469 bank = inb(iobase+BSR);
1470
1471 /* Register and copy this frame to DMA memory */
1472 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1473 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1474 self->tx_fifo.tail += skb->len;
1475
1476 self->stats.tx_bytes += skb->len;
1477
1478 skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1479 skb->len);
1480 self->tx_fifo.len++;
1481 self->tx_fifo.free++;
1482
1483 /* Start transmit only if there is currently no transmit going on */
1484 if (self->tx_fifo.len == 1) {
1485 /* Check if we must wait the min turn time or not */
1486 mtt = irda_get_mtt(skb);
1487 if (mtt) {
1488 /* Check how much time we have used already */
1489 do_gettimeofday(&self->now);
1490 diff = self->now.tv_usec - self->stamp.tv_usec;
1491 if (diff < 0)
1492 diff += 1000000;
1493
1494 /* Check if the mtt is larger than the time we have
1495 * already used by all the protocol processing
1496 */
1497 if (mtt > diff) {
1498 mtt -= diff;
1499
1500 /*
1501 * Use timer if delay larger than 125 us, and
1502 * use udelay for smaller values which should
1503 * be acceptable
1504 */
1505 if (mtt > 125) {
1506 /* Adjust for timer resolution */
1507 mtt = mtt / 125;
1508
1509 /* Setup timer */
1510 switch_bank(iobase, BANK4);
1511 outb(mtt & 0xff, iobase+TMRL);
1512 outb((mtt >> 8) & 0x0f, iobase+TMRH);
1513
1514 /* Start timer */
1515 outb(IRCR1_TMR_EN, iobase+IRCR1);
1516 self->io.direction = IO_XMIT;
1517
1518 /* Enable timer interrupt */
1519 switch_bank(iobase, BANK0);
1520 outb(IER_TMR_IE, iobase+IER);
1521
1522 /* Timer will take care of the rest */
1523 goto out;
1524 } else
1525 udelay(mtt);
1526 }
1527 }
1528 /* Enable DMA interrupt */
1529 switch_bank(iobase, BANK0);
1530 outb(IER_DMA_IE, iobase+IER);
1531
1532 /* Transmit frame */
1533 nsc_ircc_dma_xmit(self, iobase);
1534 }
1535 out:
1536 /* Not busy transmitting anymore if window is not full,
1537 * and if we don't need to change speed */
1538 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1539 netif_wake_queue(self->netdev);
1540
1541 /* Restore bank register */
1542 outb(bank, iobase+BSR);
1543
1544 dev->trans_start = jiffies;
1545 spin_unlock_irqrestore(&self->lock, flags);
1546 dev_kfree_skb(skb);
1547
1548 return 0;
1549 }
1550
1551 /*
1552 * Function nsc_ircc_dma_xmit (self, iobase)
1553 *
1554 * Transmit data using DMA
1555 *
1556 */
1557 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1558 {
1559 int bsr;
1560
1561 /* Save current bank */
1562 bsr = inb(iobase+BSR);
1563
1564 /* Disable DMA */
1565 switch_bank(iobase, BANK0);
1566 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1567
1568 self->io.direction = IO_XMIT;
1569
1570 /* Choose transmit DMA channel */
1571 switch_bank(iobase, BANK2);
1572 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1573
1574 irda_setup_dma(self->io.dma,
1575 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1576 self->tx_buff.head) + self->tx_buff_dma,
1577 self->tx_fifo.queue[self->tx_fifo.ptr].len,
1578 DMA_TX_MODE);
1579
1580 /* Enable DMA and SIR interaction pulse */
1581 switch_bank(iobase, BANK0);
1582 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1583
1584 /* Restore bank register */
1585 outb(bsr, iobase+BSR);
1586 }
1587
1588 /*
1589 * Function nsc_ircc_pio_xmit (self, iobase)
1590 *
1591 * Transmit data using PIO. Returns the number of bytes that actually
1592 * got transferred
1593 *
1594 */
1595 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1596 {
1597 int actual = 0;
1598 __u8 bank;
1599
1600 IRDA_DEBUG(4, "%s()\n", __func__);
1601
1602 /* Save current bank */
1603 bank = inb(iobase+BSR);
1604
1605 switch_bank(iobase, BANK0);
1606 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1607 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1608 __func__);
1609
1610 /* FIFO may still be filled to the Tx interrupt threshold */
1611 fifo_size -= 17;
1612 }
1613
1614 /* Fill FIFO with current frame */
1615 while ((fifo_size-- > 0) && (actual < len)) {
1616 /* Transmit next byte */
1617 outb(buf[actual++], iobase+TXD);
1618 }
1619
1620 IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1621 __func__, fifo_size, actual, len);
1622
1623 /* Restore bank */
1624 outb(bank, iobase+BSR);
1625
1626 return actual;
1627 }
1628
1629 /*
1630 * Function nsc_ircc_dma_xmit_complete (self)
1631 *
1632 * The transfer of a frame in finished. This function will only be called
1633 * by the interrupt handler
1634 *
1635 */
1636 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1637 {
1638 int iobase;
1639 __u8 bank;
1640 int ret = TRUE;
1641
1642 IRDA_DEBUG(2, "%s()\n", __func__);
1643
1644 iobase = self->io.fir_base;
1645
1646 /* Save current bank */
1647 bank = inb(iobase+BSR);
1648
1649 /* Disable DMA */
1650 switch_bank(iobase, BANK0);
1651 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1652
1653 /* Check for underrrun! */
1654 if (inb(iobase+ASCR) & ASCR_TXUR) {
1655 self->stats.tx_errors++;
1656 self->stats.tx_fifo_errors++;
1657
1658 /* Clear bit, by writing 1 into it */
1659 outb(ASCR_TXUR, iobase+ASCR);
1660 } else {
1661 self->stats.tx_packets++;
1662 }
1663
1664 /* Finished with this frame, so prepare for next */
1665 self->tx_fifo.ptr++;
1666 self->tx_fifo.len--;
1667
1668 /* Any frames to be sent back-to-back? */
1669 if (self->tx_fifo.len) {
1670 nsc_ircc_dma_xmit(self, iobase);
1671
1672 /* Not finished yet! */
1673 ret = FALSE;
1674 } else {
1675 /* Reset Tx FIFO info */
1676 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1677 self->tx_fifo.tail = self->tx_buff.head;
1678 }
1679
1680 /* Make sure we have room for more frames and
1681 * that we don't need to change speed */
1682 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1683 /* Not busy transmitting anymore */
1684 /* Tell the network layer, that we can accept more frames */
1685 netif_wake_queue(self->netdev);
1686 }
1687
1688 /* Restore bank */
1689 outb(bank, iobase+BSR);
1690
1691 return ret;
1692 }
1693
1694 /*
1695 * Function nsc_ircc_dma_receive (self)
1696 *
1697 * Get ready for receiving a frame. The device will initiate a DMA
1698 * if it starts to receive a frame.
1699 *
1700 */
1701 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1702 {
1703 int iobase;
1704 __u8 bsr;
1705
1706 iobase = self->io.fir_base;
1707
1708 /* Reset Tx FIFO info */
1709 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1710 self->tx_fifo.tail = self->tx_buff.head;
1711
1712 /* Save current bank */
1713 bsr = inb(iobase+BSR);
1714
1715 /* Disable DMA */
1716 switch_bank(iobase, BANK0);
1717 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1718
1719 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1720 switch_bank(iobase, BANK2);
1721 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1722
1723 self->io.direction = IO_RECV;
1724 self->rx_buff.data = self->rx_buff.head;
1725
1726 /* Reset Rx FIFO. This will also flush the ST_FIFO */
1727 switch_bank(iobase, BANK0);
1728 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1729
1730 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1731 self->st_fifo.tail = self->st_fifo.head = 0;
1732
1733 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1734 DMA_RX_MODE);
1735
1736 /* Enable DMA */
1737 switch_bank(iobase, BANK0);
1738 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1739
1740 /* Restore bank register */
1741 outb(bsr, iobase+BSR);
1742
1743 return 0;
1744 }
1745
1746 /*
1747 * Function nsc_ircc_dma_receive_complete (self)
1748 *
1749 * Finished with receiving frames
1750 *
1751 *
1752 */
1753 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1754 {
1755 struct st_fifo *st_fifo;
1756 struct sk_buff *skb;
1757 __u8 status;
1758 __u8 bank;
1759 int len;
1760
1761 st_fifo = &self->st_fifo;
1762
1763 /* Save current bank */
1764 bank = inb(iobase+BSR);
1765
1766 /* Read all entries in status FIFO */
1767 switch_bank(iobase, BANK5);
1768 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1769 /* We must empty the status FIFO no matter what */
1770 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1771
1772 if (st_fifo->tail >= MAX_RX_WINDOW) {
1773 IRDA_DEBUG(0, "%s(), window is full!\n", __func__);
1774 continue;
1775 }
1776
1777 st_fifo->entries[st_fifo->tail].status = status;
1778 st_fifo->entries[st_fifo->tail].len = len;
1779 st_fifo->pending_bytes += len;
1780 st_fifo->tail++;
1781 st_fifo->len++;
1782 }
1783 /* Try to process all entries in status FIFO */
1784 while (st_fifo->len > 0) {
1785 /* Get first entry */
1786 status = st_fifo->entries[st_fifo->head].status;
1787 len = st_fifo->entries[st_fifo->head].len;
1788 st_fifo->pending_bytes -= len;
1789 st_fifo->head++;
1790 st_fifo->len--;
1791
1792 /* Check for errors */
1793 if (status & FRM_ST_ERR_MSK) {
1794 if (status & FRM_ST_LOST_FR) {
1795 /* Add number of lost frames to stats */
1796 self->stats.rx_errors += len;
1797 } else {
1798 /* Skip frame */
1799 self->stats.rx_errors++;
1800
1801 self->rx_buff.data += len;
1802
1803 if (status & FRM_ST_MAX_LEN)
1804 self->stats.rx_length_errors++;
1805
1806 if (status & FRM_ST_PHY_ERR)
1807 self->stats.rx_frame_errors++;
1808
1809 if (status & FRM_ST_BAD_CRC)
1810 self->stats.rx_crc_errors++;
1811 }
1812 /* The errors below can be reported in both cases */
1813 if (status & FRM_ST_OVR1)
1814 self->stats.rx_fifo_errors++;
1815
1816 if (status & FRM_ST_OVR2)
1817 self->stats.rx_fifo_errors++;
1818 } else {
1819 /*
1820 * First we must make sure that the frame we
1821 * want to deliver is all in main memory. If we
1822 * cannot tell, then we check if the Rx FIFO is
1823 * empty. If not then we will have to take a nap
1824 * and try again later.
1825 */
1826 if (st_fifo->pending_bytes < self->io.fifo_size) {
1827 switch_bank(iobase, BANK0);
1828 if (inb(iobase+LSR) & LSR_RXDA) {
1829 /* Put this entry back in fifo */
1830 st_fifo->head--;
1831 st_fifo->len++;
1832 st_fifo->pending_bytes += len;
1833 st_fifo->entries[st_fifo->head].status = status;
1834 st_fifo->entries[st_fifo->head].len = len;
1835 /*
1836 * DMA not finished yet, so try again
1837 * later, set timer value, resolution
1838 * 125 us
1839 */
1840 switch_bank(iobase, BANK4);
1841 outb(0x02, iobase+TMRL); /* x 125 us */
1842 outb(0x00, iobase+TMRH);
1843
1844 /* Start timer */
1845 outb(IRCR1_TMR_EN, iobase+IRCR1);
1846
1847 /* Restore bank register */
1848 outb(bank, iobase+BSR);
1849
1850 return FALSE; /* I'll be back! */
1851 }
1852 }
1853
1854 /*
1855 * Remember the time we received this frame, so we can
1856 * reduce the min turn time a bit since we will know
1857 * how much time we have used for protocol processing
1858 */
1859 do_gettimeofday(&self->stamp);
1860
1861 skb = dev_alloc_skb(len+1);
1862 if (skb == NULL) {
1863 IRDA_WARNING("%s(), memory squeeze, "
1864 "dropping frame.\n",
1865 __func__);
1866 self->stats.rx_dropped++;
1867
1868 /* Restore bank register */
1869 outb(bank, iobase+BSR);
1870
1871 return FALSE;
1872 }
1873
1874 /* Make sure IP header gets aligned */
1875 skb_reserve(skb, 1);
1876
1877 /* Copy frame without CRC */
1878 if (self->io.speed < 4000000) {
1879 skb_put(skb, len-2);
1880 skb_copy_to_linear_data(skb,
1881 self->rx_buff.data,
1882 len - 2);
1883 } else {
1884 skb_put(skb, len-4);
1885 skb_copy_to_linear_data(skb,
1886 self->rx_buff.data,
1887 len - 4);
1888 }
1889
1890 /* Move to next frame */
1891 self->rx_buff.data += len;
1892 self->stats.rx_bytes += len;
1893 self->stats.rx_packets++;
1894
1895 skb->dev = self->netdev;
1896 skb_reset_mac_header(skb);
1897 skb->protocol = htons(ETH_P_IRDA);
1898 netif_rx(skb);
1899 self->netdev->last_rx = jiffies;
1900 }
1901 }
1902 /* Restore bank register */
1903 outb(bank, iobase+BSR);
1904
1905 return TRUE;
1906 }
1907
1908 /*
1909 * Function nsc_ircc_pio_receive (self)
1910 *
1911 * Receive all data in receiver FIFO
1912 *
1913 */
1914 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1915 {
1916 __u8 byte;
1917 int iobase;
1918
1919 iobase = self->io.fir_base;
1920
1921 /* Receive all characters in Rx FIFO */
1922 do {
1923 byte = inb(iobase+RXD);
1924 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1925 byte);
1926 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1927 }
1928
1929 /*
1930 * Function nsc_ircc_sir_interrupt (self, eir)
1931 *
1932 * Handle SIR interrupt
1933 *
1934 */
1935 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1936 {
1937 int actual;
1938
1939 /* Check if transmit FIFO is low on data */
1940 if (eir & EIR_TXLDL_EV) {
1941 /* Write data left in transmit buffer */
1942 actual = nsc_ircc_pio_write(self->io.fir_base,
1943 self->tx_buff.data,
1944 self->tx_buff.len,
1945 self->io.fifo_size);
1946 self->tx_buff.data += actual;
1947 self->tx_buff.len -= actual;
1948
1949 self->io.direction = IO_XMIT;
1950
1951 /* Check if finished */
1952 if (self->tx_buff.len > 0)
1953 self->ier = IER_TXLDL_IE;
1954 else {
1955
1956 self->stats.tx_packets++;
1957 netif_wake_queue(self->netdev);
1958 self->ier = IER_TXEMP_IE;
1959 }
1960
1961 }
1962 /* Check if transmission has completed */
1963 if (eir & EIR_TXEMP_EV) {
1964 /* Turn around and get ready to receive some data */
1965 self->io.direction = IO_RECV;
1966 self->ier = IER_RXHDL_IE;
1967 /* Check if we need to change the speed?
1968 * Need to be after self->io.direction to avoid race with
1969 * nsc_ircc_hard_xmit_sir() - Jean II */
1970 if (self->new_speed) {
1971 IRDA_DEBUG(2, "%s(), Changing speed!\n", __func__);
1972 self->ier = nsc_ircc_change_speed(self,
1973 self->new_speed);
1974 self->new_speed = 0;
1975 netif_wake_queue(self->netdev);
1976
1977 /* Check if we are going to FIR */
1978 if (self->io.speed > 115200) {
1979 /* No need to do anymore SIR stuff */
1980 return;
1981 }
1982 }
1983 }
1984
1985 /* Rx FIFO threshold or timeout */
1986 if (eir & EIR_RXHDL_EV) {
1987 nsc_ircc_pio_receive(self);
1988
1989 /* Keep receiving */
1990 self->ier = IER_RXHDL_IE;
1991 }
1992 }
1993
1994 /*
1995 * Function nsc_ircc_fir_interrupt (self, eir)
1996 *
1997 * Handle MIR/FIR interrupt
1998 *
1999 */
2000 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
2001 int eir)
2002 {
2003 __u8 bank;
2004
2005 bank = inb(iobase+BSR);
2006
2007 /* Status FIFO event*/
2008 if (eir & EIR_SFIF_EV) {
2009 /* Check if DMA has finished */
2010 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2011 /* Wait for next status FIFO interrupt */
2012 self->ier = IER_SFIF_IE;
2013 } else {
2014 self->ier = IER_SFIF_IE | IER_TMR_IE;
2015 }
2016 } else if (eir & EIR_TMR_EV) { /* Timer finished */
2017 /* Disable timer */
2018 switch_bank(iobase, BANK4);
2019 outb(0, iobase+IRCR1);
2020
2021 /* Clear timer event */
2022 switch_bank(iobase, BANK0);
2023 outb(ASCR_CTE, iobase+ASCR);
2024
2025 /* Check if this is a Tx timer interrupt */
2026 if (self->io.direction == IO_XMIT) {
2027 nsc_ircc_dma_xmit(self, iobase);
2028
2029 /* Interrupt on DMA */
2030 self->ier = IER_DMA_IE;
2031 } else {
2032 /* Check (again) if DMA has finished */
2033 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2034 self->ier = IER_SFIF_IE;
2035 } else {
2036 self->ier = IER_SFIF_IE | IER_TMR_IE;
2037 }
2038 }
2039 } else if (eir & EIR_DMA_EV) {
2040 /* Finished with all transmissions? */
2041 if (nsc_ircc_dma_xmit_complete(self)) {
2042 if(self->new_speed != 0) {
2043 /* As we stop the Tx queue, the speed change
2044 * need to be done when the Tx fifo is
2045 * empty. Ask for a Tx done interrupt */
2046 self->ier = IER_TXEMP_IE;
2047 } else {
2048 /* Check if there are more frames to be
2049 * transmitted */
2050 if (irda_device_txqueue_empty(self->netdev)) {
2051 /* Prepare for receive */
2052 nsc_ircc_dma_receive(self);
2053 self->ier = IER_SFIF_IE;
2054 } else
2055 IRDA_WARNING("%s(), potential "
2056 "Tx queue lockup !\n",
2057 __func__);
2058 }
2059 } else {
2060 /* Not finished yet, so interrupt on DMA again */
2061 self->ier = IER_DMA_IE;
2062 }
2063 } else if (eir & EIR_TXEMP_EV) {
2064 /* The Tx FIFO has totally drained out, so now we can change
2065 * the speed... - Jean II */
2066 self->ier = nsc_ircc_change_speed(self, self->new_speed);
2067 self->new_speed = 0;
2068 netif_wake_queue(self->netdev);
2069 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
2070 }
2071
2072 outb(bank, iobase+BSR);
2073 }
2074
2075 /*
2076 * Function nsc_ircc_interrupt (irq, dev_id, regs)
2077 *
2078 * An interrupt from the chip has arrived. Time to do some work
2079 *
2080 */
2081 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id)
2082 {
2083 struct net_device *dev = dev_id;
2084 struct nsc_ircc_cb *self;
2085 __u8 bsr, eir;
2086 int iobase;
2087
2088 self = dev->priv;
2089
2090 spin_lock(&self->lock);
2091
2092 iobase = self->io.fir_base;
2093
2094 bsr = inb(iobase+BSR); /* Save current bank */
2095
2096 switch_bank(iobase, BANK0);
2097 self->ier = inb(iobase+IER);
2098 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
2099
2100 outb(0, iobase+IER); /* Disable interrupts */
2101
2102 if (eir) {
2103 /* Dispatch interrupt handler for the current speed */
2104 if (self->io.speed > 115200)
2105 nsc_ircc_fir_interrupt(self, iobase, eir);
2106 else
2107 nsc_ircc_sir_interrupt(self, eir);
2108 }
2109
2110 outb(self->ier, iobase+IER); /* Restore interrupts */
2111 outb(bsr, iobase+BSR); /* Restore bank register */
2112
2113 spin_unlock(&self->lock);
2114 return IRQ_RETVAL(eir);
2115 }
2116
2117 /*
2118 * Function nsc_ircc_is_receiving (self)
2119 *
2120 * Return TRUE is we are currently receiving a frame
2121 *
2122 */
2123 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
2124 {
2125 unsigned long flags;
2126 int status = FALSE;
2127 int iobase;
2128 __u8 bank;
2129
2130 IRDA_ASSERT(self != NULL, return FALSE;);
2131
2132 spin_lock_irqsave(&self->lock, flags);
2133
2134 if (self->io.speed > 115200) {
2135 iobase = self->io.fir_base;
2136
2137 /* Check if rx FIFO is not empty */
2138 bank = inb(iobase+BSR);
2139 switch_bank(iobase, BANK2);
2140 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
2141 /* We are receiving something */
2142 status = TRUE;
2143 }
2144 outb(bank, iobase+BSR);
2145 } else
2146 status = (self->rx_buff.state != OUTSIDE_FRAME);
2147
2148 spin_unlock_irqrestore(&self->lock, flags);
2149
2150 return status;
2151 }
2152
2153 /*
2154 * Function nsc_ircc_net_open (dev)
2155 *
2156 * Start the device
2157 *
2158 */
2159 static int nsc_ircc_net_open(struct net_device *dev)
2160 {
2161 struct nsc_ircc_cb *self;
2162 int iobase;
2163 char hwname[32];
2164 __u8 bank;
2165
2166 IRDA_DEBUG(4, "%s()\n", __func__);
2167
2168 IRDA_ASSERT(dev != NULL, return -1;);
2169 self = (struct nsc_ircc_cb *) dev->priv;
2170
2171 IRDA_ASSERT(self != NULL, return 0;);
2172
2173 iobase = self->io.fir_base;
2174
2175 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2176 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2177 driver_name, self->io.irq);
2178 return -EAGAIN;
2179 }
2180 /*
2181 * Always allocate the DMA channel after the IRQ, and clean up on
2182 * failure.
2183 */
2184 if (request_dma(self->io.dma, dev->name)) {
2185 IRDA_WARNING("%s, unable to allocate dma=%d\n",
2186 driver_name, self->io.dma);
2187 free_irq(self->io.irq, dev);
2188 return -EAGAIN;
2189 }
2190
2191 /* Save current bank */
2192 bank = inb(iobase+BSR);
2193
2194 /* turn on interrupts */
2195 switch_bank(iobase, BANK0);
2196 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2197
2198 /* Restore bank register */
2199 outb(bank, iobase+BSR);
2200
2201 /* Ready to play! */
2202 netif_start_queue(dev);
2203
2204 /* Give self a hardware name */
2205 sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2206
2207 /*
2208 * Open new IrLAP layer instance, now that everything should be
2209 * initialized properly
2210 */
2211 self->irlap = irlap_open(dev, &self->qos, hwname);
2212
2213 return 0;
2214 }
2215
2216 /*
2217 * Function nsc_ircc_net_close (dev)
2218 *
2219 * Stop the device
2220 *
2221 */
2222 static int nsc_ircc_net_close(struct net_device *dev)
2223 {
2224 struct nsc_ircc_cb *self;
2225 int iobase;
2226 __u8 bank;
2227
2228 IRDA_DEBUG(4, "%s()\n", __func__);
2229
2230 IRDA_ASSERT(dev != NULL, return -1;);
2231
2232 self = (struct nsc_ircc_cb *) dev->priv;
2233 IRDA_ASSERT(self != NULL, return 0;);
2234
2235 /* Stop device */
2236 netif_stop_queue(dev);
2237
2238 /* Stop and remove instance of IrLAP */
2239 if (self->irlap)
2240 irlap_close(self->irlap);
2241 self->irlap = NULL;
2242
2243 iobase = self->io.fir_base;
2244
2245 disable_dma(self->io.dma);
2246
2247 /* Save current bank */
2248 bank = inb(iobase+BSR);
2249
2250 /* Disable interrupts */
2251 switch_bank(iobase, BANK0);
2252 outb(0, iobase+IER);
2253
2254 free_irq(self->io.irq, dev);
2255 free_dma(self->io.dma);
2256
2257 /* Restore bank register */
2258 outb(bank, iobase+BSR);
2259
2260 return 0;
2261 }
2262
2263 /*
2264 * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2265 *
2266 * Process IOCTL commands for this device
2267 *
2268 */
2269 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2270 {
2271 struct if_irda_req *irq = (struct if_irda_req *) rq;
2272 struct nsc_ircc_cb *self;
2273 unsigned long flags;
2274 int ret = 0;
2275
2276 IRDA_ASSERT(dev != NULL, return -1;);
2277
2278 self = dev->priv;
2279
2280 IRDA_ASSERT(self != NULL, return -1;);
2281
2282 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, cmd);
2283
2284 switch (cmd) {
2285 case SIOCSBANDWIDTH: /* Set bandwidth */
2286 if (!capable(CAP_NET_ADMIN)) {
2287 ret = -EPERM;
2288 break;
2289 }
2290 spin_lock_irqsave(&self->lock, flags);
2291 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2292 spin_unlock_irqrestore(&self->lock, flags);
2293 break;
2294 case SIOCSMEDIABUSY: /* Set media busy */
2295 if (!capable(CAP_NET_ADMIN)) {
2296 ret = -EPERM;
2297 break;
2298 }
2299 irda_device_set_media_busy(self->netdev, TRUE);
2300 break;
2301 case SIOCGRECEIVING: /* Check if we are receiving right now */
2302 /* This is already protected */
2303 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2304 break;
2305 default:
2306 ret = -EOPNOTSUPP;
2307 }
2308 return ret;
2309 }
2310
2311 static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2312 {
2313 struct nsc_ircc_cb *self = (struct nsc_ircc_cb *) dev->priv;
2314
2315 return &self->stats;
2316 }
2317
2318 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
2319 {
2320 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2321 int bank;
2322 unsigned long flags;
2323 int iobase = self->io.fir_base;
2324
2325 if (self->io.suspended)
2326 return 0;
2327
2328 IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
2329
2330 rtnl_lock();
2331 if (netif_running(self->netdev)) {
2332 netif_device_detach(self->netdev);
2333 spin_lock_irqsave(&self->lock, flags);
2334 /* Save current bank */
2335 bank = inb(iobase+BSR);
2336
2337 /* Disable interrupts */
2338 switch_bank(iobase, BANK0);
2339 outb(0, iobase+IER);
2340
2341 /* Restore bank register */
2342 outb(bank, iobase+BSR);
2343
2344 spin_unlock_irqrestore(&self->lock, flags);
2345 free_irq(self->io.irq, self->netdev);
2346 disable_dma(self->io.dma);
2347 }
2348 self->io.suspended = 1;
2349 rtnl_unlock();
2350
2351 return 0;
2352 }
2353
2354 static int nsc_ircc_resume(struct platform_device *dev)
2355 {
2356 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2357 unsigned long flags;
2358
2359 if (!self->io.suspended)
2360 return 0;
2361
2362 IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
2363
2364 rtnl_lock();
2365 nsc_ircc_setup(&self->io);
2366 nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
2367
2368 if (netif_running(self->netdev)) {
2369 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
2370 self->netdev->name, self->netdev)) {
2371 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2372 driver_name, self->io.irq);
2373
2374 /*
2375 * Don't fail resume process, just kill this
2376 * network interface
2377 */
2378 unregister_netdevice(self->netdev);
2379 } else {
2380 spin_lock_irqsave(&self->lock, flags);
2381 nsc_ircc_change_speed(self, self->io.speed);
2382 spin_unlock_irqrestore(&self->lock, flags);
2383 netif_device_attach(self->netdev);
2384 }
2385
2386 } else {
2387 spin_lock_irqsave(&self->lock, flags);
2388 nsc_ircc_change_speed(self, 9600);
2389 spin_unlock_irqrestore(&self->lock, flags);
2390 }
2391 self->io.suspended = 0;
2392 rtnl_unlock();
2393
2394 return 0;
2395 }
2396
2397 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2398 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2399 MODULE_LICENSE("GPL");
2400
2401
2402 module_param(qos_mtt_bits, int, 0);
2403 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2404 module_param_array(io, int, NULL, 0);
2405 MODULE_PARM_DESC(io, "Base I/O addresses");
2406 module_param_array(irq, int, NULL, 0);
2407 MODULE_PARM_DESC(irq, "IRQ lines");
2408 module_param_array(dma, int, NULL, 0);
2409 MODULE_PARM_DESC(dma, "DMA channels");
2410 module_param(dongle_id, int, 0);
2411 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2412
2413 module_init(nsc_ircc_init);
2414 module_exit(nsc_ircc_cleanup);
2415
Linux with added FPC-III support