2 * Copyright (c) 2005 Cisco Systems. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/types.h>
39 MTHCA_NEXT_DBD
= 1 << 7,
40 MTHCA_NEXT_FENCE
= 1 << 6,
41 MTHCA_NEXT_CQ_UPDATE
= 1 << 3,
42 MTHCA_NEXT_EVENT_GEN
= 1 << 2,
43 MTHCA_NEXT_SOLICIT
= 1 << 1,
44 MTHCA_NEXT_IP_CSUM
= 1 << 4,
45 MTHCA_NEXT_TCP_UDP_CSUM
= 1 << 5,
47 MTHCA_MLX_VL15
= 1 << 17,
48 MTHCA_MLX_SLR
= 1 << 16
52 MTHCA_INVAL_LKEY
= 0x100,
53 MTHCA_TAVOR_MAX_WQES_PER_RECV_DB
= 256,
54 MTHCA_ARBEL_MAX_WQES_PER_SEND_DB
= 255
57 struct mthca_next_seg
{
58 __be32 nda_op
; /* [31:6] next WQE [4:0] next opcode */
59 __be32 ee_nds
; /* [31:8] next EE [7] DBD [6] F [5:0] next WQE size */
60 __be32 flags
; /* [3] CQ [2] Event [1] Solicit */
61 __be32 imm
; /* immediate data */
64 struct mthca_tavor_ud_seg
{
74 struct mthca_arbel_ud_seg
{
81 struct mthca_bind_seg
{
82 __be32 flags
; /* [31] Atomic [30] rem write [29] rem read */
90 struct mthca_raddr_seg
{
96 struct mthca_atomic_seg
{
101 struct mthca_data_seg
{
107 struct mthca_mlx_seg
{
110 __be32 flags
; /* [17] VL15 [16] SLR [14:12] static rate
111 [11:8] SL [3] C [2] E */
116 static __always_inline
void mthca_set_data_seg(struct mthca_data_seg
*dseg
,
119 dseg
->byte_count
= cpu_to_be32(sg
->length
);
120 dseg
->lkey
= cpu_to_be32(sg
->lkey
);
121 dseg
->addr
= cpu_to_be64(sg
->addr
);
124 static __always_inline
void mthca_set_data_seg_inval(struct mthca_data_seg
*dseg
)
126 dseg
->byte_count
= 0;
127 dseg
->lkey
= cpu_to_be32(MTHCA_INVAL_LKEY
);
131 #endif /* MTHCA_WQE_H */