2 Driver for the Spase sp887x demodulator
6 * This driver needs external firmware. Please use the command
7 * "<kerneldir>/Documentation/dvb/get_dvb_firmware sp887x" to
8 * download/extract it, and then copy it to /usr/lib/hotplug/firmware
9 * or /lib/firmware (depending on configuration of firmware hotplug).
11 #define SP887X_DEFAULT_FIRMWARE "dvb-fe-sp887x.fw"
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/device.h>
16 #include <linux/firmware.h>
17 #include <linux/string.h>
18 #include <linux/slab.h>
20 #include "dvb_frontend.h"
25 struct i2c_adapter
* i2c
;
26 const struct sp887x_config
* config
;
27 struct dvb_frontend frontend
;
29 /* demodulator private data */
34 #define dprintk(args...) \
36 if (debug) printk(KERN_DEBUG "sp887x: " args); \
39 static int i2c_writebytes (struct sp887x_state
* state
, u8
*buf
, u8 len
)
41 struct i2c_msg msg
= { .addr
= state
->config
->demod_address
, .flags
= 0, .buf
= buf
, .len
= len
};
44 if ((err
= i2c_transfer (state
->i2c
, &msg
, 1)) != 1) {
45 printk ("%s: i2c write error (addr %02x, err == %i)\n",
46 __func__
, state
->config
->demod_address
, err
);
53 static int sp887x_writereg (struct sp887x_state
* state
, u16 reg
, u16 data
)
55 u8 b0
[] = { reg
>> 8 , reg
& 0xff, data
>> 8, data
& 0xff };
56 struct i2c_msg msg
= { .addr
= state
->config
->demod_address
, .flags
= 0, .buf
= b0
, .len
= 4 };
59 if ((ret
= i2c_transfer(state
->i2c
, &msg
, 1)) != 1) {
61 * in case of soft reset we ignore ACK errors...
63 if (!(reg
== 0xf1a && data
== 0x000 &&
64 (ret
== -EREMOTEIO
|| ret
== -EFAULT
)))
66 printk("%s: writereg error "
67 "(reg %03x, data %03x, ret == %i)\n",
68 __func__
, reg
& 0xffff, data
& 0xffff, ret
);
76 static int sp887x_readreg (struct sp887x_state
* state
, u16 reg
)
78 u8 b0
[] = { reg
>> 8 , reg
& 0xff };
81 struct i2c_msg msg
[] = {{ .addr
= state
->config
->demod_address
, .flags
= 0, .buf
= b0
, .len
= 2 },
82 { .addr
= state
->config
->demod_address
, .flags
= I2C_M_RD
, .buf
= b1
, .len
= 2 }};
84 if ((ret
= i2c_transfer(state
->i2c
, msg
, 2)) != 2) {
85 printk("%s: readreg error (ret == %i)\n", __func__
, ret
);
89 return (((b1
[0] << 8) | b1
[1]) & 0xfff);
92 static void sp887x_microcontroller_stop (struct sp887x_state
* state
)
94 dprintk("%s\n", __func__
);
95 sp887x_writereg(state
, 0xf08, 0x000);
96 sp887x_writereg(state
, 0xf09, 0x000);
98 /* microcontroller STOP */
99 sp887x_writereg(state
, 0xf00, 0x000);
102 static void sp887x_microcontroller_start (struct sp887x_state
* state
)
104 dprintk("%s\n", __func__
);
105 sp887x_writereg(state
, 0xf08, 0x000);
106 sp887x_writereg(state
, 0xf09, 0x000);
108 /* microcontroller START */
109 sp887x_writereg(state
, 0xf00, 0x001);
112 static void sp887x_setup_agc (struct sp887x_state
* state
)
114 /* setup AGC parameters */
115 dprintk("%s\n", __func__
);
116 sp887x_writereg(state
, 0x33c, 0x054);
117 sp887x_writereg(state
, 0x33b, 0x04c);
118 sp887x_writereg(state
, 0x328, 0x000);
119 sp887x_writereg(state
, 0x327, 0x005);
120 sp887x_writereg(state
, 0x326, 0x001);
121 sp887x_writereg(state
, 0x325, 0x001);
122 sp887x_writereg(state
, 0x324, 0x001);
123 sp887x_writereg(state
, 0x318, 0x050);
124 sp887x_writereg(state
, 0x317, 0x3fe);
125 sp887x_writereg(state
, 0x316, 0x001);
126 sp887x_writereg(state
, 0x313, 0x005);
127 sp887x_writereg(state
, 0x312, 0x002);
128 sp887x_writereg(state
, 0x306, 0x000);
129 sp887x_writereg(state
, 0x303, 0x000);
133 #define FW_SIZE 0x4000
135 * load firmware and setup MPEG interface...
137 static int sp887x_initial_setup (struct dvb_frontend
* fe
, const struct firmware
*fw
)
139 struct sp887x_state
* state
= fe
->demodulator_priv
;
140 u8 buf
[BLOCKSIZE
+2];
142 int fw_size
= fw
->size
;
143 const unsigned char *mem
= fw
->data
;
145 dprintk("%s\n", __func__
);
147 /* ignore the first 10 bytes, then we expect 0x4000 bytes of firmware */
148 if (fw_size
< FW_SIZE
+10)
154 sp887x_writereg(state
, 0xf1a, 0x000);
156 sp887x_microcontroller_stop (state
);
158 printk ("%s: firmware upload... ", __func__
);
160 /* setup write pointer to -1 (end of memory) */
161 /* bit 0x8000 in address is set to enable 13bit mode */
162 sp887x_writereg(state
, 0x8f08, 0x1fff);
164 /* dummy write (wrap around to start of memory) */
165 sp887x_writereg(state
, 0x8f0a, 0x0000);
167 for (i
= 0; i
< FW_SIZE
; i
+= BLOCKSIZE
) {
174 /* bit 0x8000 in address is set to enable 13bit mode */
175 /* bit 0x4000 enables multibyte read/write transfers */
176 /* write register is 0xf0a */
180 memcpy(&buf
[2], mem
+ i
, c
);
182 if ((err
= i2c_writebytes (state
, buf
, c
+2)) < 0) {
183 printk ("failed.\n");
184 printk ("%s: i2c error (err == %i)\n", __func__
, err
);
189 /* don't write RS bytes between packets */
190 sp887x_writereg(state
, 0xc13, 0x001);
192 /* suppress clock if (!data_valid) */
193 sp887x_writereg(state
, 0xc14, 0x000);
195 /* setup MPEG interface... */
196 sp887x_writereg(state
, 0xc1a, 0x872);
197 sp887x_writereg(state
, 0xc1b, 0x001);
198 sp887x_writereg(state
, 0xc1c, 0x000); /* parallel mode (serial mode == 1) */
199 sp887x_writereg(state
, 0xc1a, 0x871);
201 /* ADC mode, 2 for MT8872, 3 for SP8870/SP8871 */
202 sp887x_writereg(state
, 0x301, 0x002);
204 sp887x_setup_agc(state
);
206 /* bit 0x010: enable data valid signal */
207 sp887x_writereg(state
, 0xd00, 0x010);
208 sp887x_writereg(state
, 0x0d1, 0x000);
212 static int configure_reg0xc05 (struct dvb_frontend_parameters
*p
, u16
*reg0xc05
)
214 int known_parameters
= 1;
218 switch (p
->u
.ofdm
.constellation
) {
222 *reg0xc05
|= (1 << 10);
225 *reg0xc05
|= (2 << 10);
228 known_parameters
= 0;
234 switch (p
->u
.ofdm
.hierarchy_information
) {
238 *reg0xc05
|= (1 << 7);
241 *reg0xc05
|= (2 << 7);
244 *reg0xc05
|= (3 << 7);
247 known_parameters
= 0;
253 switch (p
->u
.ofdm
.code_rate_HP
) {
257 *reg0xc05
|= (1 << 3);
260 *reg0xc05
|= (2 << 3);
263 *reg0xc05
|= (3 << 3);
266 *reg0xc05
|= (4 << 3);
269 known_parameters
= 0;
275 if (known_parameters
)
276 *reg0xc05
|= (2 << 1); /* use specified parameters */
278 *reg0xc05
|= (1 << 1); /* enable autoprobing */
284 * estimates division of two 24bit numbers,
285 * derived from the ves1820/stv0299 driver code
287 static void divide (int n
, int d
, int *quotient_i
, int *quotient_f
)
299 q
= (q
<< 8) | (r
/ d
);
301 *quotient_f
= (q
<< 8) | (r
/ d
);
305 static void sp887x_correct_offsets (struct sp887x_state
* state
,
306 struct dvb_frontend_parameters
*p
,
309 static const u32 srate_correction
[] = { 1879617, 4544878, 8098561 };
310 int bw_index
= p
->u
.ofdm
.bandwidth
- BANDWIDTH_8_MHZ
;
311 int freq_offset
= actual_freq
- p
->frequency
;
312 int sysclock
= 61003; //[kHz]
313 int ifreq
= 36000000;
317 if (p
->inversion
== INVERSION_ON
)
318 freq
= ifreq
- freq_offset
;
320 freq
= ifreq
+ freq_offset
;
322 divide(freq
/ 333, sysclock
, NULL
, &frequency_shift
);
324 if (p
->inversion
== INVERSION_ON
)
325 frequency_shift
= -frequency_shift
;
327 /* sample rate correction */
328 sp887x_writereg(state
, 0x319, srate_correction
[bw_index
] >> 12);
329 sp887x_writereg(state
, 0x31a, srate_correction
[bw_index
] & 0xfff);
331 /* carrier offset correction */
332 sp887x_writereg(state
, 0x309, frequency_shift
>> 12);
333 sp887x_writereg(state
, 0x30a, frequency_shift
& 0xfff);
336 static int sp887x_setup_frontend_parameters (struct dvb_frontend
* fe
,
337 struct dvb_frontend_parameters
*p
)
339 struct sp887x_state
* state
= fe
->demodulator_priv
;
340 unsigned actual_freq
;
344 if (p
->u
.ofdm
.bandwidth
!= BANDWIDTH_8_MHZ
&&
345 p
->u
.ofdm
.bandwidth
!= BANDWIDTH_7_MHZ
&&
346 p
->u
.ofdm
.bandwidth
!= BANDWIDTH_6_MHZ
)
349 if ((err
= configure_reg0xc05(p
, ®0xc05
)))
352 sp887x_microcontroller_stop(state
);
355 if (fe
->ops
.tuner_ops
.set_params
) {
356 fe
->ops
.tuner_ops
.set_params(fe
, p
);
357 if (fe
->ops
.i2c_gate_ctrl
) fe
->ops
.i2c_gate_ctrl(fe
, 0);
359 if (fe
->ops
.tuner_ops
.get_frequency
) {
360 fe
->ops
.tuner_ops
.get_frequency(fe
, &actual_freq
);
361 if (fe
->ops
.i2c_gate_ctrl
) fe
->ops
.i2c_gate_ctrl(fe
, 0);
363 actual_freq
= p
->frequency
;
366 /* read status reg in order to clear <pending irqs */
367 sp887x_readreg(state
, 0x200);
369 sp887x_correct_offsets(state
, p
, actual_freq
);
371 /* filter for 6/7/8 Mhz channel */
372 if (p
->u
.ofdm
.bandwidth
== BANDWIDTH_6_MHZ
)
374 else if (p
->u
.ofdm
.bandwidth
== BANDWIDTH_7_MHZ
)
379 sp887x_writereg(state
, 0x311, val
);
381 /* scan order: 2k first = 0, 8k first = 1 */
382 if (p
->u
.ofdm
.transmission_mode
== TRANSMISSION_MODE_2K
)
383 sp887x_writereg(state
, 0x338, 0x000);
385 sp887x_writereg(state
, 0x338, 0x001);
387 sp887x_writereg(state
, 0xc05, reg0xc05
);
389 if (p
->u
.ofdm
.bandwidth
== BANDWIDTH_6_MHZ
)
391 else if (p
->u
.ofdm
.bandwidth
== BANDWIDTH_7_MHZ
)
396 /* enable OFDM and SAW bits as lock indicators in sync register 0xf17,
397 * optimize algorithm for given bandwidth...
399 sp887x_writereg(state
, 0xf14, 0x160 | val
);
400 sp887x_writereg(state
, 0xf15, 0x000);
402 sp887x_microcontroller_start(state
);
406 static int sp887x_read_status(struct dvb_frontend
* fe
, fe_status_t
* status
)
408 struct sp887x_state
* state
= fe
->demodulator_priv
;
409 u16 snr12
= sp887x_readreg(state
, 0xf16);
410 u16 sync0x200
= sp887x_readreg(state
, 0x200);
411 u16 sync0xf17
= sp887x_readreg(state
, 0xf17);
416 *status
|= FE_HAS_SIGNAL
;
418 //if (sync0x200 & 0x004)
419 // *status |= FE_HAS_SYNC | FE_HAS_CARRIER;
421 //if (sync0x200 & 0x008)
422 // *status |= FE_HAS_VITERBI;
424 if ((sync0xf17
& 0x00f) == 0x002) {
425 *status
|= FE_HAS_LOCK
;
426 *status
|= FE_HAS_VITERBI
| FE_HAS_SYNC
| FE_HAS_CARRIER
;
429 if (sync0x200
& 0x001) { /* tuner adjustment requested...*/
430 int steps
= (sync0x200
>> 4) & 0x00f;
433 dprintk("sp887x: implement tuner adjustment (%+i steps)!!\n",
440 static int sp887x_read_ber(struct dvb_frontend
* fe
, u32
* ber
)
442 struct sp887x_state
* state
= fe
->demodulator_priv
;
444 *ber
= (sp887x_readreg(state
, 0xc08) & 0x3f) |
445 (sp887x_readreg(state
, 0xc07) << 6);
446 sp887x_writereg(state
, 0xc08, 0x000);
447 sp887x_writereg(state
, 0xc07, 0x000);
454 static int sp887x_read_signal_strength(struct dvb_frontend
* fe
, u16
* strength
)
456 struct sp887x_state
* state
= fe
->demodulator_priv
;
458 u16 snr12
= sp887x_readreg(state
, 0xf16);
459 u32 signal
= 3 * (snr12
<< 4);
460 *strength
= (signal
< 0xffff) ? signal
: 0xffff;
465 static int sp887x_read_snr(struct dvb_frontend
* fe
, u16
* snr
)
467 struct sp887x_state
* state
= fe
->demodulator_priv
;
469 u16 snr12
= sp887x_readreg(state
, 0xf16);
470 *snr
= (snr12
<< 4) | (snr12
>> 8);
475 static int sp887x_read_ucblocks(struct dvb_frontend
* fe
, u32
* ucblocks
)
477 struct sp887x_state
* state
= fe
->demodulator_priv
;
479 *ucblocks
= sp887x_readreg(state
, 0xc0c);
480 if (*ucblocks
== 0xfff)
486 static int sp887x_i2c_gate_ctrl(struct dvb_frontend
* fe
, int enable
)
488 struct sp887x_state
* state
= fe
->demodulator_priv
;
491 return sp887x_writereg(state
, 0x206, 0x001);
493 return sp887x_writereg(state
, 0x206, 0x000);
497 static int sp887x_sleep(struct dvb_frontend
* fe
)
499 struct sp887x_state
* state
= fe
->demodulator_priv
;
501 /* tristate TS output and disable interface pins */
502 sp887x_writereg(state
, 0xc18, 0x000);
507 static int sp887x_init(struct dvb_frontend
* fe
)
509 struct sp887x_state
* state
= fe
->demodulator_priv
;
510 const struct firmware
*fw
= NULL
;
513 if (!state
->initialised
) {
514 /* request the firmware, this will block until someone uploads it */
515 printk("sp887x: waiting for firmware upload (%s)...\n", SP887X_DEFAULT_FIRMWARE
);
516 ret
= state
->config
->request_firmware(fe
, &fw
, SP887X_DEFAULT_FIRMWARE
);
518 printk("sp887x: no firmware upload (timeout or file not found?)\n");
522 ret
= sp887x_initial_setup(fe
, fw
);
523 release_firmware(fw
);
525 printk("sp887x: writing firmware to device failed\n");
528 printk("sp887x: firmware upload complete\n");
529 state
->initialised
= 1;
532 /* enable TS output and interface pins */
533 sp887x_writereg(state
, 0xc18, 0x00d);
538 static int sp887x_get_tune_settings(struct dvb_frontend
* fe
, struct dvb_frontend_tune_settings
* fesettings
)
540 fesettings
->min_delay_ms
= 350;
541 fesettings
->step_size
= 166666*2;
542 fesettings
->max_drift
= (166666*2)+1;
546 static void sp887x_release(struct dvb_frontend
* fe
)
548 struct sp887x_state
* state
= fe
->demodulator_priv
;
552 static struct dvb_frontend_ops sp887x_ops
;
554 struct dvb_frontend
* sp887x_attach(const struct sp887x_config
* config
,
555 struct i2c_adapter
* i2c
)
557 struct sp887x_state
* state
= NULL
;
559 /* allocate memory for the internal state */
560 state
= kmalloc(sizeof(struct sp887x_state
), GFP_KERNEL
);
561 if (state
== NULL
) goto error
;
563 /* setup the state */
564 state
->config
= config
;
566 state
->initialised
= 0;
568 /* check if the demod is there */
569 if (sp887x_readreg(state
, 0x0200) < 0) goto error
;
571 /* create dvb_frontend */
572 memcpy(&state
->frontend
.ops
, &sp887x_ops
, sizeof(struct dvb_frontend_ops
));
573 state
->frontend
.demodulator_priv
= state
;
574 return &state
->frontend
;
581 static struct dvb_frontend_ops sp887x_ops
= {
584 .name
= "Spase SP887x DVB-T",
586 .frequency_min
= 50500000,
587 .frequency_max
= 858000000,
588 .frequency_stepsize
= 166666,
589 .caps
= FE_CAN_FEC_1_2
| FE_CAN_FEC_2_3
| FE_CAN_FEC_3_4
|
590 FE_CAN_FEC_5_6
| FE_CAN_FEC_7_8
| FE_CAN_FEC_AUTO
|
591 FE_CAN_QPSK
| FE_CAN_QAM_16
| FE_CAN_QAM_64
|
595 .release
= sp887x_release
,
598 .sleep
= sp887x_sleep
,
599 .i2c_gate_ctrl
= sp887x_i2c_gate_ctrl
,
601 .set_frontend
= sp887x_setup_frontend_parameters
,
602 .get_tune_settings
= sp887x_get_tune_settings
,
604 .read_status
= sp887x_read_status
,
605 .read_ber
= sp887x_read_ber
,
606 .read_signal_strength
= sp887x_read_signal_strength
,
607 .read_snr
= sp887x_read_snr
,
608 .read_ucblocks
= sp887x_read_ucblocks
,
611 module_param(debug
, int, 0644);
612 MODULE_PARM_DESC(debug
, "Turn on/off frontend debugging (default:off).");
614 MODULE_DESCRIPTION("Spase sp887x DVB-T demodulator driver");
615 MODULE_LICENSE("GPL");
617 EXPORT_SYMBOL(sp887x_attach
);