drivers/input/touchscreen/lpc32xx_ts.c

   1 /*
   2  * LPC32xx built-in touchscreen driver
   3  *
   4  * Copyright (C) 2010 NXP Semiconductors
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/platform_device.h>
  18 #include <linux/input.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/module.h>
  21 #include <linux/clk.h>
  22 #include <linux/io.h>
  23 #include <linux/slab.h>
  24 #include <linux/of.h>
  25
  26 /*
  27  * Touchscreen controller register offsets
  28  */
  29 #define LPC32XX_TSC_STAT                        0x00
  30 #define LPC32XX_TSC_SEL                         0x04
  31 #define LPC32XX_TSC_CON                         0x08
  32 #define LPC32XX_TSC_FIFO                        0x0C
  33 #define LPC32XX_TSC_DTR                         0x10
  34 #define LPC32XX_TSC_RTR                         0x14
  35 #define LPC32XX_TSC_UTR                         0x18
  36 #define LPC32XX_TSC_TTR                         0x1C
  37 #define LPC32XX_TSC_DXP                         0x20
  38 #define LPC32XX_TSC_MIN_X                       0x24
  39 #define LPC32XX_TSC_MAX_X                       0x28
  40 #define LPC32XX_TSC_MIN_Y                       0x2C
  41 #define LPC32XX_TSC_MAX_Y                       0x30
  42 #define LPC32XX_TSC_AUX_UTR                     0x34
  43 #define LPC32XX_TSC_AUX_MIN                     0x38
  44 #define LPC32XX_TSC_AUX_MAX                     0x3C
  45
  46 #define LPC32XX_TSC_STAT_FIFO_OVRRN             (1 << 8)
  47 #define LPC32XX_TSC_STAT_FIFO_EMPTY             (1 << 7)
  48
  49 #define LPC32XX_TSC_SEL_DEFVAL                  0x0284
  50
  51 #define LPC32XX_TSC_ADCCON_IRQ_TO_FIFO_4        (0x1 << 11)
  52 #define LPC32XX_TSC_ADCCON_X_SAMPLE_SIZE(s)     ((10 - (s)) << 7)
  53 #define LPC32XX_TSC_ADCCON_Y_SAMPLE_SIZE(s)     ((10 - (s)) << 4)
  54 #define LPC32XX_TSC_ADCCON_POWER_UP             (1 << 2)
  55 #define LPC32XX_TSC_ADCCON_AUTO_EN              (1 << 0)
  56
  57 #define LPC32XX_TSC_FIFO_TS_P_LEVEL             (1 << 31)
  58 #define LPC32XX_TSC_FIFO_NORMALIZE_X_VAL(x)     (((x) & 0x03FF0000) >> 16)
  59 #define LPC32XX_TSC_FIFO_NORMALIZE_Y_VAL(y)     ((y) & 0x000003FF)
  60
  61 #define LPC32XX_TSC_ADCDAT_VALUE_MASK           0x000003FF
  62
  63 #define LPC32XX_TSC_MIN_XY_VAL                  0x0
  64 #define LPC32XX_TSC_MAX_XY_VAL                  0x3FF
  65
  66 #define MOD_NAME "ts-lpc32xx"
  67
  68 #define tsc_readl(dev, reg) \
  69         __raw_readl((dev)->tsc_base + (reg))
  70 #define tsc_writel(dev, reg, val) \
  71         __raw_writel((val), (dev)->tsc_base + (reg))
  72
  73 struct lpc32xx_tsc {
  74         struct input_dev *dev;
  75         void __iomem *tsc_base;
  76         int irq;
  77         struct clk *clk;
  78 };
  79
  80 static void lpc32xx_fifo_clear(struct lpc32xx_tsc *tsc)
  81 {
  82         while (!(tsc_readl(tsc, LPC32XX_TSC_STAT) &
  83                         LPC32XX_TSC_STAT_FIFO_EMPTY))
  84                 tsc_readl(tsc, LPC32XX_TSC_FIFO);
  85 }
  86
  87 static irqreturn_t lpc32xx_ts_interrupt(int irq, void *dev_id)
  88 {
  89         u32 tmp, rv[4], xs[4], ys[4];
  90         int idx;
  91         struct lpc32xx_tsc *tsc = dev_id;
  92         struct input_dev *input = tsc->dev;
  93
  94         tmp = tsc_readl(tsc, LPC32XX_TSC_STAT);
  95
  96         if (tmp & LPC32XX_TSC_STAT_FIFO_OVRRN) {
  97                 /* FIFO overflow - throw away samples */
  98                 lpc32xx_fifo_clear(tsc);
  99                 return IRQ_HANDLED;
 100         }
 101
 102         /*
 103          * Gather and normalize 4 samples. Pen-up events may have less
 104          * than 4 samples, but its ok to pop 4 and let the last sample
 105          * pen status check drop the samples.
 106          */
 107         idx = 0;
 108         while (idx < 4 &&
 109                !(tsc_readl(tsc, LPC32XX_TSC_STAT) &
 110                         LPC32XX_TSC_STAT_FIFO_EMPTY)) {
 111                 tmp = tsc_readl(tsc, LPC32XX_TSC_FIFO);
 112                 xs[idx] = LPC32XX_TSC_ADCDAT_VALUE_MASK -
 113                         LPC32XX_TSC_FIFO_NORMALIZE_X_VAL(tmp);
 114                 ys[idx] = LPC32XX_TSC_ADCDAT_VALUE_MASK -
 115                         LPC32XX_TSC_FIFO_NORMALIZE_Y_VAL(tmp);
 116                 rv[idx] = tmp;
 117                 idx++;
 118         }
 119
 120         /* Data is only valid if pen is still down in last sample */
 121         if (!(rv[3] & LPC32XX_TSC_FIFO_TS_P_LEVEL) && idx == 4) {
 122                 /* Use average of 2nd and 3rd sample for position */
 123                 input_report_abs(input, ABS_X, (xs[1] + xs[2]) / 2);
 124                 input_report_abs(input, ABS_Y, (ys[1] + ys[2]) / 2);
 125                 input_report_key(input, BTN_TOUCH, 1);
 126         } else {
 127                 input_report_key(input, BTN_TOUCH, 0);
 128         }
 129
 130         input_sync(input);
 131
 132         return IRQ_HANDLED;
 133 }
 134
 135 static void lpc32xx_stop_tsc(struct lpc32xx_tsc *tsc)
 136 {
 137         /* Disable auto mode */
 138         tsc_writel(tsc, LPC32XX_TSC_CON,
 139                    tsc_readl(tsc, LPC32XX_TSC_CON) &
 140                              ~LPC32XX_TSC_ADCCON_AUTO_EN);
 141
 142         clk_disable_unprepare(tsc->clk);
 143 }
 144
 145 static int lpc32xx_setup_tsc(struct lpc32xx_tsc *tsc)
 146 {
 147         u32 tmp;
 148         int err;
 149
 150         err = clk_prepare_enable(tsc->clk);
 151         if (err)
 152                 return err;
 153
 154         tmp = tsc_readl(tsc, LPC32XX_TSC_CON) & ~LPC32XX_TSC_ADCCON_POWER_UP;
 155
 156         /* Set the TSC FIFO depth to 4 samples @ 10-bits per sample (max) */
 157         tmp = LPC32XX_TSC_ADCCON_IRQ_TO_FIFO_4 |
 158               LPC32XX_TSC_ADCCON_X_SAMPLE_SIZE(10) |
 159               LPC32XX_TSC_ADCCON_Y_SAMPLE_SIZE(10);
 160         tsc_writel(tsc, LPC32XX_TSC_CON, tmp);
 161
 162         /* These values are all preset */
 163         tsc_writel(tsc, LPC32XX_TSC_SEL, LPC32XX_TSC_SEL_DEFVAL);
 164         tsc_writel(tsc, LPC32XX_TSC_MIN_X, LPC32XX_TSC_MIN_XY_VAL);
 165         tsc_writel(tsc, LPC32XX_TSC_MAX_X, LPC32XX_TSC_MAX_XY_VAL);
 166         tsc_writel(tsc, LPC32XX_TSC_MIN_Y, LPC32XX_TSC_MIN_XY_VAL);
 167         tsc_writel(tsc, LPC32XX_TSC_MAX_Y, LPC32XX_TSC_MAX_XY_VAL);
 168
 169         /* Aux support is not used */
 170         tsc_writel(tsc, LPC32XX_TSC_AUX_UTR, 0);
 171         tsc_writel(tsc, LPC32XX_TSC_AUX_MIN, 0);
 172         tsc_writel(tsc, LPC32XX_TSC_AUX_MAX, 0);
 173
 174         /*
 175          * Set sample rate to about 240Hz per X/Y pair. A single measurement
 176          * consists of 4 pairs which gives about a 60Hz sample rate based on
 177          * a stable 32768Hz clock source. Values are in clocks.
 178          * Rate is (32768 / (RTR + XCONV + RTR + YCONV + DXP + TTR + UTR) / 4
 179          */
 180         tsc_writel(tsc, LPC32XX_TSC_RTR, 0x2);
 181         tsc_writel(tsc, LPC32XX_TSC_DTR, 0x2);
 182         tsc_writel(tsc, LPC32XX_TSC_TTR, 0x10);
 183         tsc_writel(tsc, LPC32XX_TSC_DXP, 0x4);
 184         tsc_writel(tsc, LPC32XX_TSC_UTR, 88);
 185
 186         lpc32xx_fifo_clear(tsc);
 187
 188         /* Enable automatic ts event capture */
 189         tsc_writel(tsc, LPC32XX_TSC_CON, tmp | LPC32XX_TSC_ADCCON_AUTO_EN);
 190
 191         return 0;
 192 }
 193
 194 static int lpc32xx_ts_open(struct input_dev *dev)
 195 {
 196         struct lpc32xx_tsc *tsc = input_get_drvdata(dev);
 197
 198         return lpc32xx_setup_tsc(tsc);
 199 }
 200
 201 static void lpc32xx_ts_close(struct input_dev *dev)
 202 {
 203         struct lpc32xx_tsc *tsc = input_get_drvdata(dev);
 204
 205         lpc32xx_stop_tsc(tsc);
 206 }
 207
 208 static int lpc32xx_ts_probe(struct platform_device *pdev)
 209 {
 210         struct lpc32xx_tsc *tsc;
 211         struct input_dev *input;
 212         struct resource *res;
 213         resource_size_t size;
 214         int irq;
 215         int error;
 216
 217         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 218         if (!res) {
 219                 dev_err(&pdev->dev, "Can't get memory resource\n");
 220                 return -ENOENT;
 221         }
 222
 223         irq = platform_get_irq(pdev, 0);
 224         if (irq < 0) {
 225                 dev_err(&pdev->dev, "Can't get interrupt resource\n");
 226                 return irq;
 227         }
 228
 229         tsc = kzalloc(sizeof(*tsc), GFP_KERNEL);
 230         input = input_allocate_device();
 231         if (!tsc || !input) {
 232                 dev_err(&pdev->dev, "failed allocating memory\n");
 233                 error = -ENOMEM;
 234                 goto err_free_mem;
 235         }
 236
 237         tsc->dev = input;
 238         tsc->irq = irq;
 239
 240         size = resource_size(res);
 241
 242         if (!request_mem_region(res->start, size, pdev->name)) {
 243                 dev_err(&pdev->dev, "TSC registers are not free\n");
 244                 error = -EBUSY;
 245                 goto err_free_mem;
 246         }
 247
 248         tsc->tsc_base = ioremap(res->start, size);
 249         if (!tsc->tsc_base) {
 250                 dev_err(&pdev->dev, "Can't map memory\n");
 251                 error = -ENOMEM;
 252                 goto err_release_mem;
 253         }
 254
 255         tsc->clk = clk_get(&pdev->dev, NULL);
 256         if (IS_ERR(tsc->clk)) {
 257                 dev_err(&pdev->dev, "failed getting clock\n");
 258                 error = PTR_ERR(tsc->clk);
 259                 goto err_unmap;
 260         }
 261
 262         input->name = MOD_NAME;
 263         input->phys = "lpc32xx/input0";
 264         input->id.bustype = BUS_HOST;
 265         input->id.vendor = 0x0001;
 266         input->id.product = 0x0002;
 267         input->id.version = 0x0100;
 268         input->dev.parent = &pdev->dev;
 269         input->open = lpc32xx_ts_open;
 270         input->close = lpc32xx_ts_close;
 271
 272         input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
 273         input->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
 274         input_set_abs_params(input, ABS_X, LPC32XX_TSC_MIN_XY_VAL,
 275                              LPC32XX_TSC_MAX_XY_VAL, 0, 0);
 276         input_set_abs_params(input, ABS_Y, LPC32XX_TSC_MIN_XY_VAL,
 277                              LPC32XX_TSC_MAX_XY_VAL, 0, 0);
 278
 279         input_set_drvdata(input, tsc);
 280
 281         error = request_irq(tsc->irq, lpc32xx_ts_interrupt,
 282                             0, pdev->name, tsc);
 283         if (error) {
 284                 dev_err(&pdev->dev, "failed requesting interrupt\n");
 285                 goto err_put_clock;
 286         }
 287
 288         error = input_register_device(input);
 289         if (error) {
 290                 dev_err(&pdev->dev, "failed registering input device\n");
 291                 goto err_free_irq;
 292         }
 293
 294         platform_set_drvdata(pdev, tsc);
 295         device_init_wakeup(&pdev->dev, 1);
 296
 297         return 0;
 298
 299 err_free_irq:
 300         free_irq(tsc->irq, tsc);
 301 err_put_clock:
 302         clk_put(tsc->clk);
 303 err_unmap:
 304         iounmap(tsc->tsc_base);
 305 err_release_mem:
 306         release_mem_region(res->start, size);
 307 err_free_mem:
 308         input_free_device(input);
 309         kfree(tsc);
 310
 311         return error;
 312 }
 313
 314 static int lpc32xx_ts_remove(struct platform_device *pdev)
 315 {
 316         struct lpc32xx_tsc *tsc = platform_get_drvdata(pdev);
 317         struct resource *res;
 318
 319         free_irq(tsc->irq, tsc);
 320
 321         input_unregister_device(tsc->dev);
 322
 323         clk_put(tsc->clk);
 324
 325         iounmap(tsc->tsc_base);
 326         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 327         release_mem_region(res->start, resource_size(res));
 328
 329         kfree(tsc);
 330
 331         return 0;
 332 }
 333
 334 #ifdef CONFIG_PM
 335 static int lpc32xx_ts_suspend(struct device *dev)
 336 {
 337         struct lpc32xx_tsc *tsc = dev_get_drvdata(dev);
 338         struct input_dev *input = tsc->dev;
 339
 340         /*
 341          * Suspend and resume can be called when the device hasn't been
 342          * enabled. If there are no users that have the device open, then
 343          * avoid calling the TSC stop and start functions as the TSC
 344          * isn't yet clocked.
 345          */
 346         mutex_lock(&input->mutex);
 347
 348         if (input->users) {
 349                 if (device_may_wakeup(dev))
 350                         enable_irq_wake(tsc->irq);
 351                 else
 352                         lpc32xx_stop_tsc(tsc);
 353         }
 354
 355         mutex_unlock(&input->mutex);
 356
 357         return 0;
 358 }
 359
 360 static int lpc32xx_ts_resume(struct device *dev)
 361 {
 362         struct lpc32xx_tsc *tsc = dev_get_drvdata(dev);
 363         struct input_dev *input = tsc->dev;
 364
 365         mutex_lock(&input->mutex);
 366
 367         if (input->users) {
 368                 if (device_may_wakeup(dev))
 369                         disable_irq_wake(tsc->irq);
 370                 else
 371                         lpc32xx_setup_tsc(tsc);
 372         }
 373
 374         mutex_unlock(&input->mutex);
 375
 376         return 0;
 377 }
 378
 379 static const struct dev_pm_ops lpc32xx_ts_pm_ops = {
 380         .suspend        = lpc32xx_ts_suspend,
 381         .resume         = lpc32xx_ts_resume,
 382 };
 383 #define LPC32XX_TS_PM_OPS (&lpc32xx_ts_pm_ops)
 384 #else
 385 #define LPC32XX_TS_PM_OPS NULL
 386 #endif
 387
 388 #ifdef CONFIG_OF
 389 static const struct of_device_id lpc32xx_tsc_of_match[] = {
 390         { .compatible = "nxp,lpc3220-tsc", },
 391         { },
 392 };
 393 MODULE_DEVICE_TABLE(of, lpc32xx_tsc_of_match);
 394 #endif
 395
 396 static struct platform_driver lpc32xx_ts_driver = {
 397         .probe          = lpc32xx_ts_probe,
 398         .remove         = lpc32xx_ts_remove,
 399         .driver         = {
 400                 .name   = MOD_NAME,
 401                 .pm     = LPC32XX_TS_PM_OPS,
 402                 .of_match_table = of_match_ptr(lpc32xx_tsc_of_match),
 403         },
 404 };
 405 module_platform_driver(lpc32xx_ts_driver);
 406
 407 MODULE_AUTHOR("Kevin Wells <kevin.wells@nxp.com");
 408 MODULE_DESCRIPTION("LPC32XX TSC Driver");
 409 MODULE_LICENSE("GPL");
 410 MODULE_ALIAS("platform:lpc32xx_ts");