2 * dwc3-pci.c - PCI Specific glue layer
4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
6 * Authors: Felipe Balbi <balbi@ti.com>,
7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
9 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 of
11 * the License as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/slab.h>
22 #include <linux/pci.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/platform_device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/acpi.h>
27 #include <linux/delay.h>
29 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
30 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce
31 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf
32 #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
33 #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
34 #define PCI_DEVICE_ID_INTEL_BSW 0x22b7
35 #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
36 #define PCI_DEVICE_ID_INTEL_SPTH 0xa130
37 #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
38 #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
39 #define PCI_DEVICE_ID_INTEL_APL 0x5aaa
40 #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
41 #define PCI_DEVICE_ID_INTEL_GLK 0x31aa
42 #define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee
43 #define PCI_DEVICE_ID_INTEL_CNPH 0xa36e
45 #define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
46 #define PCI_INTEL_BXT_FUNC_PMU_PWR 4
47 #define PCI_INTEL_BXT_STATE_D0 0
48 #define PCI_INTEL_BXT_STATE_D3 3
51 * struct dwc3_pci - Driver private structure
52 * @dwc3: child dwc3 platform_device
53 * @pci: our link to PCI bus
55 * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
58 struct platform_device
*dwc3
;
63 unsigned int has_dsm_for_pm
:1;
66 static const struct acpi_gpio_params reset_gpios
= { 0, 0, false };
67 static const struct acpi_gpio_params cs_gpios
= { 1, 0, false };
69 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios
[] = {
70 { "reset-gpios", &reset_gpios
, 1 },
71 { "cs-gpios", &cs_gpios
, 1 },
75 static int dwc3_pci_quirks(struct dwc3_pci
*dwc
)
77 struct platform_device
*dwc3
= dwc
->dwc3
;
78 struct pci_dev
*pdev
= dwc
->pci
;
80 if (pdev
->vendor
== PCI_VENDOR_ID_AMD
&&
81 pdev
->device
== PCI_DEVICE_ID_AMD_NL_USB
) {
82 struct property_entry properties
[] = {
83 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
84 PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
85 PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
86 PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
87 PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
88 PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
89 PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
90 PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
91 PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
92 PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
93 PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
95 * FIXME these quirks should be removed when AMD NL
98 PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
99 PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
100 PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
101 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
105 return platform_device_add_properties(dwc3
, properties
);
108 if (pdev
->vendor
== PCI_VENDOR_ID_INTEL
) {
111 struct property_entry properties
[] = {
112 PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
113 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
117 ret
= platform_device_add_properties(dwc3
, properties
);
121 if (pdev
->device
== PCI_DEVICE_ID_INTEL_BXT
||
122 pdev
->device
== PCI_DEVICE_ID_INTEL_BXT_M
) {
123 guid_parse(PCI_INTEL_BXT_DSM_GUID
, &dwc
->guid
);
124 dwc
->has_dsm_for_pm
= true;
127 if (pdev
->device
== PCI_DEVICE_ID_INTEL_BYT
) {
128 struct gpio_desc
*gpio
;
130 ret
= devm_acpi_dev_add_driver_gpios(&pdev
->dev
,
131 acpi_dwc3_byt_gpios
);
133 dev_dbg(&pdev
->dev
, "failed to add mapping table\n");
136 * These GPIOs will turn on the USB2 PHY. Note that we have to
137 * put the gpio descriptors again here because the phy driver
138 * might want to grab them, too.
140 gpio
= gpiod_get_optional(&pdev
->dev
, "cs", GPIOD_OUT_LOW
);
142 return PTR_ERR(gpio
);
144 gpiod_set_value_cansleep(gpio
, 1);
147 gpio
= gpiod_get_optional(&pdev
->dev
, "reset", GPIOD_OUT_LOW
);
149 return PTR_ERR(gpio
);
152 gpiod_set_value_cansleep(gpio
, 1);
154 usleep_range(10000, 11000);
159 if (pdev
->vendor
== PCI_VENDOR_ID_SYNOPSYS
&&
160 (pdev
->device
== PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3
||
161 pdev
->device
== PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI
||
162 pdev
->device
== PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31
)) {
163 struct property_entry properties
[] = {
164 PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"),
165 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
166 PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"),
167 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
171 return platform_device_add_properties(dwc3
, properties
);
177 static int dwc3_pci_probe(struct pci_dev
*pci
,
178 const struct pci_device_id
*id
)
180 struct dwc3_pci
*dwc
;
181 struct resource res
[2];
183 struct device
*dev
= &pci
->dev
;
185 ret
= pcim_enable_device(pci
);
187 dev_err(dev
, "failed to enable pci device\n");
193 dwc
= devm_kzalloc(dev
, sizeof(*dwc
), GFP_KERNEL
);
197 dwc
->dwc3
= platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO
);
201 memset(res
, 0x00, sizeof(struct resource
) * ARRAY_SIZE(res
));
203 res
[0].start
= pci_resource_start(pci
, 0);
204 res
[0].end
= pci_resource_end(pci
, 0);
205 res
[0].name
= "dwc_usb3";
206 res
[0].flags
= IORESOURCE_MEM
;
208 res
[1].start
= pci
->irq
;
209 res
[1].name
= "dwc_usb3";
210 res
[1].flags
= IORESOURCE_IRQ
;
212 ret
= platform_device_add_resources(dwc
->dwc3
, res
, ARRAY_SIZE(res
));
214 dev_err(dev
, "couldn't add resources to dwc3 device\n");
219 dwc
->dwc3
->dev
.parent
= dev
;
220 ACPI_COMPANION_SET(&dwc
->dwc3
->dev
, ACPI_COMPANION(dev
));
222 ret
= dwc3_pci_quirks(dwc
);
226 ret
= platform_device_add(dwc
->dwc3
);
228 dev_err(dev
, "failed to register dwc3 device\n");
232 device_init_wakeup(dev
, true);
233 pci_set_drvdata(pci
, dwc
);
238 platform_device_put(dwc
->dwc3
);
242 static void dwc3_pci_remove(struct pci_dev
*pci
)
244 struct dwc3_pci
*dwc
= pci_get_drvdata(pci
);
246 device_init_wakeup(&pci
->dev
, false);
247 pm_runtime_get(&pci
->dev
);
248 platform_device_unregister(dwc
->dwc3
);
251 static const struct pci_device_id dwc3_pci_id_table
[] = {
253 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS
,
254 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3
),
257 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS
,
258 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI
),
261 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS
,
262 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31
),
264 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BSW
), },
265 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BYT
), },
266 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_MRFLD
), },
267 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_SPTLP
), },
268 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_SPTH
), },
269 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BXT
), },
270 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BXT_M
), },
271 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_APL
), },
272 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_KBP
), },
273 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_GLK
), },
274 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_CNPLP
), },
275 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_CNPH
), },
276 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_NL_USB
), },
277 { } /* Terminating Entry */
279 MODULE_DEVICE_TABLE(pci
, dwc3_pci_id_table
);
281 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
282 static int dwc3_pci_dsm(struct dwc3_pci
*dwc
, int param
)
284 union acpi_object
*obj
;
285 union acpi_object tmp
;
286 union acpi_object argv4
= ACPI_INIT_DSM_ARGV4(1, &tmp
);
288 if (!dwc
->has_dsm_for_pm
)
291 tmp
.type
= ACPI_TYPE_INTEGER
;
292 tmp
.integer
.value
= param
;
294 obj
= acpi_evaluate_dsm(ACPI_HANDLE(&dwc
->pci
->dev
), &dwc
->guid
,
295 1, PCI_INTEL_BXT_FUNC_PMU_PWR
, &argv4
);
297 dev_err(&dwc
->pci
->dev
, "failed to evaluate _DSM\n");
305 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
308 static int dwc3_pci_runtime_suspend(struct device
*dev
)
310 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
312 if (device_can_wakeup(dev
))
313 return dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D3
);
318 static int dwc3_pci_runtime_resume(struct device
*dev
)
320 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
321 struct platform_device
*dwc3
= dwc
->dwc3
;
324 ret
= dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D0
);
328 return pm_runtime_get(&dwc3
->dev
);
330 #endif /* CONFIG_PM */
332 #ifdef CONFIG_PM_SLEEP
333 static int dwc3_pci_suspend(struct device
*dev
)
335 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
337 return dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D3
);
340 static int dwc3_pci_resume(struct device
*dev
)
342 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
344 return dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D0
);
346 #endif /* CONFIG_PM_SLEEP */
348 static struct dev_pm_ops dwc3_pci_dev_pm_ops
= {
349 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend
, dwc3_pci_resume
)
350 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend
, dwc3_pci_runtime_resume
,
354 static struct pci_driver dwc3_pci_driver
= {
356 .id_table
= dwc3_pci_id_table
,
357 .probe
= dwc3_pci_probe
,
358 .remove
= dwc3_pci_remove
,
360 .pm
= &dwc3_pci_dev_pm_ops
,
364 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
365 MODULE_LICENSE("GPL v2");
366 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
368 module_pci_driver(dwc3_pci_driver
);