mm, debug: replace dump_flags() with the new printk formats
[linux/fpc-iii.git] / drivers / watchdog / mtk_wdt.c
blobb78776c05554ce2d51ccb110f7e2d8754a007671
1 /*
2 * Mediatek Watchdog Driver
4 * Copyright (C) 2014 Matthias Brugger
6 * Matthias Brugger <matthias.bgg@gmail.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * Based on sunxi_wdt.c
21 #include <linux/err.h>
22 #include <linux/init.h>
23 #include <linux/io.h>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/of.h>
28 #include <linux/platform_device.h>
29 #include <linux/types.h>
30 #include <linux/watchdog.h>
31 #include <linux/delay.h>
33 #define WDT_MAX_TIMEOUT 31
34 #define WDT_MIN_TIMEOUT 1
35 #define WDT_LENGTH_TIMEOUT(n) ((n) << 5)
37 #define WDT_LENGTH 0x04
38 #define WDT_LENGTH_KEY 0x8
40 #define WDT_RST 0x08
41 #define WDT_RST_RELOAD 0x1971
43 #define WDT_MODE 0x00
44 #define WDT_MODE_EN (1 << 0)
45 #define WDT_MODE_EXT_POL_LOW (0 << 1)
46 #define WDT_MODE_EXT_POL_HIGH (1 << 1)
47 #define WDT_MODE_EXRST_EN (1 << 2)
48 #define WDT_MODE_IRQ_EN (1 << 3)
49 #define WDT_MODE_AUTO_START (1 << 4)
50 #define WDT_MODE_DUAL_EN (1 << 6)
51 #define WDT_MODE_KEY 0x22000000
53 #define WDT_SWRST 0x14
54 #define WDT_SWRST_KEY 0x1209
56 #define DRV_NAME "mtk-wdt"
57 #define DRV_VERSION "1.0"
59 static bool nowayout = WATCHDOG_NOWAYOUT;
60 static unsigned int timeout = WDT_MAX_TIMEOUT;
62 struct mtk_wdt_dev {
63 struct watchdog_device wdt_dev;
64 void __iomem *wdt_base;
67 static int mtk_wdt_restart(struct watchdog_device *wdt_dev)
69 struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
70 void __iomem *wdt_base;
72 wdt_base = mtk_wdt->wdt_base;
74 while (1) {
75 writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST);
76 mdelay(5);
79 return 0;
82 static int mtk_wdt_ping(struct watchdog_device *wdt_dev)
84 struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
85 void __iomem *wdt_base = mtk_wdt->wdt_base;
87 iowrite32(WDT_RST_RELOAD, wdt_base + WDT_RST);
89 return 0;
92 static int mtk_wdt_set_timeout(struct watchdog_device *wdt_dev,
93 unsigned int timeout)
95 struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
96 void __iomem *wdt_base = mtk_wdt->wdt_base;
97 u32 reg;
99 wdt_dev->timeout = timeout;
102 * One bit is the value of 512 ticks
103 * The clock has 32 KHz
105 reg = WDT_LENGTH_TIMEOUT(timeout << 6) | WDT_LENGTH_KEY;
106 iowrite32(reg, wdt_base + WDT_LENGTH);
108 mtk_wdt_ping(wdt_dev);
110 return 0;
113 static int mtk_wdt_stop(struct watchdog_device *wdt_dev)
115 struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
116 void __iomem *wdt_base = mtk_wdt->wdt_base;
117 u32 reg;
119 reg = readl(wdt_base + WDT_MODE);
120 reg &= ~WDT_MODE_EN;
121 reg |= WDT_MODE_KEY;
122 iowrite32(reg, wdt_base + WDT_MODE);
124 return 0;
127 static int mtk_wdt_start(struct watchdog_device *wdt_dev)
129 u32 reg;
130 struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
131 void __iomem *wdt_base = mtk_wdt->wdt_base;
132 int ret;
134 ret = mtk_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
135 if (ret < 0)
136 return ret;
138 reg = ioread32(wdt_base + WDT_MODE);
139 reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
140 reg |= (WDT_MODE_EN | WDT_MODE_KEY);
141 iowrite32(reg, wdt_base + WDT_MODE);
143 return 0;
146 static const struct watchdog_info mtk_wdt_info = {
147 .identity = DRV_NAME,
148 .options = WDIOF_SETTIMEOUT |
149 WDIOF_KEEPALIVEPING |
150 WDIOF_MAGICCLOSE,
153 static const struct watchdog_ops mtk_wdt_ops = {
154 .owner = THIS_MODULE,
155 .start = mtk_wdt_start,
156 .stop = mtk_wdt_stop,
157 .ping = mtk_wdt_ping,
158 .set_timeout = mtk_wdt_set_timeout,
159 .restart = mtk_wdt_restart,
162 static int mtk_wdt_probe(struct platform_device *pdev)
164 struct mtk_wdt_dev *mtk_wdt;
165 struct resource *res;
166 int err;
168 mtk_wdt = devm_kzalloc(&pdev->dev, sizeof(*mtk_wdt), GFP_KERNEL);
169 if (!mtk_wdt)
170 return -ENOMEM;
172 platform_set_drvdata(pdev, mtk_wdt);
174 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
175 mtk_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
176 if (IS_ERR(mtk_wdt->wdt_base))
177 return PTR_ERR(mtk_wdt->wdt_base);
179 mtk_wdt->wdt_dev.info = &mtk_wdt_info;
180 mtk_wdt->wdt_dev.ops = &mtk_wdt_ops;
181 mtk_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
182 mtk_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
183 mtk_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
184 mtk_wdt->wdt_dev.parent = &pdev->dev;
186 watchdog_init_timeout(&mtk_wdt->wdt_dev, timeout, &pdev->dev);
187 watchdog_set_nowayout(&mtk_wdt->wdt_dev, nowayout);
188 watchdog_set_restart_priority(&mtk_wdt->wdt_dev, 128);
190 watchdog_set_drvdata(&mtk_wdt->wdt_dev, mtk_wdt);
192 mtk_wdt_stop(&mtk_wdt->wdt_dev);
194 err = watchdog_register_device(&mtk_wdt->wdt_dev);
195 if (unlikely(err))
196 return err;
198 dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)\n",
199 mtk_wdt->wdt_dev.timeout, nowayout);
201 return 0;
204 static void mtk_wdt_shutdown(struct platform_device *pdev)
206 struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
208 if (watchdog_active(&mtk_wdt->wdt_dev))
209 mtk_wdt_stop(&mtk_wdt->wdt_dev);
212 static int mtk_wdt_remove(struct platform_device *pdev)
214 struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
216 watchdog_unregister_device(&mtk_wdt->wdt_dev);
218 return 0;
221 #ifdef CONFIG_PM_SLEEP
222 static int mtk_wdt_suspend(struct device *dev)
224 struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
226 if (watchdog_active(&mtk_wdt->wdt_dev))
227 mtk_wdt_stop(&mtk_wdt->wdt_dev);
229 return 0;
232 static int mtk_wdt_resume(struct device *dev)
234 struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
236 if (watchdog_active(&mtk_wdt->wdt_dev)) {
237 mtk_wdt_start(&mtk_wdt->wdt_dev);
238 mtk_wdt_ping(&mtk_wdt->wdt_dev);
241 return 0;
243 #endif
245 static const struct of_device_id mtk_wdt_dt_ids[] = {
246 { .compatible = "mediatek,mt6589-wdt" },
247 { /* sentinel */ }
249 MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
251 static const struct dev_pm_ops mtk_wdt_pm_ops = {
252 SET_SYSTEM_SLEEP_PM_OPS(mtk_wdt_suspend,
253 mtk_wdt_resume)
256 static struct platform_driver mtk_wdt_driver = {
257 .probe = mtk_wdt_probe,
258 .remove = mtk_wdt_remove,
259 .shutdown = mtk_wdt_shutdown,
260 .driver = {
261 .name = DRV_NAME,
262 .pm = &mtk_wdt_pm_ops,
263 .of_match_table = mtk_wdt_dt_ids,
267 module_platform_driver(mtk_wdt_driver);
269 module_param(timeout, uint, 0);
270 MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
272 module_param(nowayout, bool, 0);
273 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
274 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
276 MODULE_LICENSE("GPL");
277 MODULE_AUTHOR("Matthias Brugger <matthias.bgg@gmail.com>");
278 MODULE_DESCRIPTION("Mediatek WatchDog Timer Driver");
279 MODULE_VERSION(DRV_VERSION);