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iwmc3200wifi: Set WEP key from connect
[linux/fpc-iii.git] / drivers / usb / host / ehci-dbg.c
blob7f4ace73d44aee2da8e9484be8f103d8ec1e9bea
1 /*
2 * Copyright (c) 2001-2002 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19 /* this file is part of ehci-hcd.c */
20
21 #define ehci_dbg(ehci, fmt, args...) \
22 dev_dbg (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
23 #define ehci_err(ehci, fmt, args...) \
24 dev_err (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
25 #define ehci_info(ehci, fmt, args...) \
26 dev_info (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
27 #define ehci_warn(ehci, fmt, args...) \
28 dev_warn (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
29
30 #ifdef VERBOSE_DEBUG
31 # define vdbg dbg
32 # define ehci_vdbg ehci_dbg
33 #else
34 # define vdbg(fmt,args...) do { } while (0)
35 # define ehci_vdbg(ehci, fmt, args...) do { } while (0)
36 #endif
37
38 #ifdef DEBUG
39
40 /* check the values in the HCSPARAMS register
41 * (host controller _Structural_ parameters)
42 * see EHCI spec, Table 2-4 for each value
43 */
44 static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
45 {
46 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
47
48 ehci_dbg (ehci,
49 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
50 label, params,
51 HCS_DEBUG_PORT (params),
52 HCS_INDICATOR (params) ? " ind" : "",
53 HCS_N_CC (params),
54 HCS_N_PCC (params),
55 HCS_PORTROUTED (params) ? "" : " ordered",
56 HCS_PPC (params) ? "" : " !ppc",
57 HCS_N_PORTS (params)
58 );
59 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
60 if (HCS_PORTROUTED (params)) {
61 int i;
62 char buf [46], tmp [7], byte;
63
64 buf[0] = 0;
65 for (i = 0; i < HCS_N_PORTS (params); i++) {
66 // FIXME MIPS won't readb() ...
67 byte = readb (&ehci->caps->portroute[(i>>1)]);
68 sprintf(tmp, "%d ",
69 ((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
70 strcat(buf, tmp);
71 }
72 ehci_dbg (ehci, "%s portroute %s\n",
73 label, buf);
74 }
75 }
76 #else
77
78 static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
79
80 #endif
81
82 #ifdef DEBUG
83
84 /* check the values in the HCCPARAMS register
85 * (host controller _Capability_ parameters)
86 * see EHCI Spec, Table 2-5 for each value
87 * */
88 static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
89 {
90 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
91
92 if (HCC_ISOC_CACHE (params)) {
93 ehci_dbg (ehci,
94 "%s hcc_params %04x caching frame %s%s%s\n",
95 label, params,
96 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
97 HCC_CANPARK(params) ? " park" : "",
98 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
99 } else {
100 ehci_dbg (ehci,
101 "%s hcc_params %04x thresh %d uframes %s%s%s\n",
102 label,
103 params,
104 HCC_ISOC_THRES(params),
105 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
106 HCC_CANPARK(params) ? " park" : "",
107 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
108 }
109 }
110 #else
111
112 static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {}
113
114 #endif
115
116 #ifdef DEBUG
117
118 static void __maybe_unused
119 dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
120 {
121 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
122 hc32_to_cpup(ehci, &qtd->hw_next),
123 hc32_to_cpup(ehci, &qtd->hw_alt_next),
124 hc32_to_cpup(ehci, &qtd->hw_token),
125 hc32_to_cpup(ehci, &qtd->hw_buf [0]));
126 if (qtd->hw_buf [1])
127 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
128 hc32_to_cpup(ehci, &qtd->hw_buf[1]),
129 hc32_to_cpup(ehci, &qtd->hw_buf[2]),
130 hc32_to_cpup(ehci, &qtd->hw_buf[3]),
131 hc32_to_cpup(ehci, &qtd->hw_buf[4]));
132 }
133
134 static void __maybe_unused
135 dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
136 {
137 ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
138 qh, qh->hw_next, qh->hw_info1, qh->hw_info2,
139 qh->hw_current);
140 dbg_qtd ("overlay", ehci, (struct ehci_qtd *) &qh->hw_qtd_next);
141 }
142
143 static void __maybe_unused
144 dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
145 {
146 ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
147 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
148 itd->urb);
149 ehci_dbg (ehci,
150 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
151 hc32_to_cpu(ehci, itd->hw_transaction[0]),
152 hc32_to_cpu(ehci, itd->hw_transaction[1]),
153 hc32_to_cpu(ehci, itd->hw_transaction[2]),
154 hc32_to_cpu(ehci, itd->hw_transaction[3]),
155 hc32_to_cpu(ehci, itd->hw_transaction[4]),
156 hc32_to_cpu(ehci, itd->hw_transaction[5]),
157 hc32_to_cpu(ehci, itd->hw_transaction[6]),
158 hc32_to_cpu(ehci, itd->hw_transaction[7]));
159 ehci_dbg (ehci,
160 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
161 hc32_to_cpu(ehci, itd->hw_bufp[0]),
162 hc32_to_cpu(ehci, itd->hw_bufp[1]),
163 hc32_to_cpu(ehci, itd->hw_bufp[2]),
164 hc32_to_cpu(ehci, itd->hw_bufp[3]),
165 hc32_to_cpu(ehci, itd->hw_bufp[4]),
166 hc32_to_cpu(ehci, itd->hw_bufp[5]),
167 hc32_to_cpu(ehci, itd->hw_bufp[6]));
168 ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n",
169 itd->index[0], itd->index[1], itd->index[2],
170 itd->index[3], itd->index[4], itd->index[5],
171 itd->index[6], itd->index[7]);
172 }
173
174 static void __maybe_unused
175 dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
176 {
177 ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
178 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
179 sitd->urb);
180 ehci_dbg (ehci,
181 " addr %08x sched %04x result %08x buf %08x %08x\n",
182 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
183 hc32_to_cpu(ehci, sitd->hw_uframe),
184 hc32_to_cpu(ehci, sitd->hw_results),
185 hc32_to_cpu(ehci, sitd->hw_buf[0]),
186 hc32_to_cpu(ehci, sitd->hw_buf[1]));
187 }
188
189 static int __maybe_unused
190 dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
191 {
192 return scnprintf (buf, len,
193 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
194 label, label [0] ? " " : "", status,
195 (status & STS_ASS) ? " Async" : "",
196 (status & STS_PSS) ? " Periodic" : "",
197 (status & STS_RECL) ? " Recl" : "",
198 (status & STS_HALT) ? " Halt" : "",
199 (status & STS_IAA) ? " IAA" : "",
200 (status & STS_FATAL) ? " FATAL" : "",
201 (status & STS_FLR) ? " FLR" : "",
202 (status & STS_PCD) ? " PCD" : "",
203 (status & STS_ERR) ? " ERR" : "",
204 (status & STS_INT) ? " INT" : ""
205 );
206 }
207
208 static int __maybe_unused
209 dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
210 {
211 return scnprintf (buf, len,
212 "%s%sintrenable %02x%s%s%s%s%s%s",
213 label, label [0] ? " " : "", enable,
214 (enable & STS_IAA) ? " IAA" : "",
215 (enable & STS_FATAL) ? " FATAL" : "",
216 (enable & STS_FLR) ? " FLR" : "",
217 (enable & STS_PCD) ? " PCD" : "",
218 (enable & STS_ERR) ? " ERR" : "",
219 (enable & STS_INT) ? " INT" : ""
220 );
221 }
222
223 static const char *const fls_strings [] =
224 { "1024", "512", "256", "??" };
225
226 static int
227 dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
228 {
229 return scnprintf (buf, len,
230 "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
231 label, label [0] ? " " : "", command,
232 (command & CMD_PARK) ? "park" : "(park)",
233 CMD_PARK_CNT (command),
234 (command >> 16) & 0x3f,
235 (command & CMD_LRESET) ? " LReset" : "",
236 (command & CMD_IAAD) ? " IAAD" : "",
237 (command & CMD_ASE) ? " Async" : "",
238 (command & CMD_PSE) ? " Periodic" : "",
239 fls_strings [(command >> 2) & 0x3],
240 (command & CMD_RESET) ? " Reset" : "",
241 (command & CMD_RUN) ? "RUN" : "HALT"
242 );
243 }
244
245 static int
246 dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
247 {
248 char *sig;
249
250 /* signaling state */
251 switch (status & (3 << 10)) {
252 case 0 << 10: sig = "se0"; break;
253 case 1 << 10: sig = "k"; break; /* low speed */
254 case 2 << 10: sig = "j"; break;
255 default: sig = "?"; break;
256 }
257
258 return scnprintf (buf, len,
259 "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
260 label, label [0] ? " " : "", port, status,
261 (status & PORT_POWER) ? " POWER" : "",
262 (status & PORT_OWNER) ? " OWNER" : "",
263 sig,
264 (status & PORT_RESET) ? " RESET" : "",
265 (status & PORT_SUSPEND) ? " SUSPEND" : "",
266 (status & PORT_RESUME) ? " RESUME" : "",
267 (status & PORT_OCC) ? " OCC" : "",
268 (status & PORT_OC) ? " OC" : "",
269 (status & PORT_PEC) ? " PEC" : "",
270 (status & PORT_PE) ? " PE" : "",
271 (status & PORT_CSC) ? " CSC" : "",
272 (status & PORT_CONNECT) ? " CONNECT" : "");
273 }
274
275 #else
276 static inline void __maybe_unused
277 dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
278 {}
279
280 static inline int __maybe_unused
281 dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
282 { return 0; }
283
284 static inline int __maybe_unused
285 dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
286 { return 0; }
287
288 static inline int __maybe_unused
289 dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
290 { return 0; }
291
292 static inline int __maybe_unused
293 dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
294 { return 0; }
295
296 #endif /* DEBUG */
297
298 /* functions have the "wrong" filename when they're output... */
299 #define dbg_status(ehci, label, status) { \
300 char _buf [80]; \
301 dbg_status_buf (_buf, sizeof _buf, label, status); \
302 ehci_dbg (ehci, "%s\n", _buf); \
303 }
304
305 #define dbg_cmd(ehci, label, command) { \
306 char _buf [80]; \
307 dbg_command_buf (_buf, sizeof _buf, label, command); \
308 ehci_dbg (ehci, "%s\n", _buf); \
309 }
310
311 #define dbg_port(ehci, label, port, status) { \
312 char _buf [80]; \
313 dbg_port_buf (_buf, sizeof _buf, label, port, status); \
314 ehci_dbg (ehci, "%s\n", _buf); \
315 }
316
317 /*-------------------------------------------------------------------------*/
318
319 #ifdef STUB_DEBUG_FILES
320
321 static inline void create_debug_files (struct ehci_hcd *bus) { }
322 static inline void remove_debug_files (struct ehci_hcd *bus) { }
323
324 #else
325
326 /* troubleshooting help: expose state in debugfs */
327
328 static int debug_async_open(struct inode *, struct file *);
329 static int debug_periodic_open(struct inode *, struct file *);
330 static int debug_registers_open(struct inode *, struct file *);
331 static int debug_async_open(struct inode *, struct file *);
332 static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
333 static int debug_close(struct inode *, struct file *);
334
335 static const struct file_operations debug_async_fops = {
336 .owner = THIS_MODULE,
337 .open = debug_async_open,
338 .read = debug_output,
339 .release = debug_close,
340 };
341 static const struct file_operations debug_periodic_fops = {
342 .owner = THIS_MODULE,
343 .open = debug_periodic_open,
344 .read = debug_output,
345 .release = debug_close,
346 };
347 static const struct file_operations debug_registers_fops = {
348 .owner = THIS_MODULE,
349 .open = debug_registers_open,
350 .read = debug_output,
351 .release = debug_close,
352 };
353
354 static struct dentry *ehci_debug_root;
355
356 struct debug_buffer {
357 ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
358 struct usb_bus *bus;
359 struct mutex mutex; /* protect filling of buffer */
360 size_t count; /* number of characters filled into buffer */
361 char *output_buf;
362 size_t alloc_size;
363 };
364
365 #define speed_char(info1) ({ char tmp; \
366 switch (info1 & (3 << 12)) { \
367 case 0 << 12: tmp = 'f'; break; \
368 case 1 << 12: tmp = 'l'; break; \
369 case 2 << 12: tmp = 'h'; break; \
370 default: tmp = '?'; break; \
371 }; tmp; })
372
373 static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
374 {
375 __u32 v = hc32_to_cpu(ehci, token);
376
377 if (v & QTD_STS_ACTIVE)
378 return '*';
379 if (v & QTD_STS_HALT)
380 return '-';
381 if (!IS_SHORT_READ (v))
382 return ' ';
383 /* tries to advance through hw_alt_next */
384 return '/';
385 }
386
387 static void qh_lines (
388 struct ehci_hcd *ehci,
389 struct ehci_qh *qh,
390 char **nextp,
391 unsigned *sizep
392 )
393 {
394 u32 scratch;
395 u32 hw_curr;
396 struct list_head *entry;
397 struct ehci_qtd *td;
398 unsigned temp;
399 unsigned size = *sizep;
400 char *next = *nextp;
401 char mark;
402 __le32 list_end = EHCI_LIST_END(ehci);
403
404 if (qh->hw_qtd_next == list_end) /* NEC does this */
405 mark = '@';
406 else
407 mark = token_mark(ehci, qh->hw_token);
408 if (mark == '/') { /* qh_alt_next controls qh advance? */
409 if ((qh->hw_alt_next & QTD_MASK(ehci))
410 == ehci->async->hw_alt_next)
411 mark = '#'; /* blocked */
412 else if (qh->hw_alt_next == list_end)
413 mark = '.'; /* use hw_qtd_next */
414 /* else alt_next points to some other qtd */
415 }
416 scratch = hc32_to_cpup(ehci, &qh->hw_info1);
417 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &qh->hw_current) : 0;
418 temp = scnprintf (next, size,
419 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
420 qh, scratch & 0x007f,
421 speed_char (scratch),
422 (scratch >> 8) & 0x000f,
423 scratch, hc32_to_cpup(ehci, &qh->hw_info2),
424 hc32_to_cpup(ehci, &qh->hw_token), mark,
425 (cpu_to_hc32(ehci, QTD_TOGGLE) & qh->hw_token)
426 ? "data1" : "data0",
427 (hc32_to_cpup(ehci, &qh->hw_alt_next) >> 1) & 0x0f);
428 size -= temp;
429 next += temp;
430
431 /* hc may be modifying the list as we read it ... */
432 list_for_each (entry, &qh->qtd_list) {
433 td = list_entry (entry, struct ehci_qtd, qtd_list);
434 scratch = hc32_to_cpup(ehci, &td->hw_token);
435 mark = ' ';
436 if (hw_curr == td->qtd_dma)
437 mark = '*';
438 else if (qh->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma))
439 mark = '+';
440 else if (QTD_LENGTH (scratch)) {
441 if (td->hw_alt_next == ehci->async->hw_alt_next)
442 mark = '#';
443 else if (td->hw_alt_next != list_end)
444 mark = '/';
445 }
446 temp = snprintf (next, size,
447 "\n\t%p%c%s len=%d %08x urb %p",
448 td, mark, ({ char *tmp;
449 switch ((scratch>>8)&0x03) {
450 case 0: tmp = "out"; break;
451 case 1: tmp = "in"; break;
452 case 2: tmp = "setup"; break;
453 default: tmp = "?"; break;
454 } tmp;}),
455 (scratch >> 16) & 0x7fff,
456 scratch,
457 td->urb);
458 if (size < temp)
459 temp = size;
460 size -= temp;
461 next += temp;
462 if (temp == size)
463 goto done;
464 }
465
466 temp = snprintf (next, size, "\n");
467 if (size < temp)
468 temp = size;
469 size -= temp;
470 next += temp;
471
472 done:
473 *sizep = size;
474 *nextp = next;
475 }
476
477 static ssize_t fill_async_buffer(struct debug_buffer *buf)
478 {
479 struct usb_hcd *hcd;
480 struct ehci_hcd *ehci;
481 unsigned long flags;
482 unsigned temp, size;
483 char *next;
484 struct ehci_qh *qh;
485
486 hcd = bus_to_hcd(buf->bus);
487 ehci = hcd_to_ehci (hcd);
488 next = buf->output_buf;
489 size = buf->alloc_size;
490
491 *next = 0;
492
493 /* dumps a snapshot of the async schedule.
494 * usually empty except for long-term bulk reads, or head.
495 * one QH per line, and TDs we know about
496 */
497 spin_lock_irqsave (&ehci->lock, flags);
498 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
499 qh_lines (ehci, qh, &next, &size);
500 if (ehci->reclaim && size > 0) {
501 temp = scnprintf (next, size, "\nreclaim =\n");
502 size -= temp;
503 next += temp;
504
505 for (qh = ehci->reclaim; size > 0 && qh; qh = qh->reclaim)
506 qh_lines (ehci, qh, &next, &size);
507 }
508 spin_unlock_irqrestore (&ehci->lock, flags);
509
510 return strlen(buf->output_buf);
511 }
512
513 #define DBG_SCHED_LIMIT 64
514 static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
515 {
516 struct usb_hcd *hcd;
517 struct ehci_hcd *ehci;
518 unsigned long flags;
519 union ehci_shadow p, *seen;
520 unsigned temp, size, seen_count;
521 char *next;
522 unsigned i;
523 __hc32 tag;
524
525 if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
526 return 0;
527 seen_count = 0;
528
529 hcd = bus_to_hcd(buf->bus);
530 ehci = hcd_to_ehci (hcd);
531 next = buf->output_buf;
532 size = buf->alloc_size;
533
534 temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size);
535 size -= temp;
536 next += temp;
537
538 /* dump a snapshot of the periodic schedule.
539 * iso changes, interrupt usually doesn't.
540 */
541 spin_lock_irqsave (&ehci->lock, flags);
542 for (i = 0; i < ehci->periodic_size; i++) {
543 p = ehci->pshadow [i];
544 if (likely (!p.ptr))
545 continue;
546 tag = Q_NEXT_TYPE(ehci, ehci->periodic [i]);
547
548 temp = scnprintf (next, size, "%4d: ", i);
549 size -= temp;
550 next += temp;
551
552 do {
553 switch (hc32_to_cpu(ehci, tag)) {
554 case Q_TYPE_QH:
555 temp = scnprintf (next, size, " qh%d-%04x/%p",
556 p.qh->period,
557 hc32_to_cpup(ehci,
558 &p.qh->hw_info2)
559 /* uframe masks */
560 & (QH_CMASK | QH_SMASK),
561 p.qh);
562 size -= temp;
563 next += temp;
564 /* don't repeat what follows this qh */
565 for (temp = 0; temp < seen_count; temp++) {
566 if (seen [temp].ptr != p.ptr)
567 continue;
568 if (p.qh->qh_next.ptr) {
569 temp = scnprintf (next, size,
570 " ...");
571 size -= temp;
572 next += temp;
573 }
574 break;
575 }
576 /* show more info the first time around */
577 if (temp == seen_count) {
578 u32 scratch = hc32_to_cpup(ehci,
579 &p.qh->hw_info1);
580 struct ehci_qtd *qtd;
581 char *type = "";
582
583 /* count tds, get ep direction */
584 temp = 0;
585 list_for_each_entry (qtd,
586 &p.qh->qtd_list,
587 qtd_list) {
588 temp++;
589 switch (0x03 & (hc32_to_cpu(
590 ehci,
591 qtd->hw_token) >> 8)) {
592 case 0: type = "out"; continue;
593 case 1: type = "in"; continue;
594 }
595 }
596
597 temp = scnprintf (next, size,
598 " (%c%d ep%d%s "
599 "[%d/%d] q%d p%d)",
600 speed_char (scratch),
601 scratch & 0x007f,
602 (scratch >> 8) & 0x000f, type,
603 p.qh->usecs, p.qh->c_usecs,
604 temp,
605 0x7ff & (scratch >> 16));
606
607 if (seen_count < DBG_SCHED_LIMIT)
608 seen [seen_count++].qh = p.qh;
609 } else
610 temp = 0;
611 if (p.qh) {
612 tag = Q_NEXT_TYPE(ehci, p.qh->hw_next);
613 p = p.qh->qh_next;
614 }
615 break;
616 case Q_TYPE_FSTN:
617 temp = scnprintf (next, size,
618 " fstn-%8x/%p", p.fstn->hw_prev,
619 p.fstn);
620 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
621 p = p.fstn->fstn_next;
622 break;
623 case Q_TYPE_ITD:
624 temp = scnprintf (next, size,
625 " itd/%p", p.itd);
626 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
627 p = p.itd->itd_next;
628 break;
629 case Q_TYPE_SITD:
630 temp = scnprintf (next, size,
631 " sitd%d-%04x/%p",
632 p.sitd->stream->interval,
633 hc32_to_cpup(ehci, &p.sitd->hw_uframe)
634 & 0x0000ffff,
635 p.sitd);
636 tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
637 p = p.sitd->sitd_next;
638 break;
639 }
640 size -= temp;
641 next += temp;
642 } while (p.ptr);
643
644 temp = scnprintf (next, size, "\n");
645 size -= temp;
646 next += temp;
647 }
648 spin_unlock_irqrestore (&ehci->lock, flags);
649 kfree (seen);
650
651 return buf->alloc_size - size;
652 }
653 #undef DBG_SCHED_LIMIT
654
655 static ssize_t fill_registers_buffer(struct debug_buffer *buf)
656 {
657 struct usb_hcd *hcd;
658 struct ehci_hcd *ehci;
659 unsigned long flags;
660 unsigned temp, size, i;
661 char *next, scratch [80];
662 static char fmt [] = "%*s\n";
663 static char label [] = "";
664
665 hcd = bus_to_hcd(buf->bus);
666 ehci = hcd_to_ehci (hcd);
667 next = buf->output_buf;
668 size = buf->alloc_size;
669
670 spin_lock_irqsave (&ehci->lock, flags);
671
672 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
673 size = scnprintf (next, size,
674 "bus %s, device %s\n"
675 "%s\n"
676 "SUSPENDED (no register access)\n",
677 hcd->self.controller->bus->name,
678 dev_name(hcd->self.controller),
679 hcd->product_desc);
680 goto done;
681 }
682
683 /* Capability Registers */
684 i = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
685 temp = scnprintf (next, size,
686 "bus %s, device %s\n"
687 "%s\n"
688 "EHCI %x.%02x, hcd state %d\n",
689 hcd->self.controller->bus->name,
690 dev_name(hcd->self.controller),
691 hcd->product_desc,
692 i >> 8, i & 0x0ff, hcd->state);
693 size -= temp;
694 next += temp;
695
696 #ifdef CONFIG_PCI
697 /* EHCI 0.96 and later may have "extended capabilities" */
698 if (hcd->self.controller->bus == &pci_bus_type) {
699 struct pci_dev *pdev;
700 u32 offset, cap, cap2;
701 unsigned count = 256/4;
702
703 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
704 offset = HCC_EXT_CAPS(ehci_readl(ehci,
705 &ehci->caps->hcc_params));
706 while (offset && count--) {
707 pci_read_config_dword (pdev, offset, &cap);
708 switch (cap & 0xff) {
709 case 1:
710 temp = scnprintf (next, size,
711 "ownership %08x%s%s\n", cap,
712 (cap & (1 << 24)) ? " linux" : "",
713 (cap & (1 << 16)) ? " firmware" : "");
714 size -= temp;
715 next += temp;
716
717 offset += 4;
718 pci_read_config_dword (pdev, offset, &cap2);
719 temp = scnprintf (next, size,
720 "SMI sts/enable 0x%08x\n", cap2);
721 size -= temp;
722 next += temp;
723 break;
724 case 0: /* illegal reserved capability */
725 cap = 0;
726 /* FALLTHROUGH */
727 default: /* unknown */
728 break;
729 }
730 temp = (cap >> 8) & 0xff;
731 }
732 }
733 #endif
734
735 // FIXME interpret both types of params
736 i = ehci_readl(ehci, &ehci->caps->hcs_params);
737 temp = scnprintf (next, size, "structural params 0x%08x\n", i);
738 size -= temp;
739 next += temp;
740
741 i = ehci_readl(ehci, &ehci->caps->hcc_params);
742 temp = scnprintf (next, size, "capability params 0x%08x\n", i);
743 size -= temp;
744 next += temp;
745
746 /* Operational Registers */
747 temp = dbg_status_buf (scratch, sizeof scratch, label,
748 ehci_readl(ehci, &ehci->regs->status));
749 temp = scnprintf (next, size, fmt, temp, scratch);
750 size -= temp;
751 next += temp;
752
753 temp = dbg_command_buf (scratch, sizeof scratch, label,
754 ehci_readl(ehci, &ehci->regs->command));
755 temp = scnprintf (next, size, fmt, temp, scratch);
756 size -= temp;
757 next += temp;
758
759 temp = dbg_intr_buf (scratch, sizeof scratch, label,
760 ehci_readl(ehci, &ehci->regs->intr_enable));
761 temp = scnprintf (next, size, fmt, temp, scratch);
762 size -= temp;
763 next += temp;
764
765 temp = scnprintf (next, size, "uframe %04x\n",
766 ehci_readl(ehci, &ehci->regs->frame_index));
767 size -= temp;
768 next += temp;
769
770 for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
771 temp = dbg_port_buf (scratch, sizeof scratch, label, i,
772 ehci_readl(ehci,
773 &ehci->regs->port_status[i - 1]));
774 temp = scnprintf (next, size, fmt, temp, scratch);
775 size -= temp;
776 next += temp;
777 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
778 temp = scnprintf (next, size,
779 " debug control %08x\n",
780 ehci_readl(ehci,
781 &ehci->debug->control));
782 size -= temp;
783 next += temp;
784 }
785 }
786
787 if (ehci->reclaim) {
788 temp = scnprintf(next, size, "reclaim qh %p\n", ehci->reclaim);
789 size -= temp;
790 next += temp;
791 }
792
793 #ifdef EHCI_STATS
794 temp = scnprintf (next, size,
795 "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
796 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
797 ehci->stats.lost_iaa);
798 size -= temp;
799 next += temp;
800
801 temp = scnprintf (next, size, "complete %ld unlink %ld\n",
802 ehci->stats.complete, ehci->stats.unlink);
803 size -= temp;
804 next += temp;
805 #endif
806
807 done:
808 spin_unlock_irqrestore (&ehci->lock, flags);
809
810 return buf->alloc_size - size;
811 }
812
813 static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
814 ssize_t (*fill_func)(struct debug_buffer *))
815 {
816 struct debug_buffer *buf;
817
818 buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
819
820 if (buf) {
821 buf->bus = bus;
822 buf->fill_func = fill_func;
823 mutex_init(&buf->mutex);
824 buf->alloc_size = PAGE_SIZE;
825 }
826
827 return buf;
828 }
829
830 static int fill_buffer(struct debug_buffer *buf)
831 {
832 int ret = 0;
833
834 if (!buf->output_buf)
835 buf->output_buf = (char *)vmalloc(buf->alloc_size);
836
837 if (!buf->output_buf) {
838 ret = -ENOMEM;
839 goto out;
840 }
841
842 ret = buf->fill_func(buf);
843
844 if (ret >= 0) {
845 buf->count = ret;
846 ret = 0;
847 }
848
849 out:
850 return ret;
851 }
852
853 static ssize_t debug_output(struct file *file, char __user *user_buf,
854 size_t len, loff_t *offset)
855 {
856 struct debug_buffer *buf = file->private_data;
857 int ret = 0;
858
859 mutex_lock(&buf->mutex);
860 if (buf->count == 0) {
861 ret = fill_buffer(buf);
862 if (ret != 0) {
863 mutex_unlock(&buf->mutex);
864 goto out;
865 }
866 }
867 mutex_unlock(&buf->mutex);
868
869 ret = simple_read_from_buffer(user_buf, len, offset,
870 buf->output_buf, buf->count);
871
872 out:
873 return ret;
874
875 }
876
877 static int debug_close(struct inode *inode, struct file *file)
878 {
879 struct debug_buffer *buf = file->private_data;
880
881 if (buf) {
882 if (buf->output_buf)
883 vfree(buf->output_buf);
884 kfree(buf);
885 }
886
887 return 0;
888 }
889 static int debug_async_open(struct inode *inode, struct file *file)
890 {
891 file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
892
893 return file->private_data ? 0 : -ENOMEM;
894 }
895
896 static int debug_periodic_open(struct inode *inode, struct file *file)
897 {
898 struct debug_buffer *buf;
899 buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
900 if (!buf)
901 return -ENOMEM;
902
903 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE;
904 file->private_data = buf;
905 return 0;
906 }
907
908 static int debug_registers_open(struct inode *inode, struct file *file)
909 {
910 file->private_data = alloc_buffer(inode->i_private,
911 fill_registers_buffer);
912
913 return file->private_data ? 0 : -ENOMEM;
914 }
915
916 static inline void create_debug_files (struct ehci_hcd *ehci)
917 {
918 struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
919
920 ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
921 if (!ehci->debug_dir)
922 goto dir_error;
923
924 ehci->debug_async = debugfs_create_file("async", S_IRUGO,
925 ehci->debug_dir, bus,
926 &debug_async_fops);
927 if (!ehci->debug_async)
928 goto async_error;
929
930 ehci->debug_periodic = debugfs_create_file("periodic", S_IRUGO,
931 ehci->debug_dir, bus,
932 &debug_periodic_fops);
933 if (!ehci->debug_periodic)
934 goto periodic_error;
935
936 ehci->debug_registers = debugfs_create_file("registers", S_IRUGO,
937 ehci->debug_dir, bus,
938 &debug_registers_fops);
939 if (!ehci->debug_registers)
940 goto registers_error;
941 return;
942
943 registers_error:
944 debugfs_remove(ehci->debug_periodic);
945 periodic_error:
946 debugfs_remove(ehci->debug_async);
947 async_error:
948 debugfs_remove(ehci->debug_dir);
949 dir_error:
950 ehci->debug_periodic = NULL;
951 ehci->debug_async = NULL;
952 ehci->debug_dir = NULL;
953 }
954
955 static inline void remove_debug_files (struct ehci_hcd *ehci)
956 {
957 debugfs_remove(ehci->debug_registers);
958 debugfs_remove(ehci->debug_periodic);
959 debugfs_remove(ehci->debug_async);
960 debugfs_remove(ehci->debug_dir);
961 }
962
963 #endif /* STUB_DEBUG_FILES */
Linux with added FPC-III support