arch/arm/mach-imx/clk.h

   1 #ifndef __MACH_IMX_CLK_H
   2 #define __MACH_IMX_CLK_H
   3
   4 #include <linux/spinlock.h>
   5 #include <linux/clk-provider.h>
   6
   7 extern spinlock_t imx_ccm_lock;
   8
   9 void imx_check_clocks(struct clk *clks[], unsigned int count);
  10
  11 extern void imx_cscmr1_fixup(u32 *val);
  12
  13 struct clk *imx_clk_pllv1(const char *name, const char *parent,
  14                 void __iomem *base);
  15
  16 struct clk *imx_clk_pllv2(const char *name, const char *parent,
  17                 void __iomem *base);
  18
  19 enum imx_pllv3_type {
  20         IMX_PLLV3_GENERIC,
  21         IMX_PLLV3_SYS,
  22         IMX_PLLV3_USB,
  23         IMX_PLLV3_AV,
  24         IMX_PLLV3_ENET,
  25 };
  26
  27 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
  28                 const char *parent_name, void __iomem *base, u32 div_mask);
  29
  30 struct clk *clk_register_gate2(struct device *dev, const char *name,
  31                 const char *parent_name, unsigned long flags,
  32                 void __iomem *reg, u8 bit_idx,
  33                 u8 clk_gate_flags, spinlock_t *lock,
  34                 unsigned int *share_count);
  35
  36 struct clk * imx_obtain_fixed_clock(
  37                         const char *name, unsigned long rate);
  38
  39 struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
  40          void __iomem *reg, u8 shift, u32 exclusive_mask);
  41
  42 static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
  43                 void __iomem *reg, u8 shift)
  44 {
  45         return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  46                         shift, 0, &imx_ccm_lock, NULL);
  47 }
  48
  49 static inline struct clk *imx_clk_gate2_shared(const char *name,
  50                 const char *parent, void __iomem *reg, u8 shift,
  51                 unsigned int *share_count)
  52 {
  53         return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  54                         shift, 0, &imx_ccm_lock, share_count);
  55 }
  56
  57 struct clk *imx_clk_pfd(const char *name, const char *parent_name,
  58                 void __iomem *reg, u8 idx);
  59
  60 struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
  61                                  void __iomem *reg, u8 shift, u8 width,
  62                                  void __iomem *busy_reg, u8 busy_shift);
  63
  64 struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
  65                              u8 width, void __iomem *busy_reg, u8 busy_shift,
  66                              const char **parent_names, int num_parents);
  67
  68 struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
  69                                   void __iomem *reg, u8 shift, u8 width,
  70                                   void (*fixup)(u32 *val));
  71
  72 struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
  73                               u8 shift, u8 width, const char **parents,
  74                               int num_parents, void (*fixup)(u32 *val));
  75
  76 static inline struct clk *imx_clk_fixed(const char *name, int rate)
  77 {
  78         return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
  79 }
  80
  81 static inline struct clk *imx_clk_divider(const char *name, const char *parent,
  82                 void __iomem *reg, u8 shift, u8 width)
  83 {
  84         return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
  85                         reg, shift, width, 0, &imx_ccm_lock);
  86 }
  87
  88 static inline struct clk *imx_clk_divider_flags(const char *name,
  89                 const char *parent, void __iomem *reg, u8 shift, u8 width,
  90                 unsigned long flags)
  91 {
  92         return clk_register_divider(NULL, name, parent, flags,
  93                         reg, shift, width, 0, &imx_ccm_lock);
  94 }
  95
  96 static inline struct clk *imx_clk_gate(const char *name, const char *parent,
  97                 void __iomem *reg, u8 shift)
  98 {
  99         return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
 100                         shift, 0, &imx_ccm_lock);
 101 }
 102
 103 static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
 104                 void __iomem *reg, u8 shift)
 105 {
 106         return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
 107                         shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
 108 }
 109
 110 static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
 111                 u8 shift, u8 width, const char **parents, int num_parents)
 112 {
 113         return clk_register_mux(NULL, name, parents, num_parents,
 114                         CLK_SET_RATE_NO_REPARENT, reg, shift,
 115                         width, 0, &imx_ccm_lock);
 116 }
 117
 118 static inline struct clk *imx_clk_mux_flags(const char *name,
 119                 void __iomem *reg, u8 shift, u8 width, const char **parents,
 120                 int num_parents, unsigned long flags)
 121 {
 122         return clk_register_mux(NULL, name, parents, num_parents,
 123                         flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
 124                         &imx_ccm_lock);
 125 }
 126
 127 static inline struct clk *imx_clk_fixed_factor(const char *name,
 128                 const char *parent, unsigned int mult, unsigned int div)
 129 {
 130         return clk_register_fixed_factor(NULL, name, parent,
 131                         CLK_SET_RATE_PARENT, mult, div);
 132 }
 133
 134 #endif