?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
dt-bindings: mtd: ingenic: Use standard ecc-engine property
[linux/fpc-iii.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_trace.h
blobd3ca2424b5fe9a153a67eb6d77d1f59bcb7ba729
1 /*
2 * Copyright 2017 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24 #if !defined(_AMDGPU_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
25 #define _AMDGPU_TRACE_H_
26
27 #include <linux/stringify.h>
28 #include <linux/types.h>
29 #include <linux/tracepoint.h>
30
31 #include <drm/drmP.h>
32
33 #undef TRACE_SYSTEM
34 #define TRACE_SYSTEM amdgpu
35 #define TRACE_INCLUDE_FILE amdgpu_trace
36
37 #define AMDGPU_JOB_GET_TIMELINE_NAME(job) \
38 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished)
39
40 TRACE_EVENT(amdgpu_mm_rreg,
41 TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
42 TP_ARGS(did, reg, value),
43 TP_STRUCT__entry(
44 __field(unsigned, did)
45 __field(uint32_t, reg)
46 __field(uint32_t, value)
47 ),
48 TP_fast_assign(
49 __entry->did = did;
50 __entry->reg = reg;
51 __entry->value = value;
52 ),
53 TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
54 (unsigned long)__entry->did,
55 (unsigned long)__entry->reg,
56 (unsigned long)__entry->value)
57 );
58
59 TRACE_EVENT(amdgpu_mm_wreg,
60 TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
61 TP_ARGS(did, reg, value),
62 TP_STRUCT__entry(
63 __field(unsigned, did)
64 __field(uint32_t, reg)
65 __field(uint32_t, value)
66 ),
67 TP_fast_assign(
68 __entry->did = did;
69 __entry->reg = reg;
70 __entry->value = value;
71 ),
72 TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
73 (unsigned long)__entry->did,
74 (unsigned long)__entry->reg,
75 (unsigned long)__entry->value)
76 );
77
78 TRACE_EVENT(amdgpu_iv,
79 TP_PROTO(unsigned ih, struct amdgpu_iv_entry *iv),
80 TP_ARGS(ih, iv),
81 TP_STRUCT__entry(
82 __field(unsigned, ih)
83 __field(unsigned, client_id)
84 __field(unsigned, src_id)
85 __field(unsigned, ring_id)
86 __field(unsigned, vmid)
87 __field(unsigned, vmid_src)
88 __field(uint64_t, timestamp)
89 __field(unsigned, timestamp_src)
90 __field(unsigned, pasid)
91 __array(unsigned, src_data, 4)
92 ),
93 TP_fast_assign(
94 __entry->ih = ih;
95 __entry->client_id = iv->client_id;
96 __entry->src_id = iv->src_id;
97 __entry->ring_id = iv->ring_id;
98 __entry->vmid = iv->vmid;
99 __entry->vmid_src = iv->vmid_src;
100 __entry->timestamp = iv->timestamp;
101 __entry->timestamp_src = iv->timestamp_src;
102 __entry->pasid = iv->pasid;
103 __entry->src_data[0] = iv->src_data[0];
104 __entry->src_data[1] = iv->src_data[1];
105 __entry->src_data[2] = iv->src_data[2];
106 __entry->src_data[3] = iv->src_data[3];
107 ),
108 TP_printk("ih:%u client_id:%u src_id:%u ring:%u vmid:%u "
109 "timestamp: %llu pasid:%u src_data: %08x %08x %08x %08x",
110 __entry->ih, __entry->client_id, __entry->src_id,
111 __entry->ring_id, __entry->vmid,
112 __entry->timestamp, __entry->pasid,
113 __entry->src_data[0], __entry->src_data[1],
114 __entry->src_data[2], __entry->src_data[3])
115 );
116
117
118 TRACE_EVENT(amdgpu_bo_create,
119 TP_PROTO(struct amdgpu_bo *bo),
120 TP_ARGS(bo),
121 TP_STRUCT__entry(
122 __field(struct amdgpu_bo *, bo)
123 __field(u32, pages)
124 __field(u32, type)
125 __field(u32, prefer)
126 __field(u32, allow)
127 __field(u32, visible)
128 ),
129
130 TP_fast_assign(
131 __entry->bo = bo;
132 __entry->pages = bo->tbo.num_pages;
133 __entry->type = bo->tbo.mem.mem_type;
134 __entry->prefer = bo->preferred_domains;
135 __entry->allow = bo->allowed_domains;
136 __entry->visible = bo->flags;
137 ),
138
139 TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d",
140 __entry->bo, __entry->pages, __entry->type,
141 __entry->prefer, __entry->allow, __entry->visible)
142 );
143
144 TRACE_EVENT(amdgpu_cs,
145 TP_PROTO(struct amdgpu_cs_parser *p, int i),
146 TP_ARGS(p, i),
147 TP_STRUCT__entry(
148 __field(struct amdgpu_bo_list *, bo_list)
149 __field(u32, ring)
150 __field(u32, dw)
151 __field(u32, fences)
152 ),
153
154 TP_fast_assign(
155 __entry->bo_list = p->bo_list;
156 __entry->ring = to_amdgpu_ring(p->entity->rq->sched)->idx;
157 __entry->dw = p->job->ibs[i].length_dw;
158 __entry->fences = amdgpu_fence_count_emitted(
159 to_amdgpu_ring(p->entity->rq->sched));
160 ),
161 TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u",
162 __entry->bo_list, __entry->ring, __entry->dw,
163 __entry->fences)
164 );
165
166 TRACE_EVENT(amdgpu_cs_ioctl,
167 TP_PROTO(struct amdgpu_job *job),
168 TP_ARGS(job),
169 TP_STRUCT__entry(
170 __field(uint64_t, sched_job_id)
171 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
172 __field(unsigned int, context)
173 __field(unsigned int, seqno)
174 __field(struct dma_fence *, fence)
175 __field(char *, ring_name)
176 __field(u32, num_ibs)
177 ),
178
179 TP_fast_assign(
180 __entry->sched_job_id = job->base.id;
181 __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
182 __entry->context = job->base.s_fence->finished.context;
183 __entry->seqno = job->base.s_fence->finished.seqno;
184 __entry->ring_name = to_amdgpu_ring(job->base.sched)->name;
185 __entry->num_ibs = job->num_ibs;
186 ),
187 TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
188 __entry->sched_job_id, __get_str(timeline), __entry->context,
189 __entry->seqno, __entry->ring_name, __entry->num_ibs)
190 );
191
192 TRACE_EVENT(amdgpu_sched_run_job,
193 TP_PROTO(struct amdgpu_job *job),
194 TP_ARGS(job),
195 TP_STRUCT__entry(
196 __field(uint64_t, sched_job_id)
197 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
198 __field(unsigned int, context)
199 __field(unsigned int, seqno)
200 __field(char *, ring_name)
201 __field(u32, num_ibs)
202 ),
203
204 TP_fast_assign(
205 __entry->sched_job_id = job->base.id;
206 __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
207 __entry->context = job->base.s_fence->finished.context;
208 __entry->seqno = job->base.s_fence->finished.seqno;
209 __entry->ring_name = to_amdgpu_ring(job->base.sched)->name;
210 __entry->num_ibs = job->num_ibs;
211 ),
212 TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
213 __entry->sched_job_id, __get_str(timeline), __entry->context,
214 __entry->seqno, __entry->ring_name, __entry->num_ibs)
215 );
216
217
218 TRACE_EVENT(amdgpu_vm_grab_id,
219 TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
220 struct amdgpu_job *job),
221 TP_ARGS(vm, ring, job),
222 TP_STRUCT__entry(
223 __field(u32, pasid)
224 __string(ring, ring->name)
225 __field(u32, ring)
226 __field(u32, vmid)
227 __field(u32, vm_hub)
228 __field(u64, pd_addr)
229 __field(u32, needs_flush)
230 ),
231
232 TP_fast_assign(
233 __entry->pasid = vm->pasid;
234 __assign_str(ring, ring->name)
235 __entry->vmid = job->vmid;
236 __entry->vm_hub = ring->funcs->vmhub,
237 __entry->pd_addr = job->vm_pd_addr;
238 __entry->needs_flush = job->vm_needs_flush;
239 ),
240 TP_printk("pasid=%d, ring=%s, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u",
241 __entry->pasid, __get_str(ring), __entry->vmid,
242 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush)
243 );
244
245 TRACE_EVENT(amdgpu_vm_bo_map,
246 TP_PROTO(struct amdgpu_bo_va *bo_va,
247 struct amdgpu_bo_va_mapping *mapping),
248 TP_ARGS(bo_va, mapping),
249 TP_STRUCT__entry(
250 __field(struct amdgpu_bo *, bo)
251 __field(long, start)
252 __field(long, last)
253 __field(u64, offset)
254 __field(u64, flags)
255 ),
256
257 TP_fast_assign(
258 __entry->bo = bo_va ? bo_va->base.bo : NULL;
259 __entry->start = mapping->start;
260 __entry->last = mapping->last;
261 __entry->offset = mapping->offset;
262 __entry->flags = mapping->flags;
263 ),
264 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
265 __entry->bo, __entry->start, __entry->last,
266 __entry->offset, __entry->flags)
267 );
268
269 TRACE_EVENT(amdgpu_vm_bo_unmap,
270 TP_PROTO(struct amdgpu_bo_va *bo_va,
271 struct amdgpu_bo_va_mapping *mapping),
272 TP_ARGS(bo_va, mapping),
273 TP_STRUCT__entry(
274 __field(struct amdgpu_bo *, bo)
275 __field(long, start)
276 __field(long, last)
277 __field(u64, offset)
278 __field(u64, flags)
279 ),
280
281 TP_fast_assign(
282 __entry->bo = bo_va ? bo_va->base.bo : NULL;
283 __entry->start = mapping->start;
284 __entry->last = mapping->last;
285 __entry->offset = mapping->offset;
286 __entry->flags = mapping->flags;
287 ),
288 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
289 __entry->bo, __entry->start, __entry->last,
290 __entry->offset, __entry->flags)
291 );
292
293 DECLARE_EVENT_CLASS(amdgpu_vm_mapping,
294 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
295 TP_ARGS(mapping),
296 TP_STRUCT__entry(
297 __field(u64, soffset)
298 __field(u64, eoffset)
299 __field(u64, flags)
300 ),
301
302 TP_fast_assign(
303 __entry->soffset = mapping->start;
304 __entry->eoffset = mapping->last + 1;
305 __entry->flags = mapping->flags;
306 ),
307 TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx",
308 __entry->soffset, __entry->eoffset, __entry->flags)
309 );
310
311 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update,
312 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
313 TP_ARGS(mapping)
314 );
315
316 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping,
317 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
318 TP_ARGS(mapping)
319 );
320
321 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_cs,
322 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
323 TP_ARGS(mapping)
324 );
325
326 TRACE_EVENT(amdgpu_vm_set_ptes,
327 TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
328 uint32_t incr, uint64_t flags),
329 TP_ARGS(pe, addr, count, incr, flags),
330 TP_STRUCT__entry(
331 __field(u64, pe)
332 __field(u64, addr)
333 __field(u32, count)
334 __field(u32, incr)
335 __field(u64, flags)
336 ),
337
338 TP_fast_assign(
339 __entry->pe = pe;
340 __entry->addr = addr;
341 __entry->count = count;
342 __entry->incr = incr;
343 __entry->flags = flags;
344 ),
345 TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u",
346 __entry->pe, __entry->addr, __entry->incr,
347 __entry->flags, __entry->count)
348 );
349
350 TRACE_EVENT(amdgpu_vm_copy_ptes,
351 TP_PROTO(uint64_t pe, uint64_t src, unsigned count),
352 TP_ARGS(pe, src, count),
353 TP_STRUCT__entry(
354 __field(u64, pe)
355 __field(u64, src)
356 __field(u32, count)
357 ),
358
359 TP_fast_assign(
360 __entry->pe = pe;
361 __entry->src = src;
362 __entry->count = count;
363 ),
364 TP_printk("pe=%010Lx, src=%010Lx, count=%u",
365 __entry->pe, __entry->src, __entry->count)
366 );
367
368 TRACE_EVENT(amdgpu_vm_flush,
369 TP_PROTO(struct amdgpu_ring *ring, unsigned vmid,
370 uint64_t pd_addr),
371 TP_ARGS(ring, vmid, pd_addr),
372 TP_STRUCT__entry(
373 __string(ring, ring->name)
374 __field(u32, vmid)
375 __field(u32, vm_hub)
376 __field(u64, pd_addr)
377 ),
378
379 TP_fast_assign(
380 __assign_str(ring, ring->name)
381 __entry->vmid = vmid;
382 __entry->vm_hub = ring->funcs->vmhub;
383 __entry->pd_addr = pd_addr;
384 ),
385 TP_printk("ring=%s, id=%u, hub=%u, pd_addr=%010Lx",
386 __get_str(ring), __entry->vmid,
387 __entry->vm_hub,__entry->pd_addr)
388 );
389
390 DECLARE_EVENT_CLASS(amdgpu_pasid,
391 TP_PROTO(unsigned pasid),
392 TP_ARGS(pasid),
393 TP_STRUCT__entry(
394 __field(unsigned, pasid)
395 ),
396 TP_fast_assign(
397 __entry->pasid = pasid;
398 ),
399 TP_printk("pasid=%u", __entry->pasid)
400 );
401
402 DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_allocated,
403 TP_PROTO(unsigned pasid),
404 TP_ARGS(pasid)
405 );
406
407 DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_freed,
408 TP_PROTO(unsigned pasid),
409 TP_ARGS(pasid)
410 );
411
412 TRACE_EVENT(amdgpu_bo_list_set,
413 TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo),
414 TP_ARGS(list, bo),
415 TP_STRUCT__entry(
416 __field(struct amdgpu_bo_list *, list)
417 __field(struct amdgpu_bo *, bo)
418 __field(u64, bo_size)
419 ),
420
421 TP_fast_assign(
422 __entry->list = list;
423 __entry->bo = bo;
424 __entry->bo_size = amdgpu_bo_size(bo);
425 ),
426 TP_printk("list=%p, bo=%p, bo_size=%Ld",
427 __entry->list,
428 __entry->bo,
429 __entry->bo_size)
430 );
431
432 TRACE_EVENT(amdgpu_cs_bo_status,
433 TP_PROTO(uint64_t total_bo, uint64_t total_size),
434 TP_ARGS(total_bo, total_size),
435 TP_STRUCT__entry(
436 __field(u64, total_bo)
437 __field(u64, total_size)
438 ),
439
440 TP_fast_assign(
441 __entry->total_bo = total_bo;
442 __entry->total_size = total_size;
443 ),
444 TP_printk("total_bo_size=%Ld, total_bo_count=%Ld",
445 __entry->total_bo, __entry->total_size)
446 );
447
448 TRACE_EVENT(amdgpu_bo_move,
449 TP_PROTO(struct amdgpu_bo* bo, uint32_t new_placement, uint32_t old_placement),
450 TP_ARGS(bo, new_placement, old_placement),
451 TP_STRUCT__entry(
452 __field(struct amdgpu_bo *, bo)
453 __field(u64, bo_size)
454 __field(u32, new_placement)
455 __field(u32, old_placement)
456 ),
457
458 TP_fast_assign(
459 __entry->bo = bo;
460 __entry->bo_size = amdgpu_bo_size(bo);
461 __entry->new_placement = new_placement;
462 __entry->old_placement = old_placement;
463 ),
464 TP_printk("bo=%p, from=%d, to=%d, size=%Ld",
465 __entry->bo, __entry->old_placement,
466 __entry->new_placement, __entry->bo_size)
467 );
468
469 TRACE_EVENT(amdgpu_ib_pipe_sync,
470 TP_PROTO(struct amdgpu_job *sched_job, struct dma_fence *fence),
471 TP_ARGS(sched_job, fence),
472 TP_STRUCT__entry(
473 __field(const char *,name)
474 __field(uint64_t, id)
475 __field(struct dma_fence *, fence)
476 __field(uint64_t, ctx)
477 __field(unsigned, seqno)
478 ),
479
480 TP_fast_assign(
481 __entry->name = sched_job->base.sched->name;
482 __entry->id = sched_job->base.id;
483 __entry->fence = fence;
484 __entry->ctx = fence->context;
485 __entry->seqno = fence->seqno;
486 ),
487 TP_printk("job ring=%s, id=%llu, need pipe sync to fence=%p, context=%llu, seq=%u",
488 __entry->name, __entry->id,
489 __entry->fence, __entry->ctx,
490 __entry->seqno)
491 );
492
493 #undef AMDGPU_JOB_GET_TIMELINE_NAME
494 #endif
495
496 /* This part must be outside protection */
497 #undef TRACE_INCLUDE_PATH
498 #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/amd/amdgpu
499 #include <trace/define_trace.h>
Linux with added FPC-III support