drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22
  23 #include "kfd_priv.h"
  24 #include "kfd_events.h"
  25 #include "cik_int.h"
  26 #include "amdgpu_amdkfd.h"
  27
  28 static bool cik_event_interrupt_isr(struct kfd_dev *dev,
  29                                         const uint32_t *ih_ring_entry,
  30                                         uint32_t *patched_ihre,
  31                                         bool *patched_flag)
  32 {
  33         const struct cik_ih_ring_entry *ihre =
  34                         (const struct cik_ih_ring_entry *)ih_ring_entry;
  35         const struct kfd2kgd_calls *f2g = dev->kfd2kgd;
  36         unsigned int vmid, pasid;
  37
  38         /* This workaround is due to HW/FW limitation on Hawaii that
  39          * VMID and PASID are not written into ih_ring_entry
  40          */
  41         if ((ihre->source_id == CIK_INTSRC_GFX_PAGE_INV_FAULT ||
  42                 ihre->source_id == CIK_INTSRC_GFX_MEM_PROT_FAULT) &&
  43                 dev->device_info->asic_family == CHIP_HAWAII) {
  44                 struct cik_ih_ring_entry *tmp_ihre =
  45                         (struct cik_ih_ring_entry *)patched_ihre;
  46
  47                 *patched_flag = true;
  48                 *tmp_ihre = *ihre;
  49
  50                 vmid = f2g->read_vmid_from_vmfault_reg(dev->kgd);
  51                 pasid = f2g->get_atc_vmid_pasid_mapping_pasid(dev->kgd, vmid);
  52
  53                 tmp_ihre->ring_id &= 0x000000ff;
  54                 tmp_ihre->ring_id |= vmid << 8;
  55                 tmp_ihre->ring_id |= pasid << 16;
  56
  57                 return (pasid != 0) &&
  58                         vmid >= dev->vm_info.first_vmid_kfd &&
  59                         vmid <= dev->vm_info.last_vmid_kfd;
  60         }
  61
  62         /* Only handle interrupts from KFD VMIDs */
  63         vmid  = (ihre->ring_id & 0x0000ff00) >> 8;
  64         if (vmid < dev->vm_info.first_vmid_kfd ||
  65             vmid > dev->vm_info.last_vmid_kfd)
  66                 return 0;
  67
  68         /* If there is no valid PASID, it's likely a firmware bug */
  69         pasid = (ihre->ring_id & 0xffff0000) >> 16;
  70         if (WARN_ONCE(pasid == 0, "FW bug: No PASID in KFD interrupt"))
  71                 return 0;
  72
  73         /* Interrupt types we care about: various signals and faults.
  74          * They will be forwarded to a work queue (see below).
  75          */
  76         return ihre->source_id == CIK_INTSRC_CP_END_OF_PIPE ||
  77                 ihre->source_id == CIK_INTSRC_SDMA_TRAP ||
  78                 ihre->source_id == CIK_INTSRC_SQ_INTERRUPT_MSG ||
  79                 ihre->source_id == CIK_INTSRC_CP_BAD_OPCODE ||
  80                 ihre->source_id == CIK_INTSRC_GFX_PAGE_INV_FAULT ||
  81                 ihre->source_id == CIK_INTSRC_GFX_MEM_PROT_FAULT;
  82 }
  83
  84 static void cik_event_interrupt_wq(struct kfd_dev *dev,
  85                                         const uint32_t *ih_ring_entry)
  86 {
  87         const struct cik_ih_ring_entry *ihre =
  88                         (const struct cik_ih_ring_entry *)ih_ring_entry;
  89         uint32_t context_id = ihre->data & 0xfffffff;
  90         unsigned int vmid  = (ihre->ring_id & 0x0000ff00) >> 8;
  91         unsigned int pasid = (ihre->ring_id & 0xffff0000) >> 16;
  92
  93         if (pasid == 0)
  94                 return;
  95
  96         if (ihre->source_id == CIK_INTSRC_CP_END_OF_PIPE)
  97                 kfd_signal_event_interrupt(pasid, context_id, 28);
  98         else if (ihre->source_id == CIK_INTSRC_SDMA_TRAP)
  99                 kfd_signal_event_interrupt(pasid, context_id, 28);
 100         else if (ihre->source_id == CIK_INTSRC_SQ_INTERRUPT_MSG)
 101                 kfd_signal_event_interrupt(pasid, context_id & 0xff, 8);
 102         else if (ihre->source_id == CIK_INTSRC_CP_BAD_OPCODE)
 103                 kfd_signal_hw_exception_event(pasid);
 104         else if (ihre->source_id == CIK_INTSRC_GFX_PAGE_INV_FAULT ||
 105                 ihre->source_id == CIK_INTSRC_GFX_MEM_PROT_FAULT) {
 106                 struct kfd_vm_fault_info info;
 107
 108                 kfd_process_vm_fault(dev->dqm, pasid);
 109
 110                 memset(&info, 0, sizeof(info));
 111                 amdgpu_amdkfd_gpuvm_get_vm_fault_info(dev->kgd, &info);
 112                 if (!info.page_addr && !info.status)
 113                         return;
 114
 115                 if (info.vmid == vmid)
 116                         kfd_signal_vm_fault_event(dev, pasid, &info);
 117                 else
 118                         kfd_signal_vm_fault_event(dev, pasid, NULL);
 119         }
 120 }
 121
 122 const struct kfd_event_interrupt_class event_interrupt_class_cik = {
 123         .interrupt_isr = cik_event_interrupt_isr,
 124         .interrupt_wq = cik_event_interrupt_wq,
 125 };