drivers/gpu/drm/ati_pcigart.c

   1 /**
   2  * \file ati_pcigart.c
   3  * ATI PCI GART support
   4  *
   5  * \author Gareth Hughes <gareth@valinux.com>
   6  */
   7
   8 /*
   9  * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
  10  *
  11  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  12  * All Rights Reserved.
  13  *
  14  * Permission is hereby granted, free of charge, to any person obtaining a
  15  * copy of this software and associated documentation files (the "Software"),
  16  * to deal in the Software without restriction, including without limitation
  17  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  18  * and/or sell copies of the Software, and to permit persons to whom the
  19  * Software is furnished to do so, subject to the following conditions:
  20  *
  21  * The above copyright notice and this permission notice (including the next
  22  * paragraph) shall be included in all copies or substantial portions of the
  23  * Software.
  24  *
  25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  26  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  27  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  28  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  29  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  30  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  31  * DEALINGS IN THE SOFTWARE.
  32  */
  33
  34 #include <linux/export.h>
  35 #include <drm/drmP.h>
  36
  37 #include <drm/ati_pcigart.h>
  38
  39 # define ATI_PCIGART_PAGE_SIZE          4096    /**< PCI GART page size */
  40
  41 static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
  42                                        struct drm_ati_pcigart_info *gart_info)
  43 {
  44         gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
  45                                                 PAGE_SIZE);
  46         if (gart_info->table_handle == NULL)
  47                 return -ENOMEM;
  48
  49         return 0;
  50 }
  51
  52 static void drm_ati_free_pcigart_table(struct drm_device *dev,
  53                                        struct drm_ati_pcigart_info *gart_info)
  54 {
  55         drm_pci_free(dev, gart_info->table_handle);
  56         gart_info->table_handle = NULL;
  57 }
  58
  59 int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
  60 {
  61         struct drm_sg_mem *entry = dev->sg;
  62         unsigned long pages;
  63         int i;
  64         int max_pages;
  65
  66         /* we need to support large memory configurations */
  67         if (!entry) {
  68                 DRM_ERROR("no scatter/gather memory!\n");
  69                 return 0;
  70         }
  71
  72         if (gart_info->bus_addr) {
  73
  74                 max_pages = (gart_info->table_size / sizeof(u32));
  75                 pages = (entry->pages <= max_pages)
  76                   ? entry->pages : max_pages;
  77
  78                 for (i = 0; i < pages; i++) {
  79                         if (!entry->busaddr[i])
  80                                 break;
  81                         pci_unmap_page(dev->pdev, entry->busaddr[i],
  82                                          PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
  83                 }
  84
  85                 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
  86                         gart_info->bus_addr = 0;
  87         }
  88
  89         if (gart_info->gart_table_location == DRM_ATI_GART_MAIN &&
  90             gart_info->table_handle) {
  91                 drm_ati_free_pcigart_table(dev, gart_info);
  92         }
  93
  94         return 1;
  95 }
  96 EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
  97
  98 int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
  99 {
 100         struct drm_local_map *map = &gart_info->mapping;
 101         struct drm_sg_mem *entry = dev->sg;
 102         void *address = NULL;
 103         unsigned long pages;
 104         u32 *pci_gart = NULL, page_base, gart_idx;
 105         dma_addr_t bus_address = 0;
 106         int i, j, ret = -ENOMEM;
 107         int max_ati_pages, max_real_pages;
 108
 109         if (!entry) {
 110                 DRM_ERROR("no scatter/gather memory!\n");
 111                 goto done;
 112         }
 113
 114         if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
 115                 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
 116
 117                 if (pci_set_dma_mask(dev->pdev, gart_info->table_mask)) {
 118                         DRM_ERROR("fail to set dma mask to 0x%Lx\n",
 119                                   (unsigned long long)gart_info->table_mask);
 120                         ret = -EFAULT;
 121                         goto done;
 122                 }
 123
 124                 ret = drm_ati_alloc_pcigart_table(dev, gart_info);
 125                 if (ret) {
 126                         DRM_ERROR("cannot allocate PCI GART page!\n");
 127                         goto done;
 128                 }
 129
 130                 pci_gart = gart_info->table_handle->vaddr;
 131                 address = gart_info->table_handle->vaddr;
 132                 bus_address = gart_info->table_handle->busaddr;
 133         } else {
 134                 address = gart_info->addr;
 135                 bus_address = gart_info->bus_addr;
 136                 DRM_DEBUG("PCI: Gart Table: VRAM %08LX mapped at %08lX\n",
 137                           (unsigned long long)bus_address,
 138                           (unsigned long)address);
 139         }
 140
 141
 142         max_ati_pages = (gart_info->table_size / sizeof(u32));
 143         max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE);
 144         pages = (entry->pages <= max_real_pages)
 145             ? entry->pages : max_real_pages;
 146
 147         if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
 148                 memset(pci_gart, 0, max_ati_pages * sizeof(u32));
 149         } else {
 150                 memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u32));
 151         }
 152
 153         gart_idx = 0;
 154         for (i = 0; i < pages; i++) {
 155                 /* we need to support large memory configurations */
 156                 entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i],
 157                                                  0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 158                 if (pci_dma_mapping_error(dev->pdev, entry->busaddr[i])) {
 159                         DRM_ERROR("unable to map PCIGART pages!\n");
 160                         drm_ati_pcigart_cleanup(dev, gart_info);
 161                         address = NULL;
 162                         bus_address = 0;
 163                         ret = -ENOMEM;
 164                         goto done;
 165                 }
 166                 page_base = (u32) entry->busaddr[i];
 167
 168                 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
 169                         u32 val;
 170
 171                         switch(gart_info->gart_reg_if) {
 172                         case DRM_ATI_GART_IGP:
 173                                 val = page_base | 0xc;
 174                                 break;
 175                         case DRM_ATI_GART_PCIE:
 176                                 val = (page_base >> 8) | 0xc;
 177                                 break;
 178                         default:
 179                         case DRM_ATI_GART_PCI:
 180                                 val = page_base;
 181                                 break;
 182                         }
 183                         if (gart_info->gart_table_location ==
 184                             DRM_ATI_GART_MAIN)
 185                                 pci_gart[gart_idx] = cpu_to_le32(val);
 186                         else
 187                                 DRM_WRITE32(map, gart_idx * sizeof(u32), val);
 188                         gart_idx++;
 189                         page_base += ATI_PCIGART_PAGE_SIZE;
 190                 }
 191         }
 192         ret = 0;
 193
 194 #if defined(__i386__) || defined(__x86_64__)
 195         wbinvd();
 196 #else
 197         mb();
 198 #endif
 199
 200       done:
 201         gart_info->addr = address;
 202         gart_info->bus_addr = bus_address;
 203         return ret;
 204 }
 205 EXPORT_SYMBOL(drm_ati_pcigart_init);