drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c

   1 /* Hisilicon Hibmc SoC drm driver
   2  *
   3  * Based on the bochs drm driver.
   4  *
   5  * Copyright (c) 2016 Huawei Limited.
   6  *
   7  * Author:
   8  *      Rongrong Zou <zourongrong@huawei.com>
   9  *      Rongrong Zou <zourongrong@gmail.com>
  10  *      Jianhua Li <lijianhua@huawei.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License as published by
  14  * the Free Software Foundation; either version 2 of the License, or
  15  * (at your option) any later version.
  16  *
  17  */
  18
  19 #include <linux/console.h>
  20 #include <linux/module.h>
  21
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_probe_helper.h>
  24
  25 #include "hibmc_drm_drv.h"
  26 #include "hibmc_drm_regs.h"
  27
  28 static const struct file_operations hibmc_fops = {
  29         .owner          = THIS_MODULE,
  30         .open           = drm_open,
  31         .release        = drm_release,
  32         .unlocked_ioctl = drm_ioctl,
  33         .compat_ioctl   = drm_compat_ioctl,
  34         .mmap           = hibmc_mmap,
  35         .poll           = drm_poll,
  36         .read           = drm_read,
  37         .llseek         = no_llseek,
  38 };
  39
  40 static irqreturn_t hibmc_drm_interrupt(int irq, void *arg)
  41 {
  42         struct drm_device *dev = (struct drm_device *)arg;
  43         struct hibmc_drm_private *priv =
  44                 (struct hibmc_drm_private *)dev->dev_private;
  45         u32 status;
  46
  47         status = readl(priv->mmio + HIBMC_RAW_INTERRUPT);
  48
  49         if (status & HIBMC_RAW_INTERRUPT_VBLANK(1)) {
  50                 writel(HIBMC_RAW_INTERRUPT_VBLANK(1),
  51                        priv->mmio + HIBMC_RAW_INTERRUPT);
  52                 drm_handle_vblank(dev, 0);
  53         }
  54
  55         return IRQ_HANDLED;
  56 }
  57
  58 static struct drm_driver hibmc_driver = {
  59         .driver_features        = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
  60         .fops                   = &hibmc_fops,
  61         .name                   = "hibmc",
  62         .date                   = "20160828",
  63         .desc                   = "hibmc drm driver",
  64         .major                  = 1,
  65         .minor                  = 0,
  66         .gem_free_object_unlocked = hibmc_gem_free_object,
  67         .dumb_create            = hibmc_dumb_create,
  68         .dumb_map_offset        = hibmc_dumb_mmap_offset,
  69         .irq_handler            = hibmc_drm_interrupt,
  70 };
  71
  72 static int __maybe_unused hibmc_pm_suspend(struct device *dev)
  73 {
  74         struct pci_dev *pdev = to_pci_dev(dev);
  75         struct drm_device *drm_dev = pci_get_drvdata(pdev);
  76
  77         return drm_mode_config_helper_suspend(drm_dev);
  78 }
  79
  80 static int  __maybe_unused hibmc_pm_resume(struct device *dev)
  81 {
  82         struct pci_dev *pdev = to_pci_dev(dev);
  83         struct drm_device *drm_dev = pci_get_drvdata(pdev);
  84
  85         return drm_mode_config_helper_resume(drm_dev);
  86 }
  87
  88 static const struct dev_pm_ops hibmc_pm_ops = {
  89         SET_SYSTEM_SLEEP_PM_OPS(hibmc_pm_suspend,
  90                                 hibmc_pm_resume)
  91 };
  92
  93 static int hibmc_kms_init(struct hibmc_drm_private *priv)
  94 {
  95         int ret;
  96
  97         drm_mode_config_init(priv->dev);
  98         priv->mode_config_initialized = true;
  99
 100         priv->dev->mode_config.min_width = 0;
 101         priv->dev->mode_config.min_height = 0;
 102         priv->dev->mode_config.max_width = 1920;
 103         priv->dev->mode_config.max_height = 1440;
 104
 105         priv->dev->mode_config.fb_base = priv->fb_base;
 106         priv->dev->mode_config.preferred_depth = 24;
 107         priv->dev->mode_config.prefer_shadow = 0;
 108
 109         priv->dev->mode_config.funcs = (void *)&hibmc_mode_funcs;
 110
 111         ret = hibmc_de_init(priv);
 112         if (ret) {
 113                 DRM_ERROR("failed to init de: %d\n", ret);
 114                 return ret;
 115         }
 116
 117         ret = hibmc_vdac_init(priv);
 118         if (ret) {
 119                 DRM_ERROR("failed to init vdac: %d\n", ret);
 120                 return ret;
 121         }
 122
 123         return 0;
 124 }
 125
 126 static void hibmc_kms_fini(struct hibmc_drm_private *priv)
 127 {
 128         if (priv->mode_config_initialized) {
 129                 drm_mode_config_cleanup(priv->dev);
 130                 priv->mode_config_initialized = false;
 131         }
 132 }
 133
 134 /*
 135  * It can operate in one of three modes: 0, 1 or Sleep.
 136  */
 137 void hibmc_set_power_mode(struct hibmc_drm_private *priv,
 138                           unsigned int power_mode)
 139 {
 140         unsigned int control_value = 0;
 141         void __iomem   *mmio = priv->mmio;
 142         unsigned int input = 1;
 143
 144         if (power_mode > HIBMC_PW_MODE_CTL_MODE_SLEEP)
 145                 return;
 146
 147         if (power_mode == HIBMC_PW_MODE_CTL_MODE_SLEEP)
 148                 input = 0;
 149
 150         control_value = readl(mmio + HIBMC_POWER_MODE_CTRL);
 151         control_value &= ~(HIBMC_PW_MODE_CTL_MODE_MASK |
 152                            HIBMC_PW_MODE_CTL_OSC_INPUT_MASK);
 153         control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE, power_mode);
 154         control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT, input);
 155         writel(control_value, mmio + HIBMC_POWER_MODE_CTRL);
 156 }
 157
 158 void hibmc_set_current_gate(struct hibmc_drm_private *priv, unsigned int gate)
 159 {
 160         unsigned int gate_reg;
 161         unsigned int mode;
 162         void __iomem   *mmio = priv->mmio;
 163
 164         /* Get current power mode. */
 165         mode = (readl(mmio + HIBMC_POWER_MODE_CTRL) &
 166                 HIBMC_PW_MODE_CTL_MODE_MASK) >> HIBMC_PW_MODE_CTL_MODE_SHIFT;
 167
 168         switch (mode) {
 169         case HIBMC_PW_MODE_CTL_MODE_MODE0:
 170                 gate_reg = HIBMC_MODE0_GATE;
 171                 break;
 172
 173         case HIBMC_PW_MODE_CTL_MODE_MODE1:
 174                 gate_reg = HIBMC_MODE1_GATE;
 175                 break;
 176
 177         default:
 178                 gate_reg = HIBMC_MODE0_GATE;
 179                 break;
 180         }
 181         writel(gate, mmio + gate_reg);
 182 }
 183
 184 static void hibmc_hw_config(struct hibmc_drm_private *priv)
 185 {
 186         unsigned int reg;
 187
 188         /* On hardware reset, power mode 0 is default. */
 189         hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_MODE0);
 190
 191         /* Enable display power gate & LOCALMEM power gate*/
 192         reg = readl(priv->mmio + HIBMC_CURRENT_GATE);
 193         reg &= ~HIBMC_CURR_GATE_DISPLAY_MASK;
 194         reg &= ~HIBMC_CURR_GATE_LOCALMEM_MASK;
 195         reg |= HIBMC_CURR_GATE_DISPLAY(1);
 196         reg |= HIBMC_CURR_GATE_LOCALMEM(1);
 197
 198         hibmc_set_current_gate(priv, reg);
 199
 200         /*
 201          * Reset the memory controller. If the memory controller
 202          * is not reset in chip,the system might hang when sw accesses
 203          * the memory.The memory should be resetted after
 204          * changing the MXCLK.
 205          */
 206         reg = readl(priv->mmio + HIBMC_MISC_CTRL);
 207         reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
 208         reg |= HIBMC_MSCCTL_LOCALMEM_RESET(0);
 209         writel(reg, priv->mmio + HIBMC_MISC_CTRL);
 210
 211         reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
 212         reg |= HIBMC_MSCCTL_LOCALMEM_RESET(1);
 213
 214         writel(reg, priv->mmio + HIBMC_MISC_CTRL);
 215 }
 216
 217 static int hibmc_hw_map(struct hibmc_drm_private *priv)
 218 {
 219         struct drm_device *dev = priv->dev;
 220         struct pci_dev *pdev = dev->pdev;
 221         resource_size_t addr, size, ioaddr, iosize;
 222
 223         ioaddr = pci_resource_start(pdev, 1);
 224         iosize = pci_resource_len(pdev, 1);
 225         priv->mmio = devm_ioremap_nocache(dev->dev, ioaddr, iosize);
 226         if (!priv->mmio) {
 227                 DRM_ERROR("Cannot map mmio region\n");
 228                 return -ENOMEM;
 229         }
 230
 231         addr = pci_resource_start(pdev, 0);
 232         size = pci_resource_len(pdev, 0);
 233         priv->fb_map = devm_ioremap(dev->dev, addr, size);
 234         if (!priv->fb_map) {
 235                 DRM_ERROR("Cannot map framebuffer\n");
 236                 return -ENOMEM;
 237         }
 238         priv->fb_base = addr;
 239         priv->fb_size = size;
 240
 241         return 0;
 242 }
 243
 244 static int hibmc_hw_init(struct hibmc_drm_private *priv)
 245 {
 246         int ret;
 247
 248         ret = hibmc_hw_map(priv);
 249         if (ret)
 250                 return ret;
 251
 252         hibmc_hw_config(priv);
 253
 254         return 0;
 255 }
 256
 257 static int hibmc_unload(struct drm_device *dev)
 258 {
 259         struct hibmc_drm_private *priv = dev->dev_private;
 260
 261         hibmc_fbdev_fini(priv);
 262
 263         drm_atomic_helper_shutdown(dev);
 264
 265         if (dev->irq_enabled)
 266                 drm_irq_uninstall(dev);
 267         if (priv->msi_enabled)
 268                 pci_disable_msi(dev->pdev);
 269
 270         hibmc_kms_fini(priv);
 271         hibmc_mm_fini(priv);
 272         dev->dev_private = NULL;
 273         return 0;
 274 }
 275
 276 static int hibmc_load(struct drm_device *dev)
 277 {
 278         struct hibmc_drm_private *priv;
 279         int ret;
 280
 281         priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
 282         if (!priv) {
 283                 DRM_ERROR("no memory to allocate for hibmc_drm_private\n");
 284                 return -ENOMEM;
 285         }
 286         dev->dev_private = priv;
 287         priv->dev = dev;
 288
 289         ret = hibmc_hw_init(priv);
 290         if (ret)
 291                 goto err;
 292
 293         ret = hibmc_mm_init(priv);
 294         if (ret)
 295                 goto err;
 296
 297         ret = hibmc_kms_init(priv);
 298         if (ret)
 299                 goto err;
 300
 301         ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
 302         if (ret) {
 303                 DRM_ERROR("failed to initialize vblank: %d\n", ret);
 304                 goto err;
 305         }
 306
 307         priv->msi_enabled = 0;
 308         ret = pci_enable_msi(dev->pdev);
 309         if (ret) {
 310                 DRM_WARN("enabling MSI failed: %d\n", ret);
 311         } else {
 312                 priv->msi_enabled = 1;
 313                 ret = drm_irq_install(dev, dev->pdev->irq);
 314                 if (ret)
 315                         DRM_WARN("install irq failed: %d\n", ret);
 316         }
 317
 318         /* reset all the states of crtc/plane/encoder/connector */
 319         drm_mode_config_reset(dev);
 320
 321         ret = hibmc_fbdev_init(priv);
 322         if (ret) {
 323                 DRM_ERROR("failed to initialize fbdev: %d\n", ret);
 324                 goto err;
 325         }
 326
 327         return 0;
 328
 329 err:
 330         hibmc_unload(dev);
 331         DRM_ERROR("failed to initialize drm driver: %d\n", ret);
 332         return ret;
 333 }
 334
 335 static int hibmc_pci_probe(struct pci_dev *pdev,
 336                            const struct pci_device_id *ent)
 337 {
 338         struct drm_device *dev;
 339         int ret;
 340
 341         dev = drm_dev_alloc(&hibmc_driver, &pdev->dev);
 342         if (IS_ERR(dev)) {
 343                 DRM_ERROR("failed to allocate drm_device\n");
 344                 return PTR_ERR(dev);
 345         }
 346
 347         dev->pdev = pdev;
 348         pci_set_drvdata(pdev, dev);
 349
 350         ret = pci_enable_device(pdev);
 351         if (ret) {
 352                 DRM_ERROR("failed to enable pci device: %d\n", ret);
 353                 goto err_free;
 354         }
 355
 356         ret = hibmc_load(dev);
 357         if (ret) {
 358                 DRM_ERROR("failed to load hibmc: %d\n", ret);
 359                 goto err_disable;
 360         }
 361
 362         ret = drm_dev_register(dev, 0);
 363         if (ret) {
 364                 DRM_ERROR("failed to register drv for userspace access: %d\n",
 365                           ret);
 366                 goto err_unload;
 367         }
 368         return 0;
 369
 370 err_unload:
 371         hibmc_unload(dev);
 372 err_disable:
 373         pci_disable_device(pdev);
 374 err_free:
 375         drm_dev_put(dev);
 376
 377         return ret;
 378 }
 379
 380 static void hibmc_pci_remove(struct pci_dev *pdev)
 381 {
 382         struct drm_device *dev = pci_get_drvdata(pdev);
 383
 384         drm_dev_unregister(dev);
 385         hibmc_unload(dev);
 386         drm_dev_put(dev);
 387 }
 388
 389 static struct pci_device_id hibmc_pci_table[] = {
 390         { PCI_VDEVICE(HUAWEI, 0x1711) },
 391         {0,}
 392 };
 393
 394 static struct pci_driver hibmc_pci_driver = {
 395         .name =         "hibmc-drm",
 396         .id_table =     hibmc_pci_table,
 397         .probe =        hibmc_pci_probe,
 398         .remove =       hibmc_pci_remove,
 399         .driver.pm =    &hibmc_pm_ops,
 400 };
 401
 402 static int __init hibmc_init(void)
 403 {
 404         return pci_register_driver(&hibmc_pci_driver);
 405 }
 406
 407 static void __exit hibmc_exit(void)
 408 {
 409         return pci_unregister_driver(&hibmc_pci_driver);
 410 }
 411
 412 module_init(hibmc_init);
 413 module_exit(hibmc_exit);
 414
 415 MODULE_DEVICE_TABLE(pci, hibmc_pci_table);
 416 MODULE_AUTHOR("RongrongZou <zourongrong@huawei.com>");
 417 MODULE_DESCRIPTION("DRM Driver for Hisilicon Hibmc");
 418 MODULE_LICENSE("GPL v2");