drivers/gpu/drm/mgag200/mgag200_drv.h

   1 /*
   2  * Copyright 2010 Matt Turner.
   3  * Copyright 2012 Red Hat
   4  *
   5  * This file is subject to the terms and conditions of the GNU General
   6  * Public License version 2. See the file COPYING in the main
   7  * directory of this archive for more details.
   8  *
   9  * Authors: Matthew Garrett
  10  *          Matt Turner
  11  *          Dave Airlie
  12  */
  13 #ifndef __MGAG200_DRV_H__
  14 #define __MGAG200_DRV_H__
  15
  16 #include <video/vga.h>
  17
  18 #include <drm/drm_encoder.h>
  19 #include <drm/drm_fb_helper.h>
  20 #include <drm/ttm/ttm_bo_api.h>
  21 #include <drm/ttm/ttm_bo_driver.h>
  22 #include <drm/ttm/ttm_placement.h>
  23 #include <drm/ttm/ttm_memory.h>
  24 #include <drm/ttm/ttm_module.h>
  25
  26 #include <drm/drm_gem.h>
  27
  28 #include <linux/i2c.h>
  29 #include <linux/i2c-algo-bit.h>
  30
  31 #include "mgag200_reg.h"
  32
  33 #define DRIVER_AUTHOR           "Matthew Garrett"
  34
  35 #define DRIVER_NAME             "mgag200"
  36 #define DRIVER_DESC             "MGA G200 SE"
  37 #define DRIVER_DATE             "20110418"
  38
  39 #define DRIVER_MAJOR            1
  40 #define DRIVER_MINOR            0
  41 #define DRIVER_PATCHLEVEL       0
  42
  43 #define MGAG200FB_CONN_LIMIT 1
  44
  45 #define RREG8(reg) ioread8(((void __iomem *)mdev->rmmio) + (reg))
  46 #define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev->rmmio) + (reg))
  47 #define RREG32(reg) ioread32(((void __iomem *)mdev->rmmio) + (reg))
  48 #define WREG32(reg, v) iowrite32(v, ((void __iomem *)mdev->rmmio) + (reg))
  49
  50 #define ATTR_INDEX 0x1fc0
  51 #define ATTR_DATA 0x1fc1
  52
  53 #define WREG_ATTR(reg, v)                                       \
  54         do {                                                    \
  55                 RREG8(0x1fda);                                  \
  56                 WREG8(ATTR_INDEX, reg);                         \
  57                 WREG8(ATTR_DATA, v);                            \
  58         } while (0)                                             \
  59
  60 #define WREG_SEQ(reg, v)                                        \
  61         do {                                                    \
  62                 WREG8(MGAREG_SEQ_INDEX, reg);                   \
  63                 WREG8(MGAREG_SEQ_DATA, v);                      \
  64         } while (0)                                             \
  65
  66 #define WREG_CRT(reg, v)                                        \
  67         do {                                                    \
  68                 WREG8(MGAREG_CRTC_INDEX, reg);                  \
  69                 WREG8(MGAREG_CRTC_DATA, v);                     \
  70         } while (0)                                             \
  71
  72
  73 #define WREG_ECRT(reg, v)                                       \
  74         do {                                                    \
  75                 WREG8(MGAREG_CRTCEXT_INDEX, reg);                               \
  76                 WREG8(MGAREG_CRTCEXT_DATA, v);                          \
  77         } while (0)                                             \
  78
  79 #define GFX_INDEX 0x1fce
  80 #define GFX_DATA 0x1fcf
  81
  82 #define WREG_GFX(reg, v)                                        \
  83         do {                                                    \
  84                 WREG8(GFX_INDEX, reg);                          \
  85                 WREG8(GFX_DATA, v);                             \
  86         } while (0)                                             \
  87
  88 #define DAC_INDEX 0x3c00
  89 #define DAC_DATA 0x3c0a
  90
  91 #define WREG_DAC(reg, v)                                        \
  92         do {                                                    \
  93                 WREG8(DAC_INDEX, reg);                          \
  94                 WREG8(DAC_DATA, v);                             \
  95         } while (0)                                             \
  96
  97 #define MGA_MISC_OUT 0x1fc2
  98 #define MGA_MISC_IN 0x1fcc
  99
 100 #define MGAG200_MAX_FB_HEIGHT 4096
 101 #define MGAG200_MAX_FB_WIDTH 4096
 102
 103 #define MATROX_DPMS_CLEARED (-1)
 104
 105 #define to_mga_crtc(x) container_of(x, struct mga_crtc, base)
 106 #define to_mga_encoder(x) container_of(x, struct mga_encoder, base)
 107 #define to_mga_connector(x) container_of(x, struct mga_connector, base)
 108 #define to_mga_framebuffer(x) container_of(x, struct mga_framebuffer, base)
 109
 110 struct mga_framebuffer {
 111         struct drm_framebuffer base;
 112         struct drm_gem_object *obj;
 113 };
 114
 115 struct mga_fbdev {
 116         struct drm_fb_helper helper;
 117         struct mga_framebuffer mfb;
 118         void *sysram;
 119         int size;
 120         struct ttm_bo_kmap_obj mapping;
 121         int x1, y1, x2, y2; /* dirty rect */
 122         spinlock_t dirty_lock;
 123 };
 124
 125 struct mga_crtc {
 126         struct drm_crtc base;
 127         u8 lut_r[256], lut_g[256], lut_b[256];
 128         int last_dpms;
 129         bool enabled;
 130 };
 131
 132 struct mga_mode_info {
 133         bool mode_config_initialized;
 134         struct mga_crtc *crtc;
 135 };
 136
 137 struct mga_encoder {
 138         struct drm_encoder base;
 139         int last_dpms;
 140 };
 141
 142
 143 struct mga_i2c_chan {
 144         struct i2c_adapter adapter;
 145         struct drm_device *dev;
 146         struct i2c_algo_bit_data bit;
 147         int data, clock;
 148 };
 149
 150 struct mga_connector {
 151         struct drm_connector base;
 152         struct mga_i2c_chan *i2c;
 153 };
 154
 155 struct mga_cursor {
 156         /*
 157            We have to have 2 buffers for the cursor to avoid occasional
 158            corruption while switching cursor icons.
 159            If either of these is NULL, then don't do hardware cursors, and
 160            fall back to software.
 161         */
 162         struct mgag200_bo *pixels_1;
 163         struct mgag200_bo *pixels_2;
 164         u64 pixels_1_gpu_addr, pixels_2_gpu_addr;
 165         /* The currently displayed icon, this points to one of pixels_1, or pixels_2 */
 166         struct mgag200_bo *pixels_current;
 167         /* The previously displayed icon */
 168         struct mgag200_bo *pixels_prev;
 169 };
 170
 171 struct mga_mc {
 172         resource_size_t                 vram_size;
 173         resource_size_t                 vram_base;
 174         resource_size_t                 vram_window;
 175 };
 176
 177 enum mga_type {
 178         G200_SE_A,
 179         G200_SE_B,
 180         G200_WB,
 181         G200_EV,
 182         G200_EH,
 183         G200_EH3,
 184         G200_ER,
 185         G200_EW3,
 186 };
 187
 188 #define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
 189
 190 struct mga_device {
 191         struct drm_device               *dev;
 192         unsigned long                   flags;
 193
 194         resource_size_t                 rmmio_base;
 195         resource_size_t                 rmmio_size;
 196         void __iomem                    *rmmio;
 197
 198         struct mga_mc                   mc;
 199         struct mga_mode_info            mode_info;
 200
 201         struct mga_fbdev *mfbdev;
 202         struct mga_cursor cursor;
 203
 204         bool                            suspended;
 205         int                             num_crtc;
 206         enum mga_type                   type;
 207         int                             has_sdram;
 208         struct drm_display_mode         mode;
 209
 210         int bpp_shifts[4];
 211
 212         int fb_mtrr;
 213
 214         struct {
 215                 struct ttm_bo_device bdev;
 216         } ttm;
 217
 218         /* SE model number stored in reg 0x1e24 */
 219         u32 unique_rev_id;
 220 };
 221
 222
 223 struct mgag200_bo {
 224         struct ttm_buffer_object bo;
 225         struct ttm_placement placement;
 226         struct ttm_bo_kmap_obj kmap;
 227         struct drm_gem_object gem;
 228         struct ttm_place placements[3];
 229         int pin_count;
 230 };
 231 #define gem_to_mga_bo(gobj) container_of((gobj), struct mgag200_bo, gem)
 232
 233 static inline struct mgag200_bo *
 234 mgag200_bo(struct ttm_buffer_object *bo)
 235 {
 236         return container_of(bo, struct mgag200_bo, bo);
 237 }
 238
 239                                 /* mgag200_mode.c */
 240 int mgag200_modeset_init(struct mga_device *mdev);
 241 void mgag200_modeset_fini(struct mga_device *mdev);
 242
 243                                 /* mgag200_fb.c */
 244 int mgag200_fbdev_init(struct mga_device *mdev);
 245 void mgag200_fbdev_fini(struct mga_device *mdev);
 246
 247                                 /* mgag200_main.c */
 248 int mgag200_framebuffer_init(struct drm_device *dev,
 249                              struct mga_framebuffer *mfb,
 250                              const struct drm_mode_fb_cmd2 *mode_cmd,
 251                              struct drm_gem_object *obj);
 252
 253
 254 int mgag200_driver_load(struct drm_device *dev, unsigned long flags);
 255 void mgag200_driver_unload(struct drm_device *dev);
 256 int mgag200_gem_create(struct drm_device *dev,
 257                    u32 size, bool iskernel,
 258                        struct drm_gem_object **obj);
 259 int mgag200_dumb_create(struct drm_file *file,
 260                         struct drm_device *dev,
 261                         struct drm_mode_create_dumb *args);
 262 void mgag200_gem_free_object(struct drm_gem_object *obj);
 263 int
 264 mgag200_dumb_mmap_offset(struct drm_file *file,
 265                          struct drm_device *dev,
 266                          uint32_t handle,
 267                          uint64_t *offset);
 268                                 /* mgag200_i2c.c */
 269 struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev);
 270 void mgag200_i2c_destroy(struct mga_i2c_chan *i2c);
 271
 272 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
 273 void mgag200_ttm_placement(struct mgag200_bo *bo, int domain);
 274
 275 static inline int mgag200_bo_reserve(struct mgag200_bo *bo, bool no_wait)
 276 {
 277         int ret;
 278
 279         ret = ttm_bo_reserve(&bo->bo, true, no_wait, NULL);
 280         if (ret) {
 281                 if (ret != -ERESTARTSYS && ret != -EBUSY)
 282                         DRM_ERROR("reserve failed %p\n", bo);
 283                 return ret;
 284         }
 285         return 0;
 286 }
 287
 288 static inline void mgag200_bo_unreserve(struct mgag200_bo *bo)
 289 {
 290         ttm_bo_unreserve(&bo->bo);
 291 }
 292
 293 int mgag200_bo_create(struct drm_device *dev, int size, int align,
 294                       uint32_t flags, struct mgag200_bo **pastbo);
 295 int mgag200_mm_init(struct mga_device *mdev);
 296 void mgag200_mm_fini(struct mga_device *mdev);
 297 int mgag200_mmap(struct file *filp, struct vm_area_struct *vma);
 298 int mgag200_bo_pin(struct mgag200_bo *bo, u32 pl_flag, u64 *gpu_addr);
 299 int mgag200_bo_unpin(struct mgag200_bo *bo);
 300 int mgag200_bo_push_sysram(struct mgag200_bo *bo);
 301                            /* mgag200_cursor.c */
 302 int mga_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
 303                                                 uint32_t handle, uint32_t width, uint32_t height);
 304 int mga_crtc_cursor_move(struct drm_crtc *crtc, int x, int y);
 305
 306 #endif                          /* __MGAG200_DRV_H__ */