drivers/gpu/drm/radeon/radeon_drv.c

   1 /**
   2  * \file radeon_drv.c
   3  * ATI Radeon driver
   4  *
   5  * \author Gareth Hughes <gareth@valinux.com>
   6  */
   7
   8 /*
   9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  10  * All Rights Reserved.
  11  *
  12  * Permission is hereby granted, free of charge, to any person obtaining a
  13  * copy of this software and associated documentation files (the "Software"),
  14  * to deal in the Software without restriction, including without limitation
  15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  16  * and/or sell copies of the Software, and to permit persons to whom the
  17  * Software is furnished to do so, subject to the following conditions:
  18  *
  19  * The above copyright notice and this permission notice (including the next
  20  * paragraph) shall be included in all copies or substantial portions of the
  21  * Software.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  29  * OTHER DEALINGS IN THE SOFTWARE.
  30  */
  31
  32 #include <drm/drmP.h>
  33 #include <drm/radeon_drm.h>
  34 #include "radeon_drv.h"
  35
  36 #include <drm/drm_pciids.h>
  37 #include <linux/console.h>
  38 #include <linux/module.h>
  39 #include <linux/pm_runtime.h>
  40 #include <linux/vga_switcheroo.h>
  41 #include <linux/compat.h>
  42 #include <drm/drm_gem.h>
  43 #include <drm/drm_fb_helper.h>
  44
  45 #include <drm/drm_crtc_helper.h>
  46 #include <drm/drm_probe_helper.h>
  47
  48 /*
  49  * KMS wrapper.
  50  * - 2.0.0 - initial interface
  51  * - 2.1.0 - add square tiling interface
  52  * - 2.2.0 - add r6xx/r7xx const buffer support
  53  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
  54  * - 2.4.0 - add crtc id query
  55  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
  56  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
  57  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
  58  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
  59  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
  60  *   2.10.0 - fusion 2D tiling
  61  *   2.11.0 - backend map, initial compute support for the CS checker
  62  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
  63  *   2.13.0 - virtual memory support, streamout
  64  *   2.14.0 - add evergreen tiling informations
  65  *   2.15.0 - add max_pipes query
  66  *   2.16.0 - fix evergreen 2D tiled surface calculation
  67  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
  68  *   2.18.0 - r600-eg: allow "invalid" DB formats
  69  *   2.19.0 - r600-eg: MSAA textures
  70  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
  71  *   2.21.0 - r600-r700: FMASK and CMASK
  72  *   2.22.0 - r600 only: RESOLVE_BOX allowed
  73  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
  74  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
  75  *   2.25.0 - eg+: new info request for num SE and num SH
  76  *   2.26.0 - r600-eg: fix htile size computation
  77  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
  78  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
  79  *   2.29.0 - R500 FP16 color clear registers
  80  *   2.30.0 - fix for FMASK texturing
  81  *   2.31.0 - Add fastfb support for rs690
  82  *   2.32.0 - new info request for rings working
  83  *   2.33.0 - Add SI tiling mode array query
  84  *   2.34.0 - Add CIK tiling mode array query
  85  *   2.35.0 - Add CIK macrotile mode array query
  86  *   2.36.0 - Fix CIK DCE tiling setup
  87  *   2.37.0 - allow GS ring setup on r6xx/r7xx
  88  *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
  89  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
  90  *   2.39.0 - Add INFO query for number of active CUs
  91  *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
  92  *            CS to GPU on >= r600
  93  *   2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
  94  *   2.42.0 - Add VCE/VUI (Video Usability Information) support
  95  *   2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
  96  *   2.44.0 - SET_APPEND_CNT packet3 support
  97  *   2.45.0 - Allow setting shader registers using DMA/COPY packet3 on SI
  98  *   2.46.0 - Add PFP_SYNC_ME support on evergreen
  99  *   2.47.0 - Add UVD_NO_OP register support
 100  *   2.48.0 - TA_CS_BC_BASE_ADDR allowed on SI
 101  *   2.49.0 - DRM_RADEON_GEM_INFO ioctl returns correct vram_size/visible values
 102  *   2.50.0 - Allows unaligned shader loads on CIK. (needed by OpenGL)
 103  */
 104 #define KMS_DRIVER_MAJOR        2
 105 #define KMS_DRIVER_MINOR        50
 106 #define KMS_DRIVER_PATCHLEVEL   0
 107 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 108 void radeon_driver_unload_kms(struct drm_device *dev);
 109 void radeon_driver_lastclose_kms(struct drm_device *dev);
 110 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
 111 void radeon_driver_postclose_kms(struct drm_device *dev,
 112                                  struct drm_file *file_priv);
 113 int radeon_suspend_kms(struct drm_device *dev, bool suspend,
 114                        bool fbcon, bool freeze);
 115 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
 116 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
 117 int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
 118 void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
 119 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
 120 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
 121 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
 122 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
 123 void radeon_gem_object_free(struct drm_gem_object *obj);
 124 int radeon_gem_object_open(struct drm_gem_object *obj,
 125                                 struct drm_file *file_priv);
 126 void radeon_gem_object_close(struct drm_gem_object *obj,
 127                                 struct drm_file *file_priv);
 128 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
 129                                         struct drm_gem_object *gobj,
 130                                         int flags);
 131 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
 132                                       unsigned int flags, int *vpos, int *hpos,
 133                                       ktime_t *stime, ktime_t *etime,
 134                                       const struct drm_display_mode *mode);
 135 extern bool radeon_is_px(struct drm_device *dev);
 136 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
 137 extern int radeon_max_kms_ioctl;
 138 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
 139 int radeon_mode_dumb_mmap(struct drm_file *filp,
 140                           struct drm_device *dev,
 141                           uint32_t handle, uint64_t *offset_p);
 142 int radeon_mode_dumb_create(struct drm_file *file_priv,
 143                             struct drm_device *dev,
 144                             struct drm_mode_create_dumb *args);
 145 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
 146 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
 147                                                         struct dma_buf_attachment *,
 148                                                         struct sg_table *sg);
 149 int radeon_gem_prime_pin(struct drm_gem_object *obj);
 150 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
 151 struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
 152 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
 153 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
 154
 155 /* atpx handler */
 156 #if defined(CONFIG_VGA_SWITCHEROO)
 157 void radeon_register_atpx_handler(void);
 158 void radeon_unregister_atpx_handler(void);
 159 bool radeon_has_atpx_dgpu_power_cntl(void);
 160 bool radeon_is_atpx_hybrid(void);
 161 #else
 162 static inline void radeon_register_atpx_handler(void) {}
 163 static inline void radeon_unregister_atpx_handler(void) {}
 164 static inline bool radeon_has_atpx_dgpu_power_cntl(void) { return false; }
 165 static inline bool radeon_is_atpx_hybrid(void) { return false; }
 166 #endif
 167
 168 int radeon_no_wb;
 169 int radeon_modeset = -1;
 170 int radeon_dynclks = -1;
 171 int radeon_r4xx_atom = 0;
 172 #ifdef __powerpc__
 173 /* Default to PCI on PowerPC (fdo #95017) */
 174 int radeon_agpmode = -1;
 175 #else
 176 int radeon_agpmode = 0;
 177 #endif
 178 int radeon_vram_limit = 0;
 179 int radeon_gart_size = -1; /* auto */
 180 int radeon_benchmarking = 0;
 181 int radeon_testing = 0;
 182 int radeon_connector_table = 0;
 183 int radeon_tv = 1;
 184 int radeon_audio = -1;
 185 int radeon_disp_priority = 0;
 186 int radeon_hw_i2c = 0;
 187 int radeon_pcie_gen2 = -1;
 188 int radeon_msi = -1;
 189 int radeon_lockup_timeout = 10000;
 190 int radeon_fastfb = 0;
 191 int radeon_dpm = -1;
 192 int radeon_aspm = -1;
 193 int radeon_runtime_pm = -1;
 194 int radeon_hard_reset = 0;
 195 int radeon_vm_size = 8;
 196 int radeon_vm_block_size = -1;
 197 int radeon_deep_color = 0;
 198 int radeon_use_pflipirq = 2;
 199 int radeon_bapm = -1;
 200 int radeon_backlight = -1;
 201 int radeon_auxch = -1;
 202 int radeon_mst = 0;
 203 int radeon_uvd = 1;
 204 int radeon_vce = 1;
 205
 206 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 207 module_param_named(no_wb, radeon_no_wb, int, 0444);
 208
 209 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
 210 module_param_named(modeset, radeon_modeset, int, 0400);
 211
 212 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
 213 module_param_named(dynclks, radeon_dynclks, int, 0444);
 214
 215 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
 216 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
 217
 218 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
 219 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
 220
 221 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
 222 module_param_named(agpmode, radeon_agpmode, int, 0444);
 223
 224 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
 225 module_param_named(gartsize, radeon_gart_size, int, 0600);
 226
 227 MODULE_PARM_DESC(benchmark, "Run benchmark");
 228 module_param_named(benchmark, radeon_benchmarking, int, 0444);
 229
 230 MODULE_PARM_DESC(test, "Run tests");
 231 module_param_named(test, radeon_testing, int, 0444);
 232
 233 MODULE_PARM_DESC(connector_table, "Force connector table");
 234 module_param_named(connector_table, radeon_connector_table, int, 0444);
 235
 236 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
 237 module_param_named(tv, radeon_tv, int, 0444);
 238
 239 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
 240 module_param_named(audio, radeon_audio, int, 0444);
 241
 242 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
 243 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
 244
 245 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
 246 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
 247
 248 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
 249 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
 250
 251 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
 252 module_param_named(msi, radeon_msi, int, 0444);
 253
 254 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)");
 255 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
 256
 257 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
 258 module_param_named(fastfb, radeon_fastfb, int, 0444);
 259
 260 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
 261 module_param_named(dpm, radeon_dpm, int, 0444);
 262
 263 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
 264 module_param_named(aspm, radeon_aspm, int, 0444);
 265
 266 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
 267 module_param_named(runpm, radeon_runtime_pm, int, 0444);
 268
 269 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
 270 module_param_named(hard_reset, radeon_hard_reset, int, 0444);
 271
 272 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
 273 module_param_named(vm_size, radeon_vm_size, int, 0444);
 274
 275 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
 276 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
 277
 278 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
 279 module_param_named(deep_color, radeon_deep_color, int, 0444);
 280
 281 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
 282 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
 283
 284 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
 285 module_param_named(bapm, radeon_bapm, int, 0444);
 286
 287 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
 288 module_param_named(backlight, radeon_backlight, int, 0444);
 289
 290 MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
 291 module_param_named(auxch, radeon_auxch, int, 0444);
 292
 293 MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
 294 module_param_named(mst, radeon_mst, int, 0444);
 295
 296 MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)");
 297 module_param_named(uvd, radeon_uvd, int, 0444);
 298
 299 MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
 300 module_param_named(vce, radeon_vce, int, 0444);
 301
 302 int radeon_si_support = 1;
 303 MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)");
 304 module_param_named(si_support, radeon_si_support, int, 0444);
 305
 306 int radeon_cik_support = 1;
 307 MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)");
 308 module_param_named(cik_support, radeon_cik_support, int, 0444);
 309
 310 static struct pci_device_id pciidlist[] = {
 311         radeon_PCI_IDS
 312 };
 313
 314 MODULE_DEVICE_TABLE(pci, pciidlist);
 315
 316 static struct drm_driver kms_driver;
 317
 318 bool radeon_device_is_virtual(void);
 319
 320 static int radeon_pci_probe(struct pci_dev *pdev,
 321                             const struct pci_device_id *ent)
 322 {
 323         int ret;
 324
 325         if (vga_switcheroo_client_probe_defer(pdev))
 326                 return -EPROBE_DEFER;
 327
 328         /* Get rid of things like offb */
 329         ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, "radeondrmfb");
 330         if (ret)
 331                 return ret;
 332
 333         return drm_get_pci_dev(pdev, ent, &kms_driver);
 334 }
 335
 336 static void
 337 radeon_pci_remove(struct pci_dev *pdev)
 338 {
 339         struct drm_device *dev = pci_get_drvdata(pdev);
 340
 341         drm_put_dev(dev);
 342 }
 343
 344 static void
 345 radeon_pci_shutdown(struct pci_dev *pdev)
 346 {
 347         /* if we are running in a VM, make sure the device
 348          * torn down properly on reboot/shutdown
 349          */
 350         if (radeon_device_is_virtual())
 351                 radeon_pci_remove(pdev);
 352 }
 353
 354 static int radeon_pmops_suspend(struct device *dev)
 355 {
 356         struct pci_dev *pdev = to_pci_dev(dev);
 357         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 358         return radeon_suspend_kms(drm_dev, true, true, false);
 359 }
 360
 361 static int radeon_pmops_resume(struct device *dev)
 362 {
 363         struct pci_dev *pdev = to_pci_dev(dev);
 364         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 365
 366         /* GPU comes up enabled by the bios on resume */
 367         if (radeon_is_px(drm_dev)) {
 368                 pm_runtime_disable(dev);
 369                 pm_runtime_set_active(dev);
 370                 pm_runtime_enable(dev);
 371         }
 372
 373         return radeon_resume_kms(drm_dev, true, true);
 374 }
 375
 376 static int radeon_pmops_freeze(struct device *dev)
 377 {
 378         struct pci_dev *pdev = to_pci_dev(dev);
 379         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 380         return radeon_suspend_kms(drm_dev, false, true, true);
 381 }
 382
 383 static int radeon_pmops_thaw(struct device *dev)
 384 {
 385         struct pci_dev *pdev = to_pci_dev(dev);
 386         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 387         return radeon_resume_kms(drm_dev, false, true);
 388 }
 389
 390 static int radeon_pmops_runtime_suspend(struct device *dev)
 391 {
 392         struct pci_dev *pdev = to_pci_dev(dev);
 393         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 394         int ret;
 395
 396         if (!radeon_is_px(drm_dev)) {
 397                 pm_runtime_forbid(dev);
 398                 return -EBUSY;
 399         }
 400
 401         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 402         drm_kms_helper_poll_disable(drm_dev);
 403
 404         ret = radeon_suspend_kms(drm_dev, false, false, false);
 405         pci_save_state(pdev);
 406         pci_disable_device(pdev);
 407         pci_ignore_hotplug(pdev);
 408         if (radeon_is_atpx_hybrid())
 409                 pci_set_power_state(pdev, PCI_D3cold);
 410         else if (!radeon_has_atpx_dgpu_power_cntl())
 411                 pci_set_power_state(pdev, PCI_D3hot);
 412         drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
 413
 414         return 0;
 415 }
 416
 417 static int radeon_pmops_runtime_resume(struct device *dev)
 418 {
 419         struct pci_dev *pdev = to_pci_dev(dev);
 420         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 421         int ret;
 422
 423         if (!radeon_is_px(drm_dev))
 424                 return -EINVAL;
 425
 426         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 427
 428         if (radeon_is_atpx_hybrid() ||
 429             !radeon_has_atpx_dgpu_power_cntl())
 430                 pci_set_power_state(pdev, PCI_D0);
 431         pci_restore_state(pdev);
 432         ret = pci_enable_device(pdev);
 433         if (ret)
 434                 return ret;
 435         pci_set_master(pdev);
 436
 437         ret = radeon_resume_kms(drm_dev, false, false);
 438         drm_kms_helper_poll_enable(drm_dev);
 439         drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
 440         return 0;
 441 }
 442
 443 static int radeon_pmops_runtime_idle(struct device *dev)
 444 {
 445         struct pci_dev *pdev = to_pci_dev(dev);
 446         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 447         struct drm_crtc *crtc;
 448
 449         if (!radeon_is_px(drm_dev)) {
 450                 pm_runtime_forbid(dev);
 451                 return -EBUSY;
 452         }
 453
 454         list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
 455                 if (crtc->enabled) {
 456                         DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
 457                         return -EBUSY;
 458                 }
 459         }
 460
 461         pm_runtime_mark_last_busy(dev);
 462         pm_runtime_autosuspend(dev);
 463         /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
 464         return 1;
 465 }
 466
 467 long radeon_drm_ioctl(struct file *filp,
 468                       unsigned int cmd, unsigned long arg)
 469 {
 470         struct drm_file *file_priv = filp->private_data;
 471         struct drm_device *dev;
 472         long ret;
 473         dev = file_priv->minor->dev;
 474         ret = pm_runtime_get_sync(dev->dev);
 475         if (ret < 0)
 476                 return ret;
 477
 478         ret = drm_ioctl(filp, cmd, arg);
 479
 480         pm_runtime_mark_last_busy(dev->dev);
 481         pm_runtime_put_autosuspend(dev->dev);
 482         return ret;
 483 }
 484
 485 #ifdef CONFIG_COMPAT
 486 static long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
 487 {
 488         unsigned int nr = DRM_IOCTL_NR(cmd);
 489         int ret;
 490
 491         if (nr < DRM_COMMAND_BASE)
 492                 return drm_compat_ioctl(filp, cmd, arg);
 493
 494         ret = radeon_drm_ioctl(filp, cmd, arg);
 495
 496         return ret;
 497 }
 498 #endif
 499
 500 static const struct dev_pm_ops radeon_pm_ops = {
 501         .suspend = radeon_pmops_suspend,
 502         .resume = radeon_pmops_resume,
 503         .freeze = radeon_pmops_freeze,
 504         .thaw = radeon_pmops_thaw,
 505         .poweroff = radeon_pmops_freeze,
 506         .restore = radeon_pmops_resume,
 507         .runtime_suspend = radeon_pmops_runtime_suspend,
 508         .runtime_resume = radeon_pmops_runtime_resume,
 509         .runtime_idle = radeon_pmops_runtime_idle,
 510 };
 511
 512 static const struct file_operations radeon_driver_kms_fops = {
 513         .owner = THIS_MODULE,
 514         .open = drm_open,
 515         .release = drm_release,
 516         .unlocked_ioctl = radeon_drm_ioctl,
 517         .mmap = radeon_mmap,
 518         .poll = drm_poll,
 519         .read = drm_read,
 520 #ifdef CONFIG_COMPAT
 521         .compat_ioctl = radeon_kms_compat_ioctl,
 522 #endif
 523 };
 524
 525 static bool
 526 radeon_get_crtc_scanout_position(struct drm_device *dev, unsigned int pipe,
 527                                  bool in_vblank_irq, int *vpos, int *hpos,
 528                                  ktime_t *stime, ktime_t *etime,
 529                                  const struct drm_display_mode *mode)
 530 {
 531         return radeon_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos,
 532                                           stime, etime, mode);
 533 }
 534
 535 static struct drm_driver kms_driver = {
 536         .driver_features =
 537             DRIVER_USE_AGP | DRIVER_GEM | DRIVER_PRIME | DRIVER_RENDER,
 538         .load = radeon_driver_load_kms,
 539         .open = radeon_driver_open_kms,
 540         .postclose = radeon_driver_postclose_kms,
 541         .lastclose = radeon_driver_lastclose_kms,
 542         .unload = radeon_driver_unload_kms,
 543         .get_vblank_counter = radeon_get_vblank_counter_kms,
 544         .enable_vblank = radeon_enable_vblank_kms,
 545         .disable_vblank = radeon_disable_vblank_kms,
 546         .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
 547         .get_scanout_position = radeon_get_crtc_scanout_position,
 548         .irq_preinstall = radeon_driver_irq_preinstall_kms,
 549         .irq_postinstall = radeon_driver_irq_postinstall_kms,
 550         .irq_uninstall = radeon_driver_irq_uninstall_kms,
 551         .irq_handler = radeon_driver_irq_handler_kms,
 552         .ioctls = radeon_ioctls_kms,
 553         .gem_free_object_unlocked = radeon_gem_object_free,
 554         .gem_open_object = radeon_gem_object_open,
 555         .gem_close_object = radeon_gem_object_close,
 556         .dumb_create = radeon_mode_dumb_create,
 557         .dumb_map_offset = radeon_mode_dumb_mmap,
 558         .fops = &radeon_driver_kms_fops,
 559
 560         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 561         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 562         .gem_prime_export = radeon_gem_prime_export,
 563         .gem_prime_import = drm_gem_prime_import,
 564         .gem_prime_pin = radeon_gem_prime_pin,
 565         .gem_prime_unpin = radeon_gem_prime_unpin,
 566         .gem_prime_res_obj = radeon_gem_prime_res_obj,
 567         .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
 568         .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
 569         .gem_prime_vmap = radeon_gem_prime_vmap,
 570         .gem_prime_vunmap = radeon_gem_prime_vunmap,
 571
 572         .name = DRIVER_NAME,
 573         .desc = DRIVER_DESC,
 574         .date = DRIVER_DATE,
 575         .major = KMS_DRIVER_MAJOR,
 576         .minor = KMS_DRIVER_MINOR,
 577         .patchlevel = KMS_DRIVER_PATCHLEVEL,
 578 };
 579
 580 static struct drm_driver *driver;
 581 static struct pci_driver *pdriver;
 582
 583 static struct pci_driver radeon_kms_pci_driver = {
 584         .name = DRIVER_NAME,
 585         .id_table = pciidlist,
 586         .probe = radeon_pci_probe,
 587         .remove = radeon_pci_remove,
 588         .shutdown = radeon_pci_shutdown,
 589         .driver.pm = &radeon_pm_ops,
 590 };
 591
 592 static int __init radeon_init(void)
 593 {
 594         if (vgacon_text_force() && radeon_modeset == -1) {
 595                 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
 596                 radeon_modeset = 0;
 597         }
 598         /* set to modesetting by default if not nomodeset */
 599         if (radeon_modeset == -1)
 600                 radeon_modeset = 1;
 601
 602         if (radeon_modeset == 1) {
 603                 DRM_INFO("radeon kernel modesetting enabled.\n");
 604                 driver = &kms_driver;
 605                 pdriver = &radeon_kms_pci_driver;
 606                 driver->driver_features |= DRIVER_MODESET;
 607                 driver->num_ioctls = radeon_max_kms_ioctl;
 608                 radeon_register_atpx_handler();
 609
 610         } else {
 611                 DRM_ERROR("No UMS support in radeon module!\n");
 612                 return -EINVAL;
 613         }
 614
 615         return pci_register_driver(pdriver);
 616 }
 617
 618 static void __exit radeon_exit(void)
 619 {
 620         pci_unregister_driver(pdriver);
 621         radeon_unregister_atpx_handler();
 622 }
 623
 624 module_init(radeon_init);
 625 module_exit(radeon_exit);
 626
 627 MODULE_AUTHOR(DRIVER_AUTHOR);
 628 MODULE_DESCRIPTION(DRIVER_DESC);
 629 MODULE_LICENSE("GPL and additional rights");