drivers/gpu/drm/radeon/radeon_irq_kms.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include <drm/drmP.h>
  29 #include <drm/drm_crtc_helper.h>
  30 #include <drm/drm_probe_helper.h>
  31 #include <drm/radeon_drm.h>
  32 #include "radeon_reg.h"
  33 #include "radeon.h"
  34 #include "atom.h"
  35
  36 #include <linux/pm_runtime.h>
  37
  38 #define RADEON_WAIT_IDLE_TIMEOUT 200
  39
  40 /**
  41  * radeon_driver_irq_handler_kms - irq handler for KMS
  42  *
  43  * @int irq, void *arg: args
  44  *
  45  * This is the irq handler for the radeon KMS driver (all asics).
  46  * radeon_irq_process is a macro that points to the per-asic
  47  * irq handler callback.
  48  */
  49 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
  50 {
  51         struct drm_device *dev = (struct drm_device *) arg;
  52         struct radeon_device *rdev = dev->dev_private;
  53         irqreturn_t ret;
  54
  55         ret = radeon_irq_process(rdev);
  56         if (ret == IRQ_HANDLED)
  57                 pm_runtime_mark_last_busy(dev->dev);
  58         return ret;
  59 }
  60
  61 /*
  62  * Handle hotplug events outside the interrupt handler proper.
  63  */
  64 /**
  65  * radeon_hotplug_work_func - display hotplug work handler
  66  *
  67  * @work: work struct
  68  *
  69  * This is the hot plug event work handler (all asics).
  70  * The work gets scheduled from the irq handler if there
  71  * was a hot plug interrupt.  It walks the connector table
  72  * and calls the hotplug handler for each one, then sends
  73  * a drm hotplug event to alert userspace.
  74  */
  75 static void radeon_hotplug_work_func(struct work_struct *work)
  76 {
  77         struct radeon_device *rdev = container_of(work, struct radeon_device,
  78                                                   hotplug_work.work);
  79         struct drm_device *dev = rdev->ddev;
  80         struct drm_mode_config *mode_config = &dev->mode_config;
  81         struct drm_connector *connector;
  82
  83         /* we can race here at startup, some boards seem to trigger
  84          * hotplug irqs when they shouldn't. */
  85         if (!rdev->mode_info.mode_config_initialized)
  86                 return;
  87
  88         mutex_lock(&mode_config->mutex);
  89         list_for_each_entry(connector, &mode_config->connector_list, head)
  90                 radeon_connector_hotplug(connector);
  91         mutex_unlock(&mode_config->mutex);
  92         /* Just fire off a uevent and let userspace tell us what to do */
  93         drm_helper_hpd_irq_event(dev);
  94 }
  95
  96 static void radeon_dp_work_func(struct work_struct *work)
  97 {
  98         struct radeon_device *rdev = container_of(work, struct radeon_device,
  99                                                   dp_work);
 100         struct drm_device *dev = rdev->ddev;
 101         struct drm_mode_config *mode_config = &dev->mode_config;
 102         struct drm_connector *connector;
 103
 104         /* this should take a mutex */
 105         list_for_each_entry(connector, &mode_config->connector_list, head)
 106                 radeon_connector_hotplug(connector);
 107 }
 108 /**
 109  * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
 110  *
 111  * @dev: drm dev pointer
 112  *
 113  * Gets the hw ready to enable irqs (all asics).
 114  * This function disables all interrupt sources on the GPU.
 115  */
 116 void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
 117 {
 118         struct radeon_device *rdev = dev->dev_private;
 119         unsigned long irqflags;
 120         unsigned i;
 121
 122         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 123         /* Disable *all* interrupts */
 124         for (i = 0; i < RADEON_NUM_RINGS; i++)
 125                 atomic_set(&rdev->irq.ring_int[i], 0);
 126         rdev->irq.dpm_thermal = false;
 127         for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
 128                 rdev->irq.hpd[i] = false;
 129         for (i = 0; i < RADEON_MAX_CRTCS; i++) {
 130                 rdev->irq.crtc_vblank_int[i] = false;
 131                 atomic_set(&rdev->irq.pflip[i], 0);
 132                 rdev->irq.afmt[i] = false;
 133         }
 134         radeon_irq_set(rdev);
 135         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 136         /* Clear bits */
 137         radeon_irq_process(rdev);
 138 }
 139
 140 /**
 141  * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
 142  *
 143  * @dev: drm dev pointer
 144  *
 145  * Handles stuff to be done after enabling irqs (all asics).
 146  * Returns 0 on success.
 147  */
 148 int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
 149 {
 150         struct radeon_device *rdev = dev->dev_private;
 151
 152         if (ASIC_IS_AVIVO(rdev))
 153                 dev->max_vblank_count = 0x00ffffff;
 154         else
 155                 dev->max_vblank_count = 0x001fffff;
 156
 157         return 0;
 158 }
 159
 160 /**
 161  * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
 162  *
 163  * @dev: drm dev pointer
 164  *
 165  * This function disables all interrupt sources on the GPU (all asics).
 166  */
 167 void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
 168 {
 169         struct radeon_device *rdev = dev->dev_private;
 170         unsigned long irqflags;
 171         unsigned i;
 172
 173         if (rdev == NULL) {
 174                 return;
 175         }
 176         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 177         /* Disable *all* interrupts */
 178         for (i = 0; i < RADEON_NUM_RINGS; i++)
 179                 atomic_set(&rdev->irq.ring_int[i], 0);
 180         rdev->irq.dpm_thermal = false;
 181         for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
 182                 rdev->irq.hpd[i] = false;
 183         for (i = 0; i < RADEON_MAX_CRTCS; i++) {
 184                 rdev->irq.crtc_vblank_int[i] = false;
 185                 atomic_set(&rdev->irq.pflip[i], 0);
 186                 rdev->irq.afmt[i] = false;
 187         }
 188         radeon_irq_set(rdev);
 189         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 190 }
 191
 192 /**
 193  * radeon_msi_ok - asic specific msi checks
 194  *
 195  * @rdev: radeon device pointer
 196  *
 197  * Handles asic specific MSI checks to determine if
 198  * MSIs should be enabled on a particular chip (all asics).
 199  * Returns true if MSIs should be enabled, false if MSIs
 200  * should not be enabled.
 201  */
 202 static bool radeon_msi_ok(struct radeon_device *rdev)
 203 {
 204         /* RV370/RV380 was first asic with MSI support */
 205         if (rdev->family < CHIP_RV380)
 206                 return false;
 207
 208         /* MSIs don't work on AGP */
 209         if (rdev->flags & RADEON_IS_AGP)
 210                 return false;
 211
 212         /*
 213          * Older chips have a HW limitation, they can only generate 40 bits
 214          * of address for "64-bit" MSIs which breaks on some platforms, notably
 215          * IBM POWER servers, so we limit them
 216          */
 217         if (rdev->family < CHIP_BONAIRE) {
 218                 dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
 219                 rdev->pdev->no_64bit_msi = 1;
 220         }
 221
 222         /* force MSI on */
 223         if (radeon_msi == 1)
 224                 return true;
 225         else if (radeon_msi == 0)
 226                 return false;
 227
 228         /* Quirks */
 229         /* HP RS690 only seems to work with MSIs. */
 230         if ((rdev->pdev->device == 0x791f) &&
 231             (rdev->pdev->subsystem_vendor == 0x103c) &&
 232             (rdev->pdev->subsystem_device == 0x30c2))
 233                 return true;
 234
 235         /* Dell RS690 only seems to work with MSIs. */
 236         if ((rdev->pdev->device == 0x791f) &&
 237             (rdev->pdev->subsystem_vendor == 0x1028) &&
 238             (rdev->pdev->subsystem_device == 0x01fc))
 239                 return true;
 240
 241         /* Dell RS690 only seems to work with MSIs. */
 242         if ((rdev->pdev->device == 0x791f) &&
 243             (rdev->pdev->subsystem_vendor == 0x1028) &&
 244             (rdev->pdev->subsystem_device == 0x01fd))
 245                 return true;
 246
 247         /* Gateway RS690 only seems to work with MSIs. */
 248         if ((rdev->pdev->device == 0x791f) &&
 249             (rdev->pdev->subsystem_vendor == 0x107b) &&
 250             (rdev->pdev->subsystem_device == 0x0185))
 251                 return true;
 252
 253         /* try and enable MSIs by default on all RS690s */
 254         if (rdev->family == CHIP_RS690)
 255                 return true;
 256
 257         /* RV515 seems to have MSI issues where it loses
 258          * MSI rearms occasionally. This leads to lockups and freezes.
 259          * disable it by default.
 260          */
 261         if (rdev->family == CHIP_RV515)
 262                 return false;
 263         if (rdev->flags & RADEON_IS_IGP) {
 264                 /* APUs work fine with MSIs */
 265                 if (rdev->family >= CHIP_PALM)
 266                         return true;
 267                 /* lots of IGPs have problems with MSIs */
 268                 return false;
 269         }
 270
 271         return true;
 272 }
 273
 274 /**
 275  * radeon_irq_kms_init - init driver interrupt info
 276  *
 277  * @rdev: radeon device pointer
 278  *
 279  * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
 280  * Returns 0 for success, error for failure.
 281  */
 282 int radeon_irq_kms_init(struct radeon_device *rdev)
 283 {
 284         int r = 0;
 285
 286         spin_lock_init(&rdev->irq.lock);
 287
 288         /* Disable vblank irqs aggressively for power-saving */
 289         rdev->ddev->vblank_disable_immediate = true;
 290
 291         r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
 292         if (r) {
 293                 return r;
 294         }
 295
 296         /* enable msi */
 297         rdev->msi_enabled = 0;
 298
 299         if (radeon_msi_ok(rdev)) {
 300                 int ret = pci_enable_msi(rdev->pdev);
 301                 if (!ret) {
 302                         rdev->msi_enabled = 1;
 303                         dev_info(rdev->dev, "radeon: using MSI.\n");
 304                 }
 305         }
 306
 307         INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
 308         INIT_WORK(&rdev->dp_work, radeon_dp_work_func);
 309         INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
 310
 311         rdev->irq.installed = true;
 312         r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
 313         if (r) {
 314                 rdev->irq.installed = false;
 315                 flush_delayed_work(&rdev->hotplug_work);
 316                 return r;
 317         }
 318
 319         DRM_INFO("radeon: irq initialized.\n");
 320         return 0;
 321 }
 322
 323 /**
 324  * radeon_irq_kms_fini - tear down driver interrupt info
 325  *
 326  * @rdev: radeon device pointer
 327  *
 328  * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
 329  */
 330 void radeon_irq_kms_fini(struct radeon_device *rdev)
 331 {
 332         if (rdev->irq.installed) {
 333                 drm_irq_uninstall(rdev->ddev);
 334                 rdev->irq.installed = false;
 335                 if (rdev->msi_enabled)
 336                         pci_disable_msi(rdev->pdev);
 337                 flush_delayed_work(&rdev->hotplug_work);
 338         }
 339 }
 340
 341 /**
 342  * radeon_irq_kms_sw_irq_get - enable software interrupt
 343  *
 344  * @rdev: radeon device pointer
 345  * @ring: ring whose interrupt you want to enable
 346  *
 347  * Enables the software interrupt for a specific ring (all asics).
 348  * The software interrupt is generally used to signal a fence on
 349  * a particular ring.
 350  */
 351 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
 352 {
 353         unsigned long irqflags;
 354
 355         if (!rdev->ddev->irq_enabled)
 356                 return;
 357
 358         if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
 359                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 360                 radeon_irq_set(rdev);
 361                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 362         }
 363 }
 364
 365 /**
 366  * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
 367  *
 368  * @rdev: radeon device pointer
 369  * @ring: ring whose interrupt you want to enable
 370  *
 371  * Enables the software interrupt for a specific ring (all asics).
 372  * The software interrupt is generally used to signal a fence on
 373  * a particular ring.
 374  */
 375 bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
 376 {
 377         return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
 378 }
 379
 380 /**
 381  * radeon_irq_kms_sw_irq_put - disable software interrupt
 382  *
 383  * @rdev: radeon device pointer
 384  * @ring: ring whose interrupt you want to disable
 385  *
 386  * Disables the software interrupt for a specific ring (all asics).
 387  * The software interrupt is generally used to signal a fence on
 388  * a particular ring.
 389  */
 390 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
 391 {
 392         unsigned long irqflags;
 393
 394         if (!rdev->ddev->irq_enabled)
 395                 return;
 396
 397         if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
 398                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 399                 radeon_irq_set(rdev);
 400                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 401         }
 402 }
 403
 404 /**
 405  * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
 406  *
 407  * @rdev: radeon device pointer
 408  * @crtc: crtc whose interrupt you want to enable
 409  *
 410  * Enables the pageflip interrupt for a specific crtc (all asics).
 411  * For pageflips we use the vblank interrupt source.
 412  */
 413 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
 414 {
 415         unsigned long irqflags;
 416
 417         if (crtc < 0 || crtc >= rdev->num_crtc)
 418                 return;
 419
 420         if (!rdev->ddev->irq_enabled)
 421                 return;
 422
 423         if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
 424                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 425                 radeon_irq_set(rdev);
 426                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 427         }
 428 }
 429
 430 /**
 431  * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
 432  *
 433  * @rdev: radeon device pointer
 434  * @crtc: crtc whose interrupt you want to disable
 435  *
 436  * Disables the pageflip interrupt for a specific crtc (all asics).
 437  * For pageflips we use the vblank interrupt source.
 438  */
 439 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
 440 {
 441         unsigned long irqflags;
 442
 443         if (crtc < 0 || crtc >= rdev->num_crtc)
 444                 return;
 445
 446         if (!rdev->ddev->irq_enabled)
 447                 return;
 448
 449         if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
 450                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 451                 radeon_irq_set(rdev);
 452                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 453         }
 454 }
 455
 456 /**
 457  * radeon_irq_kms_enable_afmt - enable audio format change interrupt
 458  *
 459  * @rdev: radeon device pointer
 460  * @block: afmt block whose interrupt you want to enable
 461  *
 462  * Enables the afmt change interrupt for a specific afmt block (all asics).
 463  */
 464 void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
 465 {
 466         unsigned long irqflags;
 467
 468         if (!rdev->ddev->irq_enabled)
 469                 return;
 470
 471         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 472         rdev->irq.afmt[block] = true;
 473         radeon_irq_set(rdev);
 474         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 475
 476 }
 477
 478 /**
 479  * radeon_irq_kms_disable_afmt - disable audio format change interrupt
 480  *
 481  * @rdev: radeon device pointer
 482  * @block: afmt block whose interrupt you want to disable
 483  *
 484  * Disables the afmt change interrupt for a specific afmt block (all asics).
 485  */
 486 void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
 487 {
 488         unsigned long irqflags;
 489
 490         if (!rdev->ddev->irq_enabled)
 491                 return;
 492
 493         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 494         rdev->irq.afmt[block] = false;
 495         radeon_irq_set(rdev);
 496         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 497 }
 498
 499 /**
 500  * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
 501  *
 502  * @rdev: radeon device pointer
 503  * @hpd_mask: mask of hpd pins you want to enable.
 504  *
 505  * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
 506  */
 507 void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
 508 {
 509         unsigned long irqflags;
 510         int i;
 511
 512         if (!rdev->ddev->irq_enabled)
 513                 return;
 514
 515         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 516         for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
 517                 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
 518         radeon_irq_set(rdev);
 519         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 520 }
 521
 522 /**
 523  * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
 524  *
 525  * @rdev: radeon device pointer
 526  * @hpd_mask: mask of hpd pins you want to disable.
 527  *
 528  * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
 529  */
 530 void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
 531 {
 532         unsigned long irqflags;
 533         int i;
 534
 535         if (!rdev->ddev->irq_enabled)
 536                 return;
 537
 538         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 539         for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
 540                 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
 541         radeon_irq_set(rdev);
 542         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 543 }
 544
 545 /**
 546  * radeon_irq_kms_update_int_n - helper for updating interrupt enable registers
 547  *
 548  * @rdev: radeon device pointer
 549  * @reg: the register to write to enable/disable interrupts
 550  * @mask: the mask that enables the interrupts
 551  * @enable: whether to enable or disable the interrupt register
 552  * @name: the name of the interrupt register to print to the kernel log
 553  * @num: the number of the interrupt register to print to the kernel log
 554  *
 555  * Helper for updating the enable state of interrupt registers. Checks whether
 556  * or not the interrupt matches the enable state we want. If it doesn't, then
 557  * we update it and print a debugging message to the kernel log indicating the
 558  * new state of the interrupt register.
 559  *
 560  * Used for updating sequences of interrupts registers like HPD1, HPD2, etc.
 561  */
 562 void radeon_irq_kms_set_irq_n_enabled(struct radeon_device *rdev,
 563                                       u32 reg, u32 mask,
 564                                       bool enable, const char *name, unsigned n)
 565 {
 566         u32 tmp = RREG32(reg);
 567
 568         /* Interrupt state didn't change */
 569         if (!!(tmp & mask) == enable)
 570                 return;
 571
 572         if (enable) {
 573                 DRM_DEBUG("%s%d interrupts enabled\n", name, n);
 574                 WREG32(reg, tmp |= mask);
 575         } else {
 576                 DRM_DEBUG("%s%d interrupts disabled\n", name, n);
 577                 WREG32(reg, tmp & ~mask);
 578         }
 579 }