dt-bindings: mtd: ingenic: Use standard ecc-engine property
[linux/fpc-iii.git] / drivers / gpu / drm / radeon / reg_srcs / r200
blobc29ac434ac9c81ae10141613d6d994ce63324d23
1 r200 0x3294
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
11 0x1598 DST_WIDTH_HEIGHT
12 0x15C0 CLR_CMP_CNTL
13 0x15C4 CLR_CMP_CLR_SRC
14 0x15C8 CLR_CMP_CLR_DST
15 0x15CC CLR_CMP_MSK
16 0x15D8 DP_SRC_FRGD_CLR
17 0x15DC DP_SRC_BKGD_CLR
18 0x1600 DST_LINE_START
19 0x1604 DST_LINE_END
20 0x1608 DST_LINE_PATCOUNT
21 0x16C0 DP_CNTL
22 0x16CC DP_WRITE_MSK
23 0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
24 0x16E8 DEFAULT_SC_BOTTOM_RIGHT
25 0x16EC SC_TOP_LEFT
26 0x16F0 SC_BOTTOM_RIGHT
27 0x16F4 SRC_SC_BOTTOM_RIGHT
28 0x1714 DSTCACHE_CTLSTAT
29 0x1720 WAIT_UNTIL
30 0x172C RBBM_GUICNTL
31 0x1c14 PP_MISC
32 0x1c18 PP_FOG_COLOR
33 0x1c1c RE_SOLID_COLOR
34 0x1c20 RB3D_BLENDCNTL
35 0x1c4c SE_CNTL
36 0x1c50 RE_CNTL
37 0x1cc8 RE_STIPPLE_ADDR
38 0x1ccc RE_STIPPLE_DATA
39 0x1cd0 RE_LINE_PATTERN
40 0x1cd4 RE_LINE_STATE
41 0x1cd8 RE_SCISSOR_TL_0
42 0x1cdc RE_SCISSOR_BR_0
43 0x1ce0 RE_SCISSOR_TL_1
44 0x1ce4 RE_SCISSOR_BR_1
45 0x1ce8 RE_SCISSOR_TL_2
46 0x1cec RE_SCISSOR_BR_2
47 0x1d60 RB3D_DEPTHXY_OFFSET
48 0x1d7c RB3D_STENCILREFMASK
49 0x1d80 RB3D_ROPCNTL
50 0x1d84 RB3D_PLANEMASK
51 0x1d98 VAP_VPORT_XSCALE
52 0x1d9c VAP_VPORT_XOFFSET
53 0x1da0 VAP_VPORT_YSCALE
54 0x1da4 VAP_VPORT_YOFFSET
55 0x1da8 VAP_VPORT_ZSCALE
56 0x1dac VAP_VPORT_ZOFFSET
57 0x1db0 SE_ZBIAS_FACTOR
58 0x1db4 SE_ZBIAS_CONSTANT
59 0x1db8 SE_LINE_WIDTH
60 0x2080 SE_VAP_CNTL
61 0x2090 SE_TCL_OUTPUT_VTX_FMT_0
62 0x2094 SE_TCL_OUTPUT_VTX_FMT_1
63 0x20b0 SE_VTE_CNTL
64 0x2140 SE_CNTL_STATUS
65 0x2180 SE_VTX_STATE_CNTL
66 0x2200 SE_TCL_VECTOR_INDX_REG
67 0x2204 SE_TCL_VECTOR_DATA_REG
68 0x2208 SE_TCL_SCALAR_INDX_REG
69 0x220c SE_TCL_SCALAR_DATA_REG
70 0x2230 SE_TCL_MATRIX_SEL_0
71 0x2234 SE_TCL_MATRIX_SEL_1
72 0x2238 SE_TCL_MATRIX_SEL_2
73 0x223c SE_TCL_MATRIX_SEL_3
74 0x2240 SE_TCL_MATRIX_SEL_4
75 0x2250 SE_TCL_OUTPUT_VTX_COMP_SEL
76 0x2254 SE_TCL_INPUT_VTX_VECTOR_ADDR_0
77 0x2258 SE_TCL_INPUT_VTX_VECTOR_ADDR_1
78 0x225c SE_TCL_INPUT_VTX_VECTOR_ADDR_2
79 0x2260 SE_TCL_INPUT_VTX_VECTOR_ADDR_3
80 0x2268 SE_TCL_LIGHT_MODEL_CTL_0
81 0x226c SE_TCL_LIGHT_MODEL_CTL_1
82 0x2270 SE_TCL_PER_LIGHT_CTL_0
83 0x2274 SE_TCL_PER_LIGHT_CTL_1
84 0x2278 SE_TCL_PER_LIGHT_CTL_2
85 0x227c SE_TCL_PER_LIGHT_CTL_3
86 0x2284 VAP_PVS_STATE_FLUSH_REG
87 0x22a8 SE_TCL_TEX_PROC_CTL_2
88 0x22ac SE_TCL_TEX_PROC_CTL_3
89 0x22b0 SE_TCL_TEX_PROC_CTL_0
90 0x22b4 SE_TCL_TEX_PROC_CTL_1
91 0x22b8 SE_TCL_TEX_CYL_WRAP_CTL
92 0x22c0 SE_TCL_UCP_VERT_BLEND_CNTL
93 0x22c4 SE_TCL_POINT_SPRITE_CNTL
94 0x22d0 SE_PVS_CNTL
95 0x22d4 SE_PVS_CONST_CNTL
96 0x2648 RE_POINTSIZE
97 0x26c0 RE_TOP_LEFT
98 0x26c4 RE_MISC
99 0x26f0 RE_AUX_SCISSOR_CNTL
100 0x2c14 PP_BORDER_COLOR_0
101 0x2c34 PP_BORDER_COLOR_1
102 0x2c54 PP_BORDER_COLOR_2
103 0x2c74 PP_BORDER_COLOR_3
104 0x2c94 PP_BORDER_COLOR_4
105 0x2cb4 PP_BORDER_COLOR_5
106 0x2cc4 PP_CNTL_X
107 0x2cf8 PP_TRI_PERF
108 0x2cfc PP_PERF_CNTL
109 0x2d9c PP_TAM_DEBUG3
110 0x2ee0 PP_TFACTOR_0
111 0x2ee4 PP_TFACTOR_1
112 0x2ee8 PP_TFACTOR_2
113 0x2eec PP_TFACTOR_3
114 0x2ef0 PP_TFACTOR_4
115 0x2ef4 PP_TFACTOR_5
116 0x2ef8 PP_TFACTOR_6
117 0x2efc PP_TFACTOR_7
118 0x2f00 PP_TXCBLEND_0
119 0x2f04 PP_TXCBLEND2_0
120 0x2f08 PP_TXABLEND_0
121 0x2f0c PP_TXABLEND2_0
122 0x2f10 PP_TXCBLEND_1
123 0x2f14 PP_TXCBLEND2_1
124 0x2f18 PP_TXABLEND_1
125 0x2f1c PP_TXABLEND2_1
126 0x2f20 PP_TXCBLEND_2
127 0x2f24 PP_TXCBLEND2_2
128 0x2f28 PP_TXABLEND_2
129 0x2f2c PP_TXABLEND2_2
130 0x2f30 PP_TXCBLEND_3
131 0x2f34 PP_TXCBLEND2_3
132 0x2f38 PP_TXABLEND_3
133 0x2f3c PP_TXABLEND2_3
134 0x2f40 PP_TXCBLEND_4
135 0x2f44 PP_TXCBLEND2_4
136 0x2f48 PP_TXABLEND_4
137 0x2f4c PP_TXABLEND2_4
138 0x2f50 PP_TXCBLEND_5
139 0x2f54 PP_TXCBLEND2_5
140 0x2f58 PP_TXABLEND_5
141 0x2f5c PP_TXABLEND2_5
142 0x2f60 PP_TXCBLEND_6
143 0x2f64 PP_TXCBLEND2_6
144 0x2f68 PP_TXABLEND_6
145 0x2f6c PP_TXABLEND2_6
146 0x2f70 PP_TXCBLEND_7
147 0x2f74 PP_TXCBLEND2_7
148 0x2f78 PP_TXABLEND_7
149 0x2f7c PP_TXABLEND2_7
150 0x2f80 PP_TXCBLEND_8
151 0x2f84 PP_TXCBLEND2_8
152 0x2f88 PP_TXABLEND_8
153 0x2f8c PP_TXABLEND2_8
154 0x2f90 PP_TXCBLEND_9
155 0x2f94 PP_TXCBLEND2_9
156 0x2f98 PP_TXABLEND_9
157 0x2f9c PP_TXABLEND2_9
158 0x2fa0 PP_TXCBLEND_10
159 0x2fa4 PP_TXCBLEND2_10
160 0x2fa8 PP_TXABLEND_10
161 0x2fac PP_TXABLEND2_10
162 0x2fb0 PP_TXCBLEND_11
163 0x2fb4 PP_TXCBLEND2_11
164 0x2fb8 PP_TXABLEND_11
165 0x2fbc PP_TXABLEND2_11
166 0x2fc0 PP_TXCBLEND_12
167 0x2fc4 PP_TXCBLEND2_12
168 0x2fc8 PP_TXABLEND_12
169 0x2fcc PP_TXABLEND2_12
170 0x2fd0 PP_TXCBLEND_13
171 0x2fd4 PP_TXCBLEND2_13
172 0x2fd8 PP_TXABLEND_13
173 0x2fdc PP_TXABLEND2_13
174 0x2fe0 PP_TXCBLEND_14
175 0x2fe4 PP_TXCBLEND2_14
176 0x2fe8 PP_TXABLEND_14
177 0x2fec PP_TXABLEND2_14
178 0x2ff0 PP_TXCBLEND_15
179 0x2ff4 PP_TXCBLEND2_15
180 0x2ff8 PP_TXABLEND_15
181 0x2ffc PP_TXABLEND2_15
182 0x3218 RB3D_BLENCOLOR
183 0x321c RB3D_ABLENDCNTL
184 0x3220 RB3D_CBLENDCNTL
185 0x3290 RB3D_ZPASS_DATA