2 * sca3000_core.c -- support VTI sca3000 series accelerometers via SPI
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License version 2 as published by
6 * the Free Software Foundation.
8 * Copyright (c) 2009 Jonathan Cameron <jic23@kernel.org>
10 * See industrialio/accels/sca3000.h for comments.
13 #include <linux/interrupt.h>
15 #include <linux/device.h>
16 #include <linux/slab.h>
17 #include <linux/kernel.h>
18 #include <linux/spi/spi.h>
19 #include <linux/sysfs.h>
20 #include <linux/module.h>
21 #include <linux/uaccess.h>
22 #include <linux/iio/iio.h>
23 #include <linux/iio/sysfs.h>
24 #include <linux/iio/events.h>
25 #include <linux/iio/buffer.h>
26 #include <linux/iio/kfifo_buf.h>
28 #define SCA3000_WRITE_REG(a) (((a) << 2) | 0x02)
29 #define SCA3000_READ_REG(a) ((a) << 2)
31 #define SCA3000_REG_REVID_ADDR 0x00
32 #define SCA3000_REG_REVID_MAJOR_MASK GENMASK(8, 4)
33 #define SCA3000_REG_REVID_MINOR_MASK GENMASK(3, 0)
35 #define SCA3000_REG_STATUS_ADDR 0x02
36 #define SCA3000_LOCKED BIT(5)
37 #define SCA3000_EEPROM_CS_ERROR BIT(1)
38 #define SCA3000_SPI_FRAME_ERROR BIT(0)
40 /* All reads done using register decrement so no need to directly access LSBs */
41 #define SCA3000_REG_X_MSB_ADDR 0x05
42 #define SCA3000_REG_Y_MSB_ADDR 0x07
43 #define SCA3000_REG_Z_MSB_ADDR 0x09
45 #define SCA3000_REG_RING_OUT_ADDR 0x0f
47 /* Temp read untested - the e05 doesn't have the sensor */
48 #define SCA3000_REG_TEMP_MSB_ADDR 0x13
50 #define SCA3000_REG_MODE_ADDR 0x14
51 #define SCA3000_MODE_PROT_MASK 0x28
52 #define SCA3000_REG_MODE_RING_BUF_ENABLE BIT(7)
53 #define SCA3000_REG_MODE_RING_BUF_8BIT BIT(6)
56 * Free fall detection triggers an interrupt if the acceleration
57 * is below a threshold for equivalent of 25cm drop
59 #define SCA3000_REG_MODE_FREE_FALL_DETECT BIT(4)
60 #define SCA3000_REG_MODE_MEAS_MODE_NORMAL 0x00
61 #define SCA3000_REG_MODE_MEAS_MODE_OP_1 0x01
62 #define SCA3000_REG_MODE_MEAS_MODE_OP_2 0x02
65 * In motion detection mode the accelerations are band pass filtered
66 * (approx 1 - 25Hz) and then a programmable threshold used to trigger
69 #define SCA3000_REG_MODE_MEAS_MODE_MOT_DET 0x03
70 #define SCA3000_REG_MODE_MODE_MASK 0x03
72 #define SCA3000_REG_BUF_COUNT_ADDR 0x15
74 #define SCA3000_REG_INT_STATUS_ADDR 0x16
75 #define SCA3000_REG_INT_STATUS_THREE_QUARTERS BIT(7)
76 #define SCA3000_REG_INT_STATUS_HALF BIT(6)
78 #define SCA3000_INT_STATUS_FREE_FALL BIT(3)
79 #define SCA3000_INT_STATUS_Y_TRIGGER BIT(2)
80 #define SCA3000_INT_STATUS_X_TRIGGER BIT(1)
81 #define SCA3000_INT_STATUS_Z_TRIGGER BIT(0)
83 /* Used to allow access to multiplexed registers */
84 #define SCA3000_REG_CTRL_SEL_ADDR 0x18
85 /* Only available for SCA3000-D03 and SCA3000-D01 */
86 #define SCA3000_REG_CTRL_SEL_I2C_DISABLE 0x01
87 #define SCA3000_REG_CTRL_SEL_MD_CTRL 0x02
88 #define SCA3000_REG_CTRL_SEL_MD_Y_TH 0x03
89 #define SCA3000_REG_CTRL_SEL_MD_X_TH 0x04
90 #define SCA3000_REG_CTRL_SEL_MD_Z_TH 0x05
92 * BE VERY CAREFUL WITH THIS, IF 3 BITS ARE NOT SET the device
95 #define SCA3000_REG_CTRL_SEL_OUT_CTRL 0x0B
97 #define SCA3000_REG_OUT_CTRL_PROT_MASK 0xE0
98 #define SCA3000_REG_OUT_CTRL_BUF_X_EN 0x10
99 #define SCA3000_REG_OUT_CTRL_BUF_Y_EN 0x08
100 #define SCA3000_REG_OUT_CTRL_BUF_Z_EN 0x04
101 #define SCA3000_REG_OUT_CTRL_BUF_DIV_MASK 0x03
102 #define SCA3000_REG_OUT_CTRL_BUF_DIV_4 0x02
103 #define SCA3000_REG_OUT_CTRL_BUF_DIV_2 0x01
107 * Control which motion detector interrupts are on.
108 * For now only OR combinations are supported.
110 #define SCA3000_MD_CTRL_PROT_MASK 0xC0
111 #define SCA3000_MD_CTRL_OR_Y BIT(0)
112 #define SCA3000_MD_CTRL_OR_X BIT(1)
113 #define SCA3000_MD_CTRL_OR_Z BIT(2)
114 /* Currently unsupported */
115 #define SCA3000_MD_CTRL_AND_Y BIT(3)
116 #define SCA3000_MD_CTRL_AND_X BIT(4)
117 #define SAC3000_MD_CTRL_AND_Z BIT(5)
120 * Some control registers of complex access methods requiring this register to
121 * be used to remove a lock.
123 #define SCA3000_REG_UNLOCK_ADDR 0x1e
125 #define SCA3000_REG_INT_MASK_ADDR 0x21
126 #define SCA3000_REG_INT_MASK_PROT_MASK 0x1C
128 #define SCA3000_REG_INT_MASK_RING_THREE_QUARTER BIT(7)
129 #define SCA3000_REG_INT_MASK_RING_HALF BIT(6)
131 #define SCA3000_REG_INT_MASK_ALL_INTS 0x02
132 #define SCA3000_REG_INT_MASK_ACTIVE_HIGH 0x01
133 #define SCA3000_REG_INT_MASK_ACTIVE_LOW 0x00
134 /* Values of multiplexed registers (write to ctrl_data after select) */
135 #define SCA3000_REG_CTRL_DATA_ADDR 0x22
138 * Measurement modes available on some sca3000 series chips. Code assumes others
139 * may become available in the future.
141 * Bypass - Bypass the low-pass filter in the signal channel so as to increase
144 * Narrow - Narrow low-pass filtering of the signal channel and half output
145 * data rate by decimation.
147 * Wide - Widen low-pass filtering of signal channel to increase bandwidth
149 #define SCA3000_OP_MODE_BYPASS 0x01
150 #define SCA3000_OP_MODE_NARROW 0x02
151 #define SCA3000_OP_MODE_WIDE 0x04
152 #define SCA3000_MAX_TX 6
153 #define SCA3000_MAX_RX 2
156 * struct sca3000_state - device instance state information
157 * @us: the associated spi device
158 * @info: chip variant information
159 * @last_timestamp: the timestamp of the last event
160 * @mo_det_use_count: reference counter for the motion detection unit
161 * @lock: lock used to protect elements of sca3000_state
162 * and the underlying device state.
163 * @tx: dma-able transmit buffer
164 * @rx: dma-able receive buffer
166 struct sca3000_state
{
167 struct spi_device
*us
;
168 const struct sca3000_chip_info
*info
;
170 int mo_det_use_count
;
172 /* Can these share a cacheline ? */
173 u8 rx
[384] ____cacheline_aligned
;
174 u8 tx
[6] ____cacheline_aligned
;
178 * struct sca3000_chip_info - model dependent parameters
179 * @scale: scale * 10^-6
180 * @temp_output: some devices have temperature sensors.
181 * @measurement_mode_freq: normal mode sampling frequency
182 * @measurement_mode_3db_freq: 3db cutoff frequency of the low pass filter for
183 * the normal measurement mode.
184 * @option_mode_1: first optional mode. Not all models have one
185 * @option_mode_1_freq: option mode 1 sampling frequency
186 * @option_mode_1_3db_freq: 3db cutoff frequency of the low pass filter for
187 * the first option mode.
188 * @option_mode_2: second optional mode. Not all chips have one
189 * @option_mode_2_freq: option mode 2 sampling frequency
190 * @option_mode_2_3db_freq: 3db cutoff frequency of the low pass filter for
191 * the second option mode.
192 * @mod_det_mult_xz: Bit wise multipliers to calculate the threshold
193 * for motion detection in the x and z axis.
194 * @mod_det_mult_y: Bit wise multipliers to calculate the threshold
195 * for motion detection in the y axis.
197 * This structure is used to hold information about the functionality of a given
200 struct sca3000_chip_info
{
203 int measurement_mode_freq
;
204 int measurement_mode_3db_freq
;
206 int option_mode_1_freq
;
207 int option_mode_1_3db_freq
;
209 int option_mode_2_freq
;
210 int option_mode_2_3db_freq
;
211 int mot_det_mult_xz
[6];
212 int mot_det_mult_y
[7];
215 enum sca3000_variant
{
223 * Note where option modes are not defined, the chip simply does not
225 * Other chips in the sca3000 series use i2c and are not included here.
227 * Some of these devices are only listed in the family data sheet and
228 * do not actually appear to be available.
230 static const struct sca3000_chip_info sca3000_spi_chip_info_tbl
[] = {
234 .measurement_mode_freq
= 250,
235 .measurement_mode_3db_freq
= 45,
236 .option_mode_1
= SCA3000_OP_MODE_BYPASS
,
237 .option_mode_1_freq
= 250,
238 .option_mode_1_3db_freq
= 70,
239 .mot_det_mult_xz
= {50, 100, 200, 350, 650, 1300},
240 .mot_det_mult_y
= {50, 100, 150, 250, 450, 850, 1750},
244 .measurement_mode_freq
= 125,
245 .measurement_mode_3db_freq
= 40,
246 .option_mode_1
= SCA3000_OP_MODE_NARROW
,
247 .option_mode_1_freq
= 63,
248 .option_mode_1_3db_freq
= 11,
249 .mot_det_mult_xz
= {100, 150, 300, 550, 1050, 2050},
250 .mot_det_mult_y
= {50, 100, 200, 350, 700, 1350, 2700},
254 .measurement_mode_freq
= 100,
255 .measurement_mode_3db_freq
= 38,
256 .option_mode_1
= SCA3000_OP_MODE_NARROW
,
257 .option_mode_1_freq
= 50,
258 .option_mode_1_3db_freq
= 9,
259 .option_mode_2
= SCA3000_OP_MODE_WIDE
,
260 .option_mode_2_freq
= 400,
261 .option_mode_2_3db_freq
= 70,
262 .mot_det_mult_xz
= {200, 300, 600, 1100, 2100, 4100},
263 .mot_det_mult_y
= {100, 200, 400, 7000, 1400, 2700, 54000},
267 .measurement_mode_freq
= 200,
268 .measurement_mode_3db_freq
= 60,
269 .option_mode_1
= SCA3000_OP_MODE_NARROW
,
270 .option_mode_1_freq
= 50,
271 .option_mode_1_3db_freq
= 9,
272 .option_mode_2
= SCA3000_OP_MODE_WIDE
,
273 .option_mode_2_freq
= 400,
274 .option_mode_2_3db_freq
= 75,
275 .mot_det_mult_xz
= {600, 900, 1700, 3200, 6100, 11900},
276 .mot_det_mult_y
= {300, 600, 1200, 2000, 4100, 7800, 15600},
280 static int sca3000_write_reg(struct sca3000_state
*st
, u8 address
, u8 val
)
282 st
->tx
[0] = SCA3000_WRITE_REG(address
);
284 return spi_write(st
->us
, st
->tx
, 2);
287 static int sca3000_read_data_short(struct sca3000_state
*st
,
291 struct spi_transfer xfer
[2] = {
300 st
->tx
[0] = SCA3000_READ_REG(reg_address_high
);
302 return spi_sync_transfer(st
->us
, xfer
, ARRAY_SIZE(xfer
));
306 * sca3000_reg_lock_on() - test if the ctrl register lock is on
307 * @st: Driver specific device instance data.
311 static int sca3000_reg_lock_on(struct sca3000_state
*st
)
315 ret
= sca3000_read_data_short(st
, SCA3000_REG_STATUS_ADDR
, 1);
319 return !(st
->rx
[0] & SCA3000_LOCKED
);
323 * __sca3000_unlock_reg_lock() - unlock the control registers
324 * @st: Driver specific device instance data.
326 * Note the device does not appear to support doing this in a single transfer.
327 * This should only ever be used as part of ctrl reg read.
328 * Lock must be held before calling this
330 static int __sca3000_unlock_reg_lock(struct sca3000_state
*st
)
332 struct spi_transfer xfer
[3] = {
340 .tx_buf
= st
->tx
+ 2,
343 .tx_buf
= st
->tx
+ 4,
346 st
->tx
[0] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR
);
348 st
->tx
[2] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR
);
350 st
->tx
[4] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR
);
353 return spi_sync_transfer(st
->us
, xfer
, ARRAY_SIZE(xfer
));
357 * sca3000_write_ctrl_reg() write to a lock protect ctrl register
358 * @st: Driver specific device instance data.
359 * @sel: selects which registers we wish to write to
360 * @val: the value to be written
362 * Certain control registers are protected against overwriting by the lock
363 * register and use a shared write address. This function allows writing of
367 static int sca3000_write_ctrl_reg(struct sca3000_state
*st
,
373 ret
= sca3000_reg_lock_on(st
);
377 ret
= __sca3000_unlock_reg_lock(st
);
382 /* Set the control select register */
383 ret
= sca3000_write_reg(st
, SCA3000_REG_CTRL_SEL_ADDR
, sel
);
387 /* Write the actual value into the register */
388 ret
= sca3000_write_reg(st
, SCA3000_REG_CTRL_DATA_ADDR
, val
);
395 * sca3000_read_ctrl_reg() read from lock protected control register.
396 * @st: Driver specific device instance data.
397 * @ctrl_reg: Which ctrl register do we want to read.
401 static int sca3000_read_ctrl_reg(struct sca3000_state
*st
,
406 ret
= sca3000_reg_lock_on(st
);
410 ret
= __sca3000_unlock_reg_lock(st
);
414 /* Set the control select register */
415 ret
= sca3000_write_reg(st
, SCA3000_REG_CTRL_SEL_ADDR
, ctrl_reg
);
418 ret
= sca3000_read_data_short(st
, SCA3000_REG_CTRL_DATA_ADDR
, 1);
427 * sca3000_show_rev() - sysfs interface to read the chip revision number
428 * @indio_dev: Device instance specific generic IIO data.
429 * Driver specific device instance data can be obtained via
430 * via iio_priv(indio_dev)
432 static int sca3000_print_rev(struct iio_dev
*indio_dev
)
435 struct sca3000_state
*st
= iio_priv(indio_dev
);
437 mutex_lock(&st
->lock
);
438 ret
= sca3000_read_data_short(st
, SCA3000_REG_REVID_ADDR
, 1);
441 dev_info(&indio_dev
->dev
,
442 "sca3000 revision major=%lu, minor=%lu\n",
443 st
->rx
[0] & SCA3000_REG_REVID_MAJOR_MASK
,
444 st
->rx
[0] & SCA3000_REG_REVID_MINOR_MASK
);
446 mutex_unlock(&st
->lock
);
452 sca3000_show_available_3db_freqs(struct device
*dev
,
453 struct device_attribute
*attr
,
456 struct iio_dev
*indio_dev
= dev_to_iio_dev(dev
);
457 struct sca3000_state
*st
= iio_priv(indio_dev
);
460 len
= sprintf(buf
, "%d", st
->info
->measurement_mode_3db_freq
);
461 if (st
->info
->option_mode_1
)
462 len
+= sprintf(buf
+ len
, " %d",
463 st
->info
->option_mode_1_3db_freq
);
464 if (st
->info
->option_mode_2
)
465 len
+= sprintf(buf
+ len
, " %d",
466 st
->info
->option_mode_2_3db_freq
);
467 len
+= sprintf(buf
+ len
, "\n");
472 static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available
,
473 S_IRUGO
, sca3000_show_available_3db_freqs
,
476 static const struct iio_event_spec sca3000_event
= {
477 .type
= IIO_EV_TYPE_MAG
,
478 .dir
= IIO_EV_DIR_RISING
,
479 .mask_separate
= BIT(IIO_EV_INFO_VALUE
) | BIT(IIO_EV_INFO_ENABLE
),
483 * Note the hack in the number of bits to pretend we have 2 more than
486 #define SCA3000_CHAN(index, mod) \
491 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
492 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |\
493 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),\
494 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\
496 .scan_index = index, \
502 .endianness = IIO_BE, \
504 .event_spec = &sca3000_event, \
505 .num_event_specs = 1, \
508 static const struct iio_event_spec sca3000_freefall_event_spec
= {
509 .type
= IIO_EV_TYPE_MAG
,
510 .dir
= IIO_EV_DIR_FALLING
,
511 .mask_separate
= BIT(IIO_EV_INFO_ENABLE
) |
512 BIT(IIO_EV_INFO_PERIOD
),
515 static const struct iio_chan_spec sca3000_channels
[] = {
516 SCA3000_CHAN(0, IIO_MOD_X
),
517 SCA3000_CHAN(1, IIO_MOD_Y
),
518 SCA3000_CHAN(2, IIO_MOD_Z
),
522 .channel2
= IIO_MOD_X_AND_Y_AND_Z
,
523 .scan_index
= -1, /* Fake channel */
524 .event_spec
= &sca3000_freefall_event_spec
,
525 .num_event_specs
= 1,
529 static const struct iio_chan_spec sca3000_channels_with_temp
[] = {
530 SCA3000_CHAN(0, IIO_MOD_X
),
531 SCA3000_CHAN(1, IIO_MOD_Y
),
532 SCA3000_CHAN(2, IIO_MOD_Z
),
535 .info_mask_separate
= BIT(IIO_CHAN_INFO_RAW
),
536 .info_mask_shared_by_type
= BIT(IIO_CHAN_INFO_SCALE
) |
537 BIT(IIO_CHAN_INFO_OFFSET
),
538 /* No buffer support */
544 .channel2
= IIO_MOD_X_AND_Y_AND_Z
,
545 .scan_index
= -1, /* Fake channel */
546 .event_spec
= &sca3000_freefall_event_spec
,
547 .num_event_specs
= 1,
551 static u8 sca3000_addresses
[3][3] = {
552 [0] = {SCA3000_REG_X_MSB_ADDR
, SCA3000_REG_CTRL_SEL_MD_X_TH
,
553 SCA3000_MD_CTRL_OR_X
},
554 [1] = {SCA3000_REG_Y_MSB_ADDR
, SCA3000_REG_CTRL_SEL_MD_Y_TH
,
555 SCA3000_MD_CTRL_OR_Y
},
556 [2] = {SCA3000_REG_Z_MSB_ADDR
, SCA3000_REG_CTRL_SEL_MD_Z_TH
,
557 SCA3000_MD_CTRL_OR_Z
},
561 * __sca3000_get_base_freq() - obtain mode specific base frequency
562 * @st: Private driver specific device instance specific state.
563 * @info: chip type specific information.
564 * @base_freq: Base frequency for the current measurement mode.
568 static inline int __sca3000_get_base_freq(struct sca3000_state
*st
,
569 const struct sca3000_chip_info
*info
,
574 ret
= sca3000_read_data_short(st
, SCA3000_REG_MODE_ADDR
, 1);
577 switch (SCA3000_REG_MODE_MODE_MASK
& st
->rx
[0]) {
578 case SCA3000_REG_MODE_MEAS_MODE_NORMAL
:
579 *base_freq
= info
->measurement_mode_freq
;
581 case SCA3000_REG_MODE_MEAS_MODE_OP_1
:
582 *base_freq
= info
->option_mode_1_freq
;
584 case SCA3000_REG_MODE_MEAS_MODE_OP_2
:
585 *base_freq
= info
->option_mode_2_freq
;
595 * sca3000_read_raw_samp_freq() - read_raw handler for IIO_CHAN_INFO_SAMP_FREQ
596 * @st: Private driver specific device instance specific state.
597 * @val: The frequency read back.
601 static int sca3000_read_raw_samp_freq(struct sca3000_state
*st
, int *val
)
605 ret
= __sca3000_get_base_freq(st
, st
->info
, val
);
609 ret
= sca3000_read_ctrl_reg(st
, SCA3000_REG_CTRL_SEL_OUT_CTRL
);
614 ret
&= SCA3000_REG_OUT_CTRL_BUF_DIV_MASK
;
616 case SCA3000_REG_OUT_CTRL_BUF_DIV_2
:
619 case SCA3000_REG_OUT_CTRL_BUF_DIV_4
:
629 * sca3000_write_raw_samp_freq() - write_raw handler for IIO_CHAN_INFO_SAMP_FREQ
630 * @st: Private driver specific device instance specific state.
631 * @val: The frequency desired.
635 static int sca3000_write_raw_samp_freq(struct sca3000_state
*st
, int val
)
637 int ret
, base_freq
, ctrlval
;
639 ret
= __sca3000_get_base_freq(st
, st
->info
, &base_freq
);
643 ret
= sca3000_read_ctrl_reg(st
, SCA3000_REG_CTRL_SEL_OUT_CTRL
);
647 ctrlval
= ret
& ~SCA3000_REG_OUT_CTRL_BUF_DIV_MASK
;
649 if (val
== base_freq
/ 2)
650 ctrlval
|= SCA3000_REG_OUT_CTRL_BUF_DIV_2
;
651 if (val
== base_freq
/ 4)
652 ctrlval
|= SCA3000_REG_OUT_CTRL_BUF_DIV_4
;
653 else if (val
!= base_freq
)
656 return sca3000_write_ctrl_reg(st
, SCA3000_REG_CTRL_SEL_OUT_CTRL
,
660 static int sca3000_read_3db_freq(struct sca3000_state
*st
, int *val
)
664 ret
= sca3000_read_data_short(st
, SCA3000_REG_MODE_ADDR
, 1);
668 /* mask bottom 2 bits - only ones that are relevant */
669 st
->rx
[0] &= SCA3000_REG_MODE_MODE_MASK
;
671 case SCA3000_REG_MODE_MEAS_MODE_NORMAL
:
672 *val
= st
->info
->measurement_mode_3db_freq
;
674 case SCA3000_REG_MODE_MEAS_MODE_MOT_DET
:
676 case SCA3000_REG_MODE_MEAS_MODE_OP_1
:
677 *val
= st
->info
->option_mode_1_3db_freq
;
679 case SCA3000_REG_MODE_MEAS_MODE_OP_2
:
680 *val
= st
->info
->option_mode_2_3db_freq
;
687 static int sca3000_write_3db_freq(struct sca3000_state
*st
, int val
)
692 if (val
== st
->info
->measurement_mode_3db_freq
)
693 mode
= SCA3000_REG_MODE_MEAS_MODE_NORMAL
;
694 else if (st
->info
->option_mode_1
&&
695 (val
== st
->info
->option_mode_1_3db_freq
))
696 mode
= SCA3000_REG_MODE_MEAS_MODE_OP_1
;
697 else if (st
->info
->option_mode_2
&&
698 (val
== st
->info
->option_mode_2_3db_freq
))
699 mode
= SCA3000_REG_MODE_MEAS_MODE_OP_2
;
702 ret
= sca3000_read_data_short(st
, SCA3000_REG_MODE_ADDR
, 1);
706 st
->rx
[0] &= ~SCA3000_REG_MODE_MODE_MASK
;
707 st
->rx
[0] |= (mode
& SCA3000_REG_MODE_MODE_MASK
);
709 return sca3000_write_reg(st
, SCA3000_REG_MODE_ADDR
, st
->rx
[0]);
712 static int sca3000_read_raw(struct iio_dev
*indio_dev
,
713 struct iio_chan_spec
const *chan
,
718 struct sca3000_state
*st
= iio_priv(indio_dev
);
723 case IIO_CHAN_INFO_RAW
:
724 mutex_lock(&st
->lock
);
725 if (chan
->type
== IIO_ACCEL
) {
726 if (st
->mo_det_use_count
) {
727 mutex_unlock(&st
->lock
);
730 address
= sca3000_addresses
[chan
->address
][0];
731 ret
= sca3000_read_data_short(st
, address
, 2);
733 mutex_unlock(&st
->lock
);
736 *val
= (be16_to_cpup((__be16
*)st
->rx
) >> 3) & 0x1FFF;
737 *val
= ((*val
) << (sizeof(*val
) * 8 - 13)) >>
738 (sizeof(*val
) * 8 - 13);
740 /* get the temperature when available */
741 ret
= sca3000_read_data_short(st
,
742 SCA3000_REG_TEMP_MSB_ADDR
,
745 mutex_unlock(&st
->lock
);
748 *val
= ((st
->rx
[0] & 0x3F) << 3) |
749 ((st
->rx
[1] & 0xE0) >> 5);
751 mutex_unlock(&st
->lock
);
753 case IIO_CHAN_INFO_SCALE
:
755 if (chan
->type
== IIO_ACCEL
)
756 *val2
= st
->info
->scale
;
757 else /* temperature */
759 return IIO_VAL_INT_PLUS_MICRO
;
760 case IIO_CHAN_INFO_OFFSET
:
763 return IIO_VAL_INT_PLUS_MICRO
;
764 case IIO_CHAN_INFO_SAMP_FREQ
:
765 mutex_lock(&st
->lock
);
766 ret
= sca3000_read_raw_samp_freq(st
, val
);
767 mutex_unlock(&st
->lock
);
768 return ret
? ret
: IIO_VAL_INT
;
769 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY
:
770 mutex_lock(&st
->lock
);
771 ret
= sca3000_read_3db_freq(st
, val
);
772 mutex_unlock(&st
->lock
);
779 static int sca3000_write_raw(struct iio_dev
*indio_dev
,
780 struct iio_chan_spec
const *chan
,
781 int val
, int val2
, long mask
)
783 struct sca3000_state
*st
= iio_priv(indio_dev
);
787 case IIO_CHAN_INFO_SAMP_FREQ
:
790 mutex_lock(&st
->lock
);
791 ret
= sca3000_write_raw_samp_freq(st
, val
);
792 mutex_unlock(&st
->lock
);
794 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY
:
797 mutex_lock(&st
->lock
);
798 ret
= sca3000_write_3db_freq(st
, val
);
799 mutex_unlock(&st
->lock
);
809 * sca3000_read_av_freq() - sysfs function to get available frequencies
810 * @dev: Device structure for this device.
811 * @attr: Description of the attribute.
812 * @buf: Incoming string
814 * The later modes are only relevant to the ring buffer - and depend on current
815 * mode. Note that data sheet gives rather wide tolerances for these so integer
816 * division will give good enough answer and not all chips have them specified
819 static ssize_t
sca3000_read_av_freq(struct device
*dev
,
820 struct device_attribute
*attr
,
823 struct iio_dev
*indio_dev
= dev_to_iio_dev(dev
);
824 struct sca3000_state
*st
= iio_priv(indio_dev
);
825 int len
= 0, ret
, val
;
827 mutex_lock(&st
->lock
);
828 ret
= sca3000_read_data_short(st
, SCA3000_REG_MODE_ADDR
, 1);
830 mutex_unlock(&st
->lock
);
834 switch (val
& SCA3000_REG_MODE_MODE_MASK
) {
835 case SCA3000_REG_MODE_MEAS_MODE_NORMAL
:
836 len
+= sprintf(buf
+ len
, "%d %d %d\n",
837 st
->info
->measurement_mode_freq
,
838 st
->info
->measurement_mode_freq
/ 2,
839 st
->info
->measurement_mode_freq
/ 4);
841 case SCA3000_REG_MODE_MEAS_MODE_OP_1
:
842 len
+= sprintf(buf
+ len
, "%d %d %d\n",
843 st
->info
->option_mode_1_freq
,
844 st
->info
->option_mode_1_freq
/ 2,
845 st
->info
->option_mode_1_freq
/ 4);
847 case SCA3000_REG_MODE_MEAS_MODE_OP_2
:
848 len
+= sprintf(buf
+ len
, "%d %d %d\n",
849 st
->info
->option_mode_2_freq
,
850 st
->info
->option_mode_2_freq
/ 2,
851 st
->info
->option_mode_2_freq
/ 4);
860 * Should only really be registered if ring buffer support is compiled in.
861 * Does no harm however and doing it right would add a fair bit of complexity
863 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sca3000_read_av_freq
);
866 * sca3000_read_event_value() - query of a threshold or period
868 static int sca3000_read_event_value(struct iio_dev
*indio_dev
,
869 const struct iio_chan_spec
*chan
,
870 enum iio_event_type type
,
871 enum iio_event_direction dir
,
872 enum iio_event_info info
,
876 struct sca3000_state
*st
= iio_priv(indio_dev
);
879 case IIO_EV_INFO_VALUE
:
880 mutex_lock(&st
->lock
);
881 ret
= sca3000_read_ctrl_reg(st
,
882 sca3000_addresses
[chan
->address
][1]);
883 mutex_unlock(&st
->lock
);
887 if (chan
->channel2
== IIO_MOD_Y
)
888 for_each_set_bit(i
, (unsigned long *)&ret
,
889 ARRAY_SIZE(st
->info
->mot_det_mult_y
))
890 *val
+= st
->info
->mot_det_mult_y
[i
];
892 for_each_set_bit(i
, (unsigned long *)&ret
,
893 ARRAY_SIZE(st
->info
->mot_det_mult_xz
))
894 *val
+= st
->info
->mot_det_mult_xz
[i
];
897 case IIO_EV_INFO_PERIOD
:
900 return IIO_VAL_INT_PLUS_MICRO
;
907 * sca3000_write_value() - control of threshold and period
908 * @indio_dev: Device instance specific IIO information.
909 * @chan: Description of the channel for which the event is being
911 * @type: The type of event being configured, here magnitude rising
912 * as everything else is read only.
913 * @dir: Direction of the event (here rising)
914 * @info: What information about the event are we configuring.
915 * Here the threshold only.
916 * @val: Integer part of the value being written..
917 * @val2: Non integer part of the value being written. Here always 0.
919 static int sca3000_write_event_value(struct iio_dev
*indio_dev
,
920 const struct iio_chan_spec
*chan
,
921 enum iio_event_type type
,
922 enum iio_event_direction dir
,
923 enum iio_event_info info
,
926 struct sca3000_state
*st
= iio_priv(indio_dev
);
931 if (chan
->channel2
== IIO_MOD_Y
) {
932 i
= ARRAY_SIZE(st
->info
->mot_det_mult_y
);
934 if (val
>= st
->info
->mot_det_mult_y
[--i
]) {
935 nonlinear
|= (1 << i
);
936 val
-= st
->info
->mot_det_mult_y
[i
];
939 i
= ARRAY_SIZE(st
->info
->mot_det_mult_xz
);
941 if (val
>= st
->info
->mot_det_mult_xz
[--i
]) {
942 nonlinear
|= (1 << i
);
943 val
-= st
->info
->mot_det_mult_xz
[i
];
947 mutex_lock(&st
->lock
);
948 ret
= sca3000_write_ctrl_reg(st
,
949 sca3000_addresses
[chan
->address
][1],
951 mutex_unlock(&st
->lock
);
956 static struct attribute
*sca3000_attributes
[] = {
957 &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available
.dev_attr
.attr
,
958 &iio_dev_attr_sampling_frequency_available
.dev_attr
.attr
,
962 static const struct attribute_group sca3000_attribute_group
= {
963 .attrs
= sca3000_attributes
,
966 static int sca3000_read_data(struct sca3000_state
*st
,
972 struct spi_transfer xfer
[2] = {
982 st
->tx
[0] = SCA3000_READ_REG(reg_address_high
);
983 ret
= spi_sync_transfer(st
->us
, xfer
, ARRAY_SIZE(xfer
));
985 dev_err(get_device(&st
->us
->dev
), "problem reading register");
993 * sca3000_ring_int_process() - ring specific interrupt handling.
994 * @val: Value of the interrupt status register.
995 * @indio_dev: Device instance specific IIO device structure.
997 static void sca3000_ring_int_process(u8 val
, struct iio_dev
*indio_dev
)
999 struct sca3000_state
*st
= iio_priv(indio_dev
);
1000 int ret
, i
, num_available
;
1002 mutex_lock(&st
->lock
);
1004 if (val
& SCA3000_REG_INT_STATUS_HALF
) {
1005 ret
= sca3000_read_data_short(st
, SCA3000_REG_BUF_COUNT_ADDR
,
1009 num_available
= st
->rx
[0];
1011 * num_available is the total number of samples available
1012 * i.e. number of time points * number of channels.
1014 ret
= sca3000_read_data(st
, SCA3000_REG_RING_OUT_ADDR
, st
->rx
,
1018 for (i
= 0; i
< num_available
/ 3; i
++) {
1020 * Dirty hack to cover for 11 bit in fifo, 13 bit
1023 * In theory the bottom two bits are undefined.
1024 * In reality they appear to always be 0.
1026 iio_push_to_buffers(indio_dev
, st
->rx
+ i
* 3 * 2);
1030 mutex_unlock(&st
->lock
);
1034 * sca3000_event_handler() - handling ring and non ring events
1035 * @irq: The irq being handled.
1036 * @private: struct iio_device pointer for the device.
1038 * Ring related interrupt handler. Depending on event, push to
1039 * the ring buffer event chrdev or the event one.
1041 * This function is complicated by the fact that the devices can signify ring
1042 * and non ring events via the same interrupt line and they can only
1043 * be distinguished via a read of the relevant status register.
1045 static irqreturn_t
sca3000_event_handler(int irq
, void *private)
1047 struct iio_dev
*indio_dev
= private;
1048 struct sca3000_state
*st
= iio_priv(indio_dev
);
1050 s64 last_timestamp
= iio_get_time_ns(indio_dev
);
1053 * Could lead if badly timed to an extra read of status reg,
1054 * but ensures no interrupt is missed.
1056 mutex_lock(&st
->lock
);
1057 ret
= sca3000_read_data_short(st
, SCA3000_REG_INT_STATUS_ADDR
, 1);
1059 mutex_unlock(&st
->lock
);
1063 sca3000_ring_int_process(val
, indio_dev
);
1065 if (val
& SCA3000_INT_STATUS_FREE_FALL
)
1066 iio_push_event(indio_dev
,
1067 IIO_MOD_EVENT_CODE(IIO_ACCEL
,
1069 IIO_MOD_X_AND_Y_AND_Z
,
1071 IIO_EV_DIR_FALLING
),
1074 if (val
& SCA3000_INT_STATUS_Y_TRIGGER
)
1075 iio_push_event(indio_dev
,
1076 IIO_MOD_EVENT_CODE(IIO_ACCEL
,
1083 if (val
& SCA3000_INT_STATUS_X_TRIGGER
)
1084 iio_push_event(indio_dev
,
1085 IIO_MOD_EVENT_CODE(IIO_ACCEL
,
1092 if (val
& SCA3000_INT_STATUS_Z_TRIGGER
)
1093 iio_push_event(indio_dev
,
1094 IIO_MOD_EVENT_CODE(IIO_ACCEL
,
1106 * sca3000_read_event_config() what events are enabled
1108 static int sca3000_read_event_config(struct iio_dev
*indio_dev
,
1109 const struct iio_chan_spec
*chan
,
1110 enum iio_event_type type
,
1111 enum iio_event_direction dir
)
1113 struct sca3000_state
*st
= iio_priv(indio_dev
);
1115 /* read current value of mode register */
1116 mutex_lock(&st
->lock
);
1118 ret
= sca3000_read_data_short(st
, SCA3000_REG_MODE_ADDR
, 1);
1122 switch (chan
->channel2
) {
1123 case IIO_MOD_X_AND_Y_AND_Z
:
1124 ret
= !!(st
->rx
[0] & SCA3000_REG_MODE_FREE_FALL_DETECT
);
1130 * Motion detection mode cannot run at the same time as
1131 * acceleration data being read.
1133 if ((st
->rx
[0] & SCA3000_REG_MODE_MODE_MASK
)
1134 != SCA3000_REG_MODE_MEAS_MODE_MOT_DET
) {
1137 ret
= sca3000_read_ctrl_reg(st
,
1138 SCA3000_REG_CTRL_SEL_MD_CTRL
);
1141 /* only supporting logical or's for now */
1142 ret
= !!(ret
& sca3000_addresses
[chan
->address
][2]);
1150 mutex_unlock(&st
->lock
);
1155 static int sca3000_freefall_set_state(struct iio_dev
*indio_dev
, int state
)
1157 struct sca3000_state
*st
= iio_priv(indio_dev
);
1160 /* read current value of mode register */
1161 ret
= sca3000_read_data_short(st
, SCA3000_REG_MODE_ADDR
, 1);
1165 /* if off and should be on */
1166 if (state
&& !(st
->rx
[0] & SCA3000_REG_MODE_FREE_FALL_DETECT
))
1167 return sca3000_write_reg(st
, SCA3000_REG_MODE_ADDR
,
1168 st
->rx
[0] | SCA3000_REG_MODE_FREE_FALL_DETECT
);
1169 /* if on and should be off */
1170 else if (!state
&& (st
->rx
[0] & SCA3000_REG_MODE_FREE_FALL_DETECT
))
1171 return sca3000_write_reg(st
, SCA3000_REG_MODE_ADDR
,
1172 st
->rx
[0] & ~SCA3000_REG_MODE_FREE_FALL_DETECT
);
1177 static int sca3000_motion_detect_set_state(struct iio_dev
*indio_dev
, int axis
,
1180 struct sca3000_state
*st
= iio_priv(indio_dev
);
1184 * First read the motion detector config to find out if
1187 ret
= sca3000_read_ctrl_reg(st
, SCA3000_REG_CTRL_SEL_MD_CTRL
);
1191 /* if off and should be on */
1192 if (state
&& !(ctrlval
& sca3000_addresses
[axis
][2])) {
1193 ret
= sca3000_write_ctrl_reg(st
,
1194 SCA3000_REG_CTRL_SEL_MD_CTRL
,
1196 sca3000_addresses
[axis
][2]);
1199 st
->mo_det_use_count
++;
1200 } else if (!state
&& (ctrlval
& sca3000_addresses
[axis
][2])) {
1201 ret
= sca3000_write_ctrl_reg(st
,
1202 SCA3000_REG_CTRL_SEL_MD_CTRL
,
1204 ~(sca3000_addresses
[axis
][2]));
1207 st
->mo_det_use_count
--;
1210 /* read current value of mode register */
1211 ret
= sca3000_read_data_short(st
, SCA3000_REG_MODE_ADDR
, 1);
1214 /* if off and should be on */
1215 if ((st
->mo_det_use_count
) &&
1216 ((st
->rx
[0] & SCA3000_REG_MODE_MODE_MASK
)
1217 != SCA3000_REG_MODE_MEAS_MODE_MOT_DET
))
1218 return sca3000_write_reg(st
, SCA3000_REG_MODE_ADDR
,
1219 (st
->rx
[0] & ~SCA3000_REG_MODE_MODE_MASK
)
1220 | SCA3000_REG_MODE_MEAS_MODE_MOT_DET
);
1221 /* if on and should be off */
1222 else if (!(st
->mo_det_use_count
) &&
1223 ((st
->rx
[0] & SCA3000_REG_MODE_MODE_MASK
)
1224 == SCA3000_REG_MODE_MEAS_MODE_MOT_DET
))
1225 return sca3000_write_reg(st
, SCA3000_REG_MODE_ADDR
,
1226 st
->rx
[0] & SCA3000_REG_MODE_MODE_MASK
);
1232 * sca3000_write_event_config() - simple on off control for motion detector
1233 * @indio_dev: IIO device instance specific structure. Data specific to this
1234 * particular driver may be accessed via iio_priv(indio_dev).
1235 * @chan: Description of the channel whose event we are configuring.
1236 * @type: The type of event.
1237 * @dir: The direction of the event.
1238 * @state: Desired state of event being configured.
1240 * This is a per axis control, but enabling any will result in the
1241 * motion detector unit being enabled.
1242 * N.B. enabling motion detector stops normal data acquisition.
1243 * There is a complexity in knowing which mode to return to when
1244 * this mode is disabled. Currently normal mode is assumed.
1246 static int sca3000_write_event_config(struct iio_dev
*indio_dev
,
1247 const struct iio_chan_spec
*chan
,
1248 enum iio_event_type type
,
1249 enum iio_event_direction dir
,
1252 struct sca3000_state
*st
= iio_priv(indio_dev
);
1255 mutex_lock(&st
->lock
);
1256 switch (chan
->channel2
) {
1257 case IIO_MOD_X_AND_Y_AND_Z
:
1258 ret
= sca3000_freefall_set_state(indio_dev
, state
);
1264 ret
= sca3000_motion_detect_set_state(indio_dev
,
1272 mutex_unlock(&st
->lock
);
1277 static int sca3000_configure_ring(struct iio_dev
*indio_dev
)
1279 struct iio_buffer
*buffer
;
1281 buffer
= devm_iio_kfifo_allocate(&indio_dev
->dev
);
1285 iio_device_attach_buffer(indio_dev
, buffer
);
1286 indio_dev
->modes
|= INDIO_BUFFER_SOFTWARE
;
1292 int __sca3000_hw_ring_state_set(struct iio_dev
*indio_dev
, bool state
)
1294 struct sca3000_state
*st
= iio_priv(indio_dev
);
1297 mutex_lock(&st
->lock
);
1298 ret
= sca3000_read_data_short(st
, SCA3000_REG_MODE_ADDR
, 1);
1302 dev_info(&indio_dev
->dev
, "supposedly enabling ring buffer\n");
1303 ret
= sca3000_write_reg(st
,
1304 SCA3000_REG_MODE_ADDR
,
1305 (st
->rx
[0] | SCA3000_REG_MODE_RING_BUF_ENABLE
));
1307 ret
= sca3000_write_reg(st
,
1308 SCA3000_REG_MODE_ADDR
,
1309 (st
->rx
[0] & ~SCA3000_REG_MODE_RING_BUF_ENABLE
));
1311 mutex_unlock(&st
->lock
);
1317 * sca3000_hw_ring_preenable() - hw ring buffer preenable function
1318 * @indio_dev: structure representing the IIO device. Device instance
1319 * specific state can be accessed via iio_priv(indio_dev).
1321 * Very simple enable function as the chip will allows normal reads
1322 * during ring buffer operation so as long as it is indeed running
1323 * before we notify the core, the precise ordering does not matter.
1325 static int sca3000_hw_ring_preenable(struct iio_dev
*indio_dev
)
1328 struct sca3000_state
*st
= iio_priv(indio_dev
);
1330 mutex_lock(&st
->lock
);
1332 /* Enable the 50% full interrupt */
1333 ret
= sca3000_read_data_short(st
, SCA3000_REG_INT_MASK_ADDR
, 1);
1336 ret
= sca3000_write_reg(st
,
1337 SCA3000_REG_INT_MASK_ADDR
,
1338 st
->rx
[0] | SCA3000_REG_INT_MASK_RING_HALF
);
1342 mutex_unlock(&st
->lock
);
1344 return __sca3000_hw_ring_state_set(indio_dev
, 1);
1347 mutex_unlock(&st
->lock
);
1352 static int sca3000_hw_ring_postdisable(struct iio_dev
*indio_dev
)
1355 struct sca3000_state
*st
= iio_priv(indio_dev
);
1357 ret
= __sca3000_hw_ring_state_set(indio_dev
, 0);
1361 /* Disable the 50% full interrupt */
1362 mutex_lock(&st
->lock
);
1364 ret
= sca3000_read_data_short(st
, SCA3000_REG_INT_MASK_ADDR
, 1);
1367 ret
= sca3000_write_reg(st
,
1368 SCA3000_REG_INT_MASK_ADDR
,
1369 st
->rx
[0] & ~SCA3000_REG_INT_MASK_RING_HALF
);
1371 mutex_unlock(&st
->lock
);
1375 static const struct iio_buffer_setup_ops sca3000_ring_setup_ops
= {
1376 .preenable
= &sca3000_hw_ring_preenable
,
1377 .postdisable
= &sca3000_hw_ring_postdisable
,
1381 * sca3000_clean_setup() - get the device into a predictable state
1382 * @st: Device instance specific private data structure
1384 * Devices use flash memory to store many of the register values
1385 * and hence can come up in somewhat unpredictable states.
1386 * Hence reset everything on driver load.
1388 static int sca3000_clean_setup(struct sca3000_state
*st
)
1392 mutex_lock(&st
->lock
);
1393 /* Ensure all interrupts have been acknowledged */
1394 ret
= sca3000_read_data_short(st
, SCA3000_REG_INT_STATUS_ADDR
, 1);
1398 /* Turn off all motion detection channels */
1399 ret
= sca3000_read_ctrl_reg(st
, SCA3000_REG_CTRL_SEL_MD_CTRL
);
1402 ret
= sca3000_write_ctrl_reg(st
, SCA3000_REG_CTRL_SEL_MD_CTRL
,
1403 ret
& SCA3000_MD_CTRL_PROT_MASK
);
1407 /* Disable ring buffer */
1408 ret
= sca3000_read_ctrl_reg(st
, SCA3000_REG_CTRL_SEL_OUT_CTRL
);
1411 ret
= sca3000_write_ctrl_reg(st
, SCA3000_REG_CTRL_SEL_OUT_CTRL
,
1412 (ret
& SCA3000_REG_OUT_CTRL_PROT_MASK
)
1413 | SCA3000_REG_OUT_CTRL_BUF_X_EN
1414 | SCA3000_REG_OUT_CTRL_BUF_Y_EN
1415 | SCA3000_REG_OUT_CTRL_BUF_Z_EN
1416 | SCA3000_REG_OUT_CTRL_BUF_DIV_4
);
1419 /* Enable interrupts, relevant to mode and set up as active low */
1420 ret
= sca3000_read_data_short(st
, SCA3000_REG_INT_MASK_ADDR
, 1);
1423 ret
= sca3000_write_reg(st
,
1424 SCA3000_REG_INT_MASK_ADDR
,
1425 (ret
& SCA3000_REG_INT_MASK_PROT_MASK
)
1426 | SCA3000_REG_INT_MASK_ACTIVE_LOW
);
1430 * Select normal measurement mode, free fall off, ring off
1431 * Ring in 12 bit mode - it is fine to overwrite reserved bits 3,5
1432 * as that occurs in one of the example on the datasheet
1434 ret
= sca3000_read_data_short(st
, SCA3000_REG_MODE_ADDR
, 1);
1437 ret
= sca3000_write_reg(st
, SCA3000_REG_MODE_ADDR
,
1438 (st
->rx
[0] & SCA3000_MODE_PROT_MASK
));
1441 mutex_unlock(&st
->lock
);
1445 static const struct iio_info sca3000_info
= {
1446 .attrs
= &sca3000_attribute_group
,
1447 .read_raw
= &sca3000_read_raw
,
1448 .write_raw
= &sca3000_write_raw
,
1449 .read_event_value
= &sca3000_read_event_value
,
1450 .write_event_value
= &sca3000_write_event_value
,
1451 .read_event_config
= &sca3000_read_event_config
,
1452 .write_event_config
= &sca3000_write_event_config
,
1455 static int sca3000_probe(struct spi_device
*spi
)
1458 struct sca3000_state
*st
;
1459 struct iio_dev
*indio_dev
;
1461 indio_dev
= devm_iio_device_alloc(&spi
->dev
, sizeof(*st
));
1465 st
= iio_priv(indio_dev
);
1466 spi_set_drvdata(spi
, indio_dev
);
1468 mutex_init(&st
->lock
);
1469 st
->info
= &sca3000_spi_chip_info_tbl
[spi_get_device_id(spi
)
1472 indio_dev
->dev
.parent
= &spi
->dev
;
1473 indio_dev
->name
= spi_get_device_id(spi
)->name
;
1474 indio_dev
->info
= &sca3000_info
;
1475 if (st
->info
->temp_output
) {
1476 indio_dev
->channels
= sca3000_channels_with_temp
;
1477 indio_dev
->num_channels
=
1478 ARRAY_SIZE(sca3000_channels_with_temp
);
1480 indio_dev
->channels
= sca3000_channels
;
1481 indio_dev
->num_channels
= ARRAY_SIZE(sca3000_channels
);
1483 indio_dev
->modes
= INDIO_DIRECT_MODE
;
1485 ret
= sca3000_configure_ring(indio_dev
);
1490 ret
= request_threaded_irq(spi
->irq
,
1492 &sca3000_event_handler
,
1493 IRQF_TRIGGER_FALLING
| IRQF_ONESHOT
,
1499 indio_dev
->setup_ops
= &sca3000_ring_setup_ops
;
1500 ret
= sca3000_clean_setup(st
);
1502 goto error_free_irq
;
1504 ret
= sca3000_print_rev(indio_dev
);
1506 goto error_free_irq
;
1508 return iio_device_register(indio_dev
);
1512 free_irq(spi
->irq
, indio_dev
);
1517 static int sca3000_stop_all_interrupts(struct sca3000_state
*st
)
1521 mutex_lock(&st
->lock
);
1522 ret
= sca3000_read_data_short(st
, SCA3000_REG_INT_MASK_ADDR
, 1);
1525 ret
= sca3000_write_reg(st
, SCA3000_REG_INT_MASK_ADDR
,
1527 ~(SCA3000_REG_INT_MASK_RING_THREE_QUARTER
|
1528 SCA3000_REG_INT_MASK_RING_HALF
|
1529 SCA3000_REG_INT_MASK_ALL_INTS
)));
1531 mutex_unlock(&st
->lock
);
1535 static int sca3000_remove(struct spi_device
*spi
)
1537 struct iio_dev
*indio_dev
= spi_get_drvdata(spi
);
1538 struct sca3000_state
*st
= iio_priv(indio_dev
);
1540 iio_device_unregister(indio_dev
);
1542 /* Must ensure no interrupts can be generated after this! */
1543 sca3000_stop_all_interrupts(st
);
1545 free_irq(spi
->irq
, indio_dev
);
1550 static const struct spi_device_id sca3000_id
[] = {
1551 {"sca3000_d01", d01
},
1552 {"sca3000_e02", e02
},
1553 {"sca3000_e04", e04
},
1554 {"sca3000_e05", e05
},
1557 MODULE_DEVICE_TABLE(spi
, sca3000_id
);
1559 static struct spi_driver sca3000_driver
= {
1563 .probe
= sca3000_probe
,
1564 .remove
= sca3000_remove
,
1565 .id_table
= sca3000_id
,
1567 module_spi_driver(sca3000_driver
);
1569 MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>");
1570 MODULE_DESCRIPTION("VTI SCA3000 Series Accelerometers SPI driver");
1571 MODULE_LICENSE("GPL v2");