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dt-bindings: mtd: ingenic: Use standard ecc-engine property
[linux/fpc-iii.git] / drivers / net / ethernet / smsc / smc91c92_cs.c
bloba55f430f6a7bcc9b9bba0fca597f821530d0c8e9
1 /*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26 ======================================================================*/
27
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/slab.h>
33 #include <linux/string.h>
34 #include <linux/timer.h>
35 #include <linux/interrupt.h>
36 #include <linux/delay.h>
37 #include <linux/crc32.h>
38 #include <linux/netdevice.h>
39 #include <linux/etherdevice.h>
40 #include <linux/skbuff.h>
41 #include <linux/if_arp.h>
42 #include <linux/ioport.h>
43 #include <linux/ethtool.h>
44 #include <linux/mii.h>
45 #include <linux/jiffies.h>
46 #include <linux/firmware.h>
47
48 #include <pcmcia/cistpl.h>
49 #include <pcmcia/cisreg.h>
50 #include <pcmcia/ciscode.h>
51 #include <pcmcia/ds.h>
52 #include <pcmcia/ss.h>
53
54 #include <asm/io.h>
55 #include <linux/uaccess.h>
56
57 /*====================================================================*/
58
59 static const char *if_names[] = { "auto", "10baseT", "10base2"};
60
61 /* Firmware name */
62 #define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
63
64 /* Module parameters */
65
66 MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
67 MODULE_LICENSE("GPL");
68 MODULE_FIRMWARE(FIRMWARE_NAME);
69
70 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
71
72 /*
73 Transceiver/media type.
74 0 = auto
75 1 = 10baseT (and autoselect if #define AUTOSELECT),
76 2 = AUI/10base2,
77 */
78 INT_MODULE_PARM(if_port, 0);
79
80
81 #define DRV_NAME "smc91c92_cs"
82 #define DRV_VERSION "1.123"
83
84 /*====================================================================*/
85
86 /* Operational parameter that usually are not changed. */
87
88 /* Time in jiffies before concluding Tx hung */
89 #define TX_TIMEOUT ((400*HZ)/1000)
90
91 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
92 #define INTR_WORK 4
93
94 /* Times to check the check the chip before concluding that it doesn't
95 currently have room for another Tx packet. */
96 #define MEMORY_WAIT_TIME 8
97
98 struct smc_private {
99 struct pcmcia_device *p_dev;
100 spinlock_t lock;
101 u_short manfid;
102 u_short cardid;
103
104 struct sk_buff *saved_skb;
105 int packets_waiting;
106 void __iomem *base;
107 u_short cfg;
108 struct timer_list media;
109 int watchdog, tx_err;
110 u_short media_status;
111 u_short fast_poll;
112 u_short link_status;
113 struct mii_if_info mii_if;
114 int duplex;
115 int rx_ovrn;
116 unsigned long last_rx;
117 };
118
119 /* Special definitions for Megahertz multifunction cards */
120 #define MEGAHERTZ_ISR 0x0380
121
122 /* Special function registers for Motorola Mariner */
123 #define MOT_LAN 0x0000
124 #define MOT_UART 0x0020
125 #define MOT_EEPROM 0x20
126
127 #define MOT_NORMAL \
128 (COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
129
130 /* Special function registers for Ositech cards */
131 #define OSITECH_AUI_CTL 0x0c
132 #define OSITECH_PWRDOWN 0x0d
133 #define OSITECH_RESET 0x0e
134 #define OSITECH_ISR 0x0f
135 #define OSITECH_AUI_PWR 0x0c
136 #define OSITECH_RESET_ISR 0x0e
137
138 #define OSI_AUI_PWR 0x40
139 #define OSI_LAN_PWRDOWN 0x02
140 #define OSI_MODEM_PWRDOWN 0x01
141 #define OSI_LAN_RESET 0x02
142 #define OSI_MODEM_RESET 0x01
143
144 /* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
145 #define BANK_SELECT 14 /* Window select register. */
146 #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
147
148 /* Bank 0 registers. */
149 #define TCR 0 /* transmit control register */
150 #define TCR_CLEAR 0 /* do NOTHING */
151 #define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
152 #define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
153 #define TCR_MONCSN 0x0400 /* Monitor Carrier. */
154 #define TCR_FDUPLX 0x0800 /* Full duplex mode. */
155 #define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
156
157 #define EPH 2 /* Ethernet Protocol Handler report. */
158 #define EPH_TX_SUC 0x0001
159 #define EPH_SNGLCOL 0x0002
160 #define EPH_MULCOL 0x0004
161 #define EPH_LTX_MULT 0x0008
162 #define EPH_16COL 0x0010
163 #define EPH_SQET 0x0020
164 #define EPH_LTX_BRD 0x0040
165 #define EPH_TX_DEFR 0x0080
166 #define EPH_LAT_COL 0x0200
167 #define EPH_LOST_CAR 0x0400
168 #define EPH_EXC_DEF 0x0800
169 #define EPH_CTR_ROL 0x1000
170 #define EPH_RX_OVRN 0x2000
171 #define EPH_LINK_OK 0x4000
172 #define EPH_TX_UNRN 0x8000
173 #define MEMINFO 8 /* Memory Information Register */
174 #define MEMCFG 10 /* Memory Configuration Register */
175
176 /* Bank 1 registers. */
177 #define CONFIG 0
178 #define CFG_MII_SELECT 0x8000 /* 91C100 only */
179 #define CFG_NO_WAIT 0x1000
180 #define CFG_FULL_STEP 0x0400
181 #define CFG_SET_SQLCH 0x0200
182 #define CFG_AUI_SELECT 0x0100
183 #define CFG_16BIT 0x0080
184 #define CFG_DIS_LINK 0x0040
185 #define CFG_STATIC 0x0030
186 #define CFG_IRQ_SEL_1 0x0004
187 #define CFG_IRQ_SEL_0 0x0002
188 #define BASE_ADDR 2
189 #define ADDR0 4
190 #define GENERAL 10
191 #define CONTROL 12
192 #define CTL_STORE 0x0001
193 #define CTL_RELOAD 0x0002
194 #define CTL_EE_SELECT 0x0004
195 #define CTL_TE_ENABLE 0x0020
196 #define CTL_CR_ENABLE 0x0040
197 #define CTL_LE_ENABLE 0x0080
198 #define CTL_AUTO_RELEASE 0x0800
199 #define CTL_POWERDOWN 0x2000
200
201 /* Bank 2 registers. */
202 #define MMU_CMD 0
203 #define MC_ALLOC 0x20 /* or with number of 256 byte packets */
204 #define MC_RESET 0x40
205 #define MC_RELEASE 0x80 /* remove and release the current rx packet */
206 #define MC_FREEPKT 0xA0 /* Release packet in PNR register */
207 #define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
208 #define PNR_ARR 2
209 #define FIFO_PORTS 4
210 #define FP_RXEMPTY 0x8000
211 #define POINTER 6
212 #define PTR_AUTO_INC 0x0040
213 #define PTR_READ 0x2000
214 #define PTR_AUTOINC 0x4000
215 #define PTR_RCV 0x8000
216 #define DATA_1 8
217 #define INTERRUPT 12
218 #define IM_RCV_INT 0x1
219 #define IM_TX_INT 0x2
220 #define IM_TX_EMPTY_INT 0x4
221 #define IM_ALLOC_INT 0x8
222 #define IM_RX_OVRN_INT 0x10
223 #define IM_EPH_INT 0x20
224
225 #define RCR 4
226 enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
227 RxEnable = 0x0100, RxStripCRC = 0x0200};
228 #define RCR_SOFTRESET 0x8000 /* resets the chip */
229 #define RCR_STRIP_CRC 0x200 /* strips CRC */
230 #define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
231 #define RCR_ALMUL 0x4 /* receive all multicast packets */
232 #define RCR_PROMISC 0x2 /* enable promiscuous mode */
233
234 /* the normal settings for the RCR register : */
235 #define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
236 #define RCR_CLEAR 0x0 /* set it to a base state */
237 #define COUNTER 6
238
239 /* BANK 3 -- not the same values as in smc9194! */
240 #define MULTICAST0 0
241 #define MULTICAST2 2
242 #define MULTICAST4 4
243 #define MULTICAST6 6
244 #define MGMT 8
245 #define REVISION 0x0a
246
247 /* Transmit status bits. */
248 #define TS_SUCCESS 0x0001
249 #define TS_16COL 0x0010
250 #define TS_LATCOL 0x0200
251 #define TS_LOSTCAR 0x0400
252
253 /* Receive status bits. */
254 #define RS_ALGNERR 0x8000
255 #define RS_BADCRC 0x2000
256 #define RS_ODDFRAME 0x1000
257 #define RS_TOOLONG 0x0800
258 #define RS_TOOSHORT 0x0400
259 #define RS_MULTICAST 0x0001
260 #define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
261
262 #define set_bits(v, p) outw(inw(p)|(v), (p))
263 #define mask_bits(v, p) outw(inw(p)&(v), (p))
264
265 /*====================================================================*/
266
267 static void smc91c92_detach(struct pcmcia_device *p_dev);
268 static int smc91c92_config(struct pcmcia_device *link);
269 static void smc91c92_release(struct pcmcia_device *link);
270
271 static int smc_open(struct net_device *dev);
272 static int smc_close(struct net_device *dev);
273 static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
274 static void smc_tx_timeout(struct net_device *dev);
275 static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
276 struct net_device *dev);
277 static irqreturn_t smc_interrupt(int irq, void *dev_id);
278 static void smc_rx(struct net_device *dev);
279 static void set_rx_mode(struct net_device *dev);
280 static int s9k_config(struct net_device *dev, struct ifmap *map);
281 static void smc_set_xcvr(struct net_device *dev, int if_port);
282 static void smc_reset(struct net_device *dev);
283 static void media_check(struct timer_list *t);
284 static void mdio_sync(unsigned int addr);
285 static int mdio_read(struct net_device *dev, int phy_id, int loc);
286 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
287 static int smc_link_ok(struct net_device *dev);
288 static const struct ethtool_ops ethtool_ops;
289
290 static const struct net_device_ops smc_netdev_ops = {
291 .ndo_open = smc_open,
292 .ndo_stop = smc_close,
293 .ndo_start_xmit = smc_start_xmit,
294 .ndo_tx_timeout = smc_tx_timeout,
295 .ndo_set_config = s9k_config,
296 .ndo_set_rx_mode = set_rx_mode,
297 .ndo_do_ioctl = smc_ioctl,
298 .ndo_set_mac_address = eth_mac_addr,
299 .ndo_validate_addr = eth_validate_addr,
300 };
301
302 static int smc91c92_probe(struct pcmcia_device *link)
303 {
304 struct smc_private *smc;
305 struct net_device *dev;
306
307 dev_dbg(&link->dev, "smc91c92_attach()\n");
308
309 /* Create new ethernet device */
310 dev = alloc_etherdev(sizeof(struct smc_private));
311 if (!dev)
312 return -ENOMEM;
313 smc = netdev_priv(dev);
314 smc->p_dev = link;
315 link->priv = dev;
316
317 spin_lock_init(&smc->lock);
318
319 /* The SMC91c92-specific entries in the device structure. */
320 dev->netdev_ops = &smc_netdev_ops;
321 dev->ethtool_ops = &ethtool_ops;
322 dev->watchdog_timeo = TX_TIMEOUT;
323
324 smc->mii_if.dev = dev;
325 smc->mii_if.mdio_read = mdio_read;
326 smc->mii_if.mdio_write = mdio_write;
327 smc->mii_if.phy_id_mask = 0x1f;
328 smc->mii_if.reg_num_mask = 0x1f;
329
330 return smc91c92_config(link);
331 } /* smc91c92_attach */
332
333 static void smc91c92_detach(struct pcmcia_device *link)
334 {
335 struct net_device *dev = link->priv;
336
337 dev_dbg(&link->dev, "smc91c92_detach\n");
338
339 unregister_netdev(dev);
340
341 smc91c92_release(link);
342
343 free_netdev(dev);
344 } /* smc91c92_detach */
345
346 /*====================================================================*/
347
348 static int cvt_ascii_address(struct net_device *dev, char *s)
349 {
350 int i, j, da, c;
351
352 if (strlen(s) != 12)
353 return -1;
354 for (i = 0; i < 6; i++) {
355 da = 0;
356 for (j = 0; j < 2; j++) {
357 c = *s++;
358 da <<= 4;
359 da += ((c >= '0') && (c <= '9')) ?
360 (c - '0') : ((c & 0x0f) + 9);
361 }
362 dev->dev_addr[i] = da;
363 }
364 return 0;
365 }
366
367 /*====================================================================
368
369 Configuration stuff for Megahertz cards
370
371 mhz_3288_power() is used to power up a 3288's ethernet chip.
372 mhz_mfc_config() handles socket setup for multifunction (1144
373 and 3288) cards. mhz_setup() gets a card's hardware ethernet
374 address.
375
376 ======================================================================*/
377
378 static int mhz_3288_power(struct pcmcia_device *link)
379 {
380 struct net_device *dev = link->priv;
381 struct smc_private *smc = netdev_priv(dev);
382 u_char tmp;
383
384 /* Read the ISR twice... */
385 readb(smc->base+MEGAHERTZ_ISR);
386 udelay(5);
387 readb(smc->base+MEGAHERTZ_ISR);
388
389 /* Pause 200ms... */
390 mdelay(200);
391
392 /* Now read and write the COR... */
393 tmp = readb(smc->base + link->config_base + CISREG_COR);
394 udelay(5);
395 writeb(tmp, smc->base + link->config_base + CISREG_COR);
396
397 return 0;
398 }
399
400 static int mhz_mfc_config_check(struct pcmcia_device *p_dev, void *priv_data)
401 {
402 int k;
403 p_dev->io_lines = 16;
404 p_dev->resource[1]->start = p_dev->resource[0]->start;
405 p_dev->resource[1]->end = 8;
406 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
407 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
408 p_dev->resource[0]->end = 16;
409 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
410 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
411 for (k = 0; k < 0x400; k += 0x10) {
412 if (k & 0x80)
413 continue;
414 p_dev->resource[0]->start = k ^ 0x300;
415 if (!pcmcia_request_io(p_dev))
416 return 0;
417 }
418 return -ENODEV;
419 }
420
421 static int mhz_mfc_config(struct pcmcia_device *link)
422 {
423 struct net_device *dev = link->priv;
424 struct smc_private *smc = netdev_priv(dev);
425 unsigned int offset;
426 int i;
427
428 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ |
429 CONF_AUTO_SET_IO;
430
431 /* The Megahertz combo cards have modem-like CIS entries, so
432 we have to explicitly try a bunch of port combinations. */
433 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
434 return -ENODEV;
435
436 dev->base_addr = link->resource[0]->start;
437
438 /* Allocate a memory window, for accessing the ISR */
439 link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
440 link->resource[2]->start = link->resource[2]->end = 0;
441 i = pcmcia_request_window(link, link->resource[2], 0);
442 if (i != 0)
443 return -ENODEV;
444
445 smc->base = ioremap(link->resource[2]->start,
446 resource_size(link->resource[2]));
447 offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0;
448 i = pcmcia_map_mem_page(link, link->resource[2], offset);
449 if ((i == 0) &&
450 (smc->manfid == MANFID_MEGAHERTZ) &&
451 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
452 mhz_3288_power(link);
453
454 return 0;
455 }
456
457 static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
458 tuple_t *tuple,
459 void *priv)
460 {
461 struct net_device *dev = priv;
462 cisparse_t parse;
463 u8 *buf;
464
465 if (pcmcia_parse_tuple(tuple, &parse))
466 return -EINVAL;
467
468 buf = parse.version_1.str + parse.version_1.ofs[3];
469
470 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
471 return 0;
472
473 return -EINVAL;
474 };
475
476 static int mhz_setup(struct pcmcia_device *link)
477 {
478 struct net_device *dev = link->priv;
479 size_t len;
480 u8 *buf;
481 int rc;
482
483 /* Read the station address from the CIS. It is stored as the last
484 (fourth) string in the Version 1 Version/ID tuple. */
485 if ((link->prod_id[3]) &&
486 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
487 return 0;
488
489 /* Workarounds for broken cards start here. */
490 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
491 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
492 return 0;
493
494 /* Another possibility: for the EM3288, in a special tuple */
495 rc = -1;
496 len = pcmcia_get_tuple(link, 0x81, &buf);
497 if (buf && len >= 13) {
498 buf[12] = '\0';
499 if (cvt_ascii_address(dev, buf) == 0)
500 rc = 0;
501 }
502 kfree(buf);
503
504 return rc;
505 };
506
507 /*======================================================================
508
509 Configuration stuff for the Motorola Mariner
510
511 mot_config() writes directly to the Mariner configuration
512 registers because the CIS is just bogus.
513
514 ======================================================================*/
515
516 static void mot_config(struct pcmcia_device *link)
517 {
518 struct net_device *dev = link->priv;
519 struct smc_private *smc = netdev_priv(dev);
520 unsigned int ioaddr = dev->base_addr;
521 unsigned int iouart = link->resource[1]->start;
522
523 /* Set UART base address and force map with COR bit 1 */
524 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
525 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
526 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
527
528 /* Set SMC base address and force map with COR bit 1 */
529 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
530 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
531 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
532
533 /* Wait for things to settle down */
534 mdelay(100);
535 }
536
537 static int mot_setup(struct pcmcia_device *link)
538 {
539 struct net_device *dev = link->priv;
540 unsigned int ioaddr = dev->base_addr;
541 int i, wait, loop;
542 u_int addr;
543
544 /* Read Ethernet address from Serial EEPROM */
545
546 for (i = 0; i < 3; i++) {
547 SMC_SELECT_BANK(2);
548 outw(MOT_EEPROM + i, ioaddr + POINTER);
549 SMC_SELECT_BANK(1);
550 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
551
552 for (loop = wait = 0; loop < 200; loop++) {
553 udelay(10);
554 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
555 if (wait == 0) break;
556 }
557
558 if (wait)
559 return -1;
560
561 addr = inw(ioaddr + GENERAL);
562 dev->dev_addr[2*i] = addr & 0xff;
563 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
564 }
565
566 return 0;
567 }
568
569 /*====================================================================*/
570
571 static int smc_configcheck(struct pcmcia_device *p_dev, void *priv_data)
572 {
573 p_dev->resource[0]->end = 16;
574 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
575 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
576
577 return pcmcia_request_io(p_dev);
578 }
579
580 static int smc_config(struct pcmcia_device *link)
581 {
582 struct net_device *dev = link->priv;
583 int i;
584
585 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
586
587 i = pcmcia_loop_config(link, smc_configcheck, NULL);
588 if (!i)
589 dev->base_addr = link->resource[0]->start;
590
591 return i;
592 }
593
594
595 static int smc_setup(struct pcmcia_device *link)
596 {
597 struct net_device *dev = link->priv;
598
599 /* Check for a LAN function extension tuple */
600 if (!pcmcia_get_mac_from_cis(link, dev))
601 return 0;
602
603 /* Try the third string in the Version 1 Version/ID tuple. */
604 if (link->prod_id[2]) {
605 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
606 return 0;
607 }
608 return -1;
609 }
610
611 /*====================================================================*/
612
613 static int osi_config(struct pcmcia_device *link)
614 {
615 struct net_device *dev = link->priv;
616 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
617 int i, j;
618
619 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ;
620 link->resource[0]->end = 64;
621 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
622 link->resource[1]->end = 8;
623
624 /* Enable Hard Decode, LAN, Modem */
625 link->io_lines = 16;
626 link->config_index = 0x23;
627
628 for (i = j = 0; j < 4; j++) {
629 link->resource[1]->start = com[j];
630 i = pcmcia_request_io(link);
631 if (i == 0)
632 break;
633 }
634 if (i != 0) {
635 /* Fallback: turn off hard decode */
636 link->config_index = 0x03;
637 link->resource[1]->end = 0;
638 i = pcmcia_request_io(link);
639 }
640 dev->base_addr = link->resource[0]->start + 0x10;
641 return i;
642 }
643
644 static int osi_load_firmware(struct pcmcia_device *link)
645 {
646 const struct firmware *fw;
647 int i, err;
648
649 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
650 if (err) {
651 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
652 return err;
653 }
654
655 /* Download the Seven of Diamonds firmware */
656 for (i = 0; i < fw->size; i++) {
657 outb(fw->data[i], link->resource[0]->start + 2);
658 udelay(50);
659 }
660 release_firmware(fw);
661 return err;
662 }
663
664 static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
665 tuple_t *tuple,
666 void *priv)
667 {
668 struct net_device *dev = priv;
669 int i;
670
671 if (tuple->TupleDataLen < 8)
672 return -EINVAL;
673 if (tuple->TupleData[0] != 0x04)
674 return -EINVAL;
675 for (i = 0; i < 6; i++)
676 dev->dev_addr[i] = tuple->TupleData[i+2];
677 return 0;
678 };
679
680
681 static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
682 {
683 struct net_device *dev = link->priv;
684 int rc;
685
686 /* Read the station address from tuple 0x90, subtuple 0x04 */
687 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
688 return -1;
689
690 if (((manfid == MANFID_OSITECH) &&
691 (cardid == PRODID_OSITECH_SEVEN)) ||
692 ((manfid == MANFID_PSION) &&
693 (cardid == PRODID_PSION_NET100))) {
694 rc = osi_load_firmware(link);
695 if (rc)
696 return rc;
697 } else if (manfid == MANFID_OSITECH) {
698 /* Make sure both functions are powered up */
699 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
700 /* Now, turn on the interrupt for both card functions */
701 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
702 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
703 inw(link->resource[0]->start + OSITECH_AUI_PWR),
704 inw(link->resource[0]->start + OSITECH_RESET_ISR));
705 }
706 return 0;
707 }
708
709 static int smc91c92_suspend(struct pcmcia_device *link)
710 {
711 struct net_device *dev = link->priv;
712
713 if (link->open)
714 netif_device_detach(dev);
715
716 return 0;
717 }
718
719 static int smc91c92_resume(struct pcmcia_device *link)
720 {
721 struct net_device *dev = link->priv;
722 struct smc_private *smc = netdev_priv(dev);
723 int i;
724
725 if ((smc->manfid == MANFID_MEGAHERTZ) &&
726 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
727 mhz_3288_power(link);
728 if (smc->manfid == MANFID_MOTOROLA)
729 mot_config(link);
730 if ((smc->manfid == MANFID_OSITECH) &&
731 (smc->cardid != PRODID_OSITECH_SEVEN)) {
732 /* Power up the card and enable interrupts */
733 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
734 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
735 }
736 if (((smc->manfid == MANFID_OSITECH) &&
737 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
738 ((smc->manfid == MANFID_PSION) &&
739 (smc->cardid == PRODID_PSION_NET100))) {
740 i = osi_load_firmware(link);
741 if (i) {
742 netdev_err(dev, "Failed to load firmware\n");
743 return i;
744 }
745 }
746 if (link->open) {
747 smc_reset(dev);
748 netif_device_attach(dev);
749 }
750
751 return 0;
752 }
753
754
755 /*======================================================================
756
757 This verifies that the chip is some SMC91cXX variant, and returns
758 the revision code if successful. Otherwise, it returns -ENODEV.
759
760 ======================================================================*/
761
762 static int check_sig(struct pcmcia_device *link)
763 {
764 struct net_device *dev = link->priv;
765 unsigned int ioaddr = dev->base_addr;
766 int width;
767 u_short s;
768
769 SMC_SELECT_BANK(1);
770 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
771 /* Try powering up the chip */
772 outw(0, ioaddr + CONTROL);
773 mdelay(55);
774 }
775
776 /* Try setting bus width */
777 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
778 s = inb(ioaddr + CONFIG);
779 if (width)
780 s |= CFG_16BIT;
781 else
782 s &= ~CFG_16BIT;
783 outb(s, ioaddr + CONFIG);
784
785 /* Check Base Address Register to make sure bus width is OK */
786 s = inw(ioaddr + BASE_ADDR);
787 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
788 ((s >> 8) != (s & 0xff))) {
789 SMC_SELECT_BANK(3);
790 s = inw(ioaddr + REVISION);
791 return s & 0xff;
792 }
793
794 if (width) {
795 netdev_info(dev, "using 8-bit IO window\n");
796
797 smc91c92_suspend(link);
798 pcmcia_fixup_iowidth(link);
799 smc91c92_resume(link);
800 return check_sig(link);
801 }
802 return -ENODEV;
803 }
804
805 static int smc91c92_config(struct pcmcia_device *link)
806 {
807 struct net_device *dev = link->priv;
808 struct smc_private *smc = netdev_priv(dev);
809 char *name;
810 int i, rev, j = 0;
811 unsigned int ioaddr;
812 u_long mir;
813
814 dev_dbg(&link->dev, "smc91c92_config\n");
815
816 smc->manfid = link->manf_id;
817 smc->cardid = link->card_id;
818
819 if ((smc->manfid == MANFID_OSITECH) &&
820 (smc->cardid != PRODID_OSITECH_SEVEN)) {
821 i = osi_config(link);
822 } else if ((smc->manfid == MANFID_MOTOROLA) ||
823 ((smc->manfid == MANFID_MEGAHERTZ) &&
824 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
825 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
826 i = mhz_mfc_config(link);
827 } else {
828 i = smc_config(link);
829 }
830 if (i)
831 goto config_failed;
832
833 i = pcmcia_request_irq(link, smc_interrupt);
834 if (i)
835 goto config_failed;
836 i = pcmcia_enable_device(link);
837 if (i)
838 goto config_failed;
839
840 if (smc->manfid == MANFID_MOTOROLA)
841 mot_config(link);
842
843 dev->irq = link->irq;
844
845 if ((if_port >= 0) && (if_port <= 2))
846 dev->if_port = if_port;
847 else
848 dev_notice(&link->dev, "invalid if_port requested\n");
849
850 switch (smc->manfid) {
851 case MANFID_OSITECH:
852 case MANFID_PSION:
853 i = osi_setup(link, smc->manfid, smc->cardid); break;
854 case MANFID_SMC:
855 case MANFID_NEW_MEDIA:
856 i = smc_setup(link); break;
857 case 0x128: /* For broken Megahertz cards */
858 case MANFID_MEGAHERTZ:
859 i = mhz_setup(link); break;
860 case MANFID_MOTOROLA:
861 default: /* get the hw address from EEPROM */
862 i = mot_setup(link); break;
863 }
864
865 if (i != 0) {
866 dev_notice(&link->dev, "Unable to find hardware address.\n");
867 goto config_failed;
868 }
869
870 smc->duplex = 0;
871 smc->rx_ovrn = 0;
872
873 rev = check_sig(link);
874 name = "???";
875 if (rev > 0)
876 switch (rev >> 4) {
877 case 3: name = "92"; break;
878 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
879 case 5: name = "95"; break;
880 case 7: name = "100"; break;
881 case 8: name = "100-FD"; break;
882 case 9: name = "110"; break;
883 }
884
885 ioaddr = dev->base_addr;
886 if (rev > 0) {
887 u_long mcr;
888 SMC_SELECT_BANK(0);
889 mir = inw(ioaddr + MEMINFO) & 0xff;
890 if (mir == 0xff) mir++;
891 /* Get scale factor for memory size */
892 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
893 mir *= 128 * (1<<((mcr >> 9) & 7));
894 SMC_SELECT_BANK(1);
895 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
896 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
897 if (smc->manfid == MANFID_OSITECH)
898 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
899 if ((rev >> 4) >= 7)
900 smc->cfg |= CFG_MII_SELECT;
901 } else
902 mir = 0;
903
904 if (smc->cfg & CFG_MII_SELECT) {
905 SMC_SELECT_BANK(3);
906
907 for (i = 0; i < 32; i++) {
908 j = mdio_read(dev, i, 1);
909 if ((j != 0) && (j != 0xffff)) break;
910 }
911 smc->mii_if.phy_id = (i < 32) ? i : -1;
912
913 SMC_SELECT_BANK(0);
914 }
915
916 SET_NETDEV_DEV(dev, &link->dev);
917
918 if (register_netdev(dev) != 0) {
919 dev_err(&link->dev, "register_netdev() failed\n");
920 goto config_undo;
921 }
922
923 netdev_info(dev, "smc91c%s rev %d: io %#3lx, irq %d, hw_addr %pM\n",
924 name, (rev & 0x0f), dev->base_addr, dev->irq, dev->dev_addr);
925
926 if (rev > 0) {
927 if (mir & 0x3ff)
928 netdev_info(dev, " %lu byte", mir);
929 else
930 netdev_info(dev, " %lu kb", mir>>10);
931 pr_cont(" buffer, %s xcvr\n",
932 (smc->cfg & CFG_MII_SELECT) ? "MII" : if_names[dev->if_port]);
933 }
934
935 if (smc->cfg & CFG_MII_SELECT) {
936 if (smc->mii_if.phy_id != -1) {
937 netdev_dbg(dev, " MII transceiver at index %d, status %x\n",
938 smc->mii_if.phy_id, j);
939 } else {
940 netdev_notice(dev, " No MII transceivers found!\n");
941 }
942 }
943 return 0;
944
945 config_undo:
946 unregister_netdev(dev);
947 config_failed:
948 smc91c92_release(link);
949 free_netdev(dev);
950 return -ENODEV;
951 } /* smc91c92_config */
952
953 static void smc91c92_release(struct pcmcia_device *link)
954 {
955 dev_dbg(&link->dev, "smc91c92_release\n");
956 if (link->resource[2]->end) {
957 struct net_device *dev = link->priv;
958 struct smc_private *smc = netdev_priv(dev);
959 iounmap(smc->base);
960 }
961 pcmcia_disable_device(link);
962 }
963
964 /*======================================================================
965
966 MII interface support for SMC91cXX based cards
967 ======================================================================*/
968
969 #define MDIO_SHIFT_CLK 0x04
970 #define MDIO_DATA_OUT 0x01
971 #define MDIO_DIR_WRITE 0x08
972 #define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
973 #define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
974 #define MDIO_DATA_READ 0x02
975
976 static void mdio_sync(unsigned int addr)
977 {
978 int bits;
979 for (bits = 0; bits < 32; bits++) {
980 outb(MDIO_DATA_WRITE1, addr);
981 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
982 }
983 }
984
985 static int mdio_read(struct net_device *dev, int phy_id, int loc)
986 {
987 unsigned int addr = dev->base_addr + MGMT;
988 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
989 int i, retval = 0;
990
991 mdio_sync(addr);
992 for (i = 13; i >= 0; i--) {
993 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
994 outb(dat, addr);
995 outb(dat | MDIO_SHIFT_CLK, addr);
996 }
997 for (i = 19; i > 0; i--) {
998 outb(0, addr);
999 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1000 outb(MDIO_SHIFT_CLK, addr);
1001 }
1002 return (retval>>1) & 0xffff;
1003 }
1004
1005 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1006 {
1007 unsigned int addr = dev->base_addr + MGMT;
1008 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1009 int i;
1010
1011 mdio_sync(addr);
1012 for (i = 31; i >= 0; i--) {
1013 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1014 outb(dat, addr);
1015 outb(dat | MDIO_SHIFT_CLK, addr);
1016 }
1017 for (i = 1; i >= 0; i--) {
1018 outb(0, addr);
1019 outb(MDIO_SHIFT_CLK, addr);
1020 }
1021 }
1022
1023 /*======================================================================
1024
1025 The driver core code, most of which should be common with a
1026 non-PCMCIA implementation.
1027
1028 ======================================================================*/
1029
1030 #ifdef PCMCIA_DEBUG
1031 static void smc_dump(struct net_device *dev)
1032 {
1033 unsigned int ioaddr = dev->base_addr;
1034 u_short i, w, save;
1035 save = inw(ioaddr + BANK_SELECT);
1036 for (w = 0; w < 4; w++) {
1037 SMC_SELECT_BANK(w);
1038 netdev_dbg(dev, "bank %d: ", w);
1039 for (i = 0; i < 14; i += 2)
1040 pr_cont(" %04x", inw(ioaddr + i));
1041 pr_cont("\n");
1042 }
1043 outw(save, ioaddr + BANK_SELECT);
1044 }
1045 #endif
1046
1047 static int smc_open(struct net_device *dev)
1048 {
1049 struct smc_private *smc = netdev_priv(dev);
1050 struct pcmcia_device *link = smc->p_dev;
1051
1052 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1053 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
1054 #ifdef PCMCIA_DEBUG
1055 smc_dump(dev);
1056 #endif
1057
1058 /* Check that the PCMCIA card is still here. */
1059 if (!pcmcia_dev_present(link))
1060 return -ENODEV;
1061 /* Physical device present signature. */
1062 if (check_sig(link) < 0) {
1063 netdev_info(dev, "Yikes! Bad chip signature!\n");
1064 return -ENODEV;
1065 }
1066 link->open++;
1067
1068 netif_start_queue(dev);
1069 smc->saved_skb = NULL;
1070 smc->packets_waiting = 0;
1071
1072 smc_reset(dev);
1073 timer_setup(&smc->media, media_check, 0);
1074 mod_timer(&smc->media, jiffies + HZ);
1075
1076 return 0;
1077 } /* smc_open */
1078
1079 /*====================================================================*/
1080
1081 static int smc_close(struct net_device *dev)
1082 {
1083 struct smc_private *smc = netdev_priv(dev);
1084 struct pcmcia_device *link = smc->p_dev;
1085 unsigned int ioaddr = dev->base_addr;
1086
1087 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1088 dev->name, inw(ioaddr + BANK_SELECT));
1089
1090 netif_stop_queue(dev);
1091
1092 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1093 Don't bother to check for chip present. */
1094 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1095 outw(0, ioaddr + INTERRUPT);
1096 SMC_SELECT_BANK(0);
1097 mask_bits(0xff00, ioaddr + RCR);
1098 mask_bits(0xff00, ioaddr + TCR);
1099
1100 /* Put the chip into power-down mode. */
1101 SMC_SELECT_BANK(1);
1102 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1103
1104 link->open--;
1105 del_timer_sync(&smc->media);
1106
1107 return 0;
1108 } /* smc_close */
1109
1110 /*======================================================================
1111
1112 Transfer a packet to the hardware and trigger the packet send.
1113 This may be called at either from either the Tx queue code
1114 or the interrupt handler.
1115
1116 ======================================================================*/
1117
1118 static void smc_hardware_send_packet(struct net_device * dev)
1119 {
1120 struct smc_private *smc = netdev_priv(dev);
1121 struct sk_buff *skb = smc->saved_skb;
1122 unsigned int ioaddr = dev->base_addr;
1123 u_char packet_no;
1124
1125 if (!skb) {
1126 netdev_err(dev, "In XMIT with no packet to send\n");
1127 return;
1128 }
1129
1130 /* There should be a packet slot waiting. */
1131 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1132 if (packet_no & 0x80) {
1133 /* If not, there is a hardware problem! Likely an ejected card. */
1134 netdev_warn(dev, "hardware Tx buffer allocation failed, status %#2.2x\n",
1135 packet_no);
1136 dev_kfree_skb_irq(skb);
1137 smc->saved_skb = NULL;
1138 netif_start_queue(dev);
1139 return;
1140 }
1141
1142 dev->stats.tx_bytes += skb->len;
1143 /* The card should use the just-allocated buffer. */
1144 outw(packet_no, ioaddr + PNR_ARR);
1145 /* point to the beginning of the packet */
1146 outw(PTR_AUTOINC , ioaddr + POINTER);
1147
1148 /* Send the packet length (+6 for status, length and ctl byte)
1149 and the status word (set to zeros). */
1150 {
1151 u_char *buf = skb->data;
1152 u_int length = skb->len; /* The chip will pad to ethernet min. */
1153
1154 netdev_dbg(dev, "Trying to xmit packet of length %d\n", length);
1155
1156 /* send the packet length: +6 for status word, length, and ctl */
1157 outw(0, ioaddr + DATA_1);
1158 outw(length + 6, ioaddr + DATA_1);
1159 outsw(ioaddr + DATA_1, buf, length >> 1);
1160
1161 /* The odd last byte, if there is one, goes in the control word. */
1162 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1163 }
1164
1165 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1166 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1167 (inw(ioaddr + INTERRUPT) & 0xff00),
1168 ioaddr + INTERRUPT);
1169
1170 /* The chip does the rest of the work. */
1171 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1172
1173 smc->saved_skb = NULL;
1174 dev_kfree_skb_irq(skb);
1175 netif_trans_update(dev);
1176 netif_start_queue(dev);
1177 }
1178
1179 /*====================================================================*/
1180
1181 static void smc_tx_timeout(struct net_device *dev)
1182 {
1183 struct smc_private *smc = netdev_priv(dev);
1184 unsigned int ioaddr = dev->base_addr;
1185
1186 netdev_notice(dev, "transmit timed out, Tx_status %2.2x status %4.4x.\n",
1187 inw(ioaddr)&0xff, inw(ioaddr + 2));
1188 dev->stats.tx_errors++;
1189 smc_reset(dev);
1190 netif_trans_update(dev); /* prevent tx timeout */
1191 smc->saved_skb = NULL;
1192 netif_wake_queue(dev);
1193 }
1194
1195 static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1196 struct net_device *dev)
1197 {
1198 struct smc_private *smc = netdev_priv(dev);
1199 unsigned int ioaddr = dev->base_addr;
1200 u_short num_pages;
1201 short time_out, ir;
1202 unsigned long flags;
1203
1204 netif_stop_queue(dev);
1205
1206 netdev_dbg(dev, "smc_start_xmit(length = %d) called, status %04x\n",
1207 skb->len, inw(ioaddr + 2));
1208
1209 if (smc->saved_skb) {
1210 /* THIS SHOULD NEVER HAPPEN. */
1211 dev->stats.tx_aborted_errors++;
1212 netdev_dbg(dev, "Internal error -- sent packet while busy\n");
1213 return NETDEV_TX_BUSY;
1214 }
1215 smc->saved_skb = skb;
1216
1217 num_pages = skb->len >> 8;
1218
1219 if (num_pages > 7) {
1220 netdev_err(dev, "Far too big packet error: %d pages\n", num_pages);
1221 dev_kfree_skb (skb);
1222 smc->saved_skb = NULL;
1223 dev->stats.tx_dropped++;
1224 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1225 }
1226 /* A packet is now waiting. */
1227 smc->packets_waiting++;
1228
1229 spin_lock_irqsave(&smc->lock, flags);
1230 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1231
1232 /* need MC_RESET to keep the memory consistent. errata? */
1233 if (smc->rx_ovrn) {
1234 outw(MC_RESET, ioaddr + MMU_CMD);
1235 smc->rx_ovrn = 0;
1236 }
1237
1238 /* Allocate the memory; send the packet now if we win. */
1239 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1240 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1241 ir = inw(ioaddr+INTERRUPT);
1242 if (ir & IM_ALLOC_INT) {
1243 /* Acknowledge the interrupt, send the packet. */
1244 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1245 smc_hardware_send_packet(dev); /* Send the packet now.. */
1246 spin_unlock_irqrestore(&smc->lock, flags);
1247 return NETDEV_TX_OK;
1248 }
1249 }
1250
1251 /* Otherwise defer until the Tx-space-allocated interrupt. */
1252 netdev_dbg(dev, "memory allocation deferred.\n");
1253 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
1254 spin_unlock_irqrestore(&smc->lock, flags);
1255
1256 return NETDEV_TX_OK;
1257 }
1258
1259 /*======================================================================
1260
1261 Handle a Tx anomalous event. Entered while in Window 2.
1262
1263 ======================================================================*/
1264
1265 static void smc_tx_err(struct net_device * dev)
1266 {
1267 struct smc_private *smc = netdev_priv(dev);
1268 unsigned int ioaddr = dev->base_addr;
1269 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1270 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1271 int tx_status;
1272
1273 /* select this as the packet to read from */
1274 outw(packet_no, ioaddr + PNR_ARR);
1275
1276 /* read the first word from this packet */
1277 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1278
1279 tx_status = inw(ioaddr + DATA_1);
1280
1281 dev->stats.tx_errors++;
1282 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1283 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1284 if (tx_status & TS_16COL) {
1285 dev->stats.tx_aborted_errors++;
1286 smc->tx_err++;
1287 }
1288
1289 if (tx_status & TS_SUCCESS) {
1290 netdev_notice(dev, "Successful packet caused error interrupt?\n");
1291 }
1292 /* re-enable transmit */
1293 SMC_SELECT_BANK(0);
1294 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1295 SMC_SELECT_BANK(2);
1296
1297 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1298
1299 /* one less packet waiting for me */
1300 smc->packets_waiting--;
1301
1302 outw(saved_packet, ioaddr + PNR_ARR);
1303 }
1304
1305 /*====================================================================*/
1306
1307 static void smc_eph_irq(struct net_device *dev)
1308 {
1309 struct smc_private *smc = netdev_priv(dev);
1310 unsigned int ioaddr = dev->base_addr;
1311 u_short card_stats, ephs;
1312
1313 SMC_SELECT_BANK(0);
1314 ephs = inw(ioaddr + EPH);
1315 netdev_dbg(dev, "Ethernet protocol handler interrupt, status %4.4x.\n",
1316 ephs);
1317 /* Could be a counter roll-over warning: update stats. */
1318 card_stats = inw(ioaddr + COUNTER);
1319 /* single collisions */
1320 dev->stats.collisions += card_stats & 0xF;
1321 card_stats >>= 4;
1322 /* multiple collisions */
1323 dev->stats.collisions += card_stats & 0xF;
1324 #if 0 /* These are for when linux supports these statistics */
1325 card_stats >>= 4; /* deferred */
1326 card_stats >>= 4; /* excess deferred */
1327 #endif
1328 /* If we had a transmit error we must re-enable the transmitter. */
1329 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1330
1331 /* Clear a link error interrupt. */
1332 SMC_SELECT_BANK(1);
1333 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1334 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1335 ioaddr + CONTROL);
1336 SMC_SELECT_BANK(2);
1337 }
1338
1339 /*====================================================================*/
1340
1341 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1342 {
1343 struct net_device *dev = dev_id;
1344 struct smc_private *smc = netdev_priv(dev);
1345 unsigned int ioaddr;
1346 u_short saved_bank, saved_pointer, mask, status;
1347 unsigned int handled = 1;
1348 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1349
1350 if (!netif_device_present(dev))
1351 return IRQ_NONE;
1352
1353 ioaddr = dev->base_addr;
1354
1355 netdev_dbg(dev, "SMC91c92 interrupt %d at %#x.\n",
1356 irq, ioaddr);
1357
1358 spin_lock(&smc->lock);
1359 smc->watchdog = 0;
1360 saved_bank = inw(ioaddr + BANK_SELECT);
1361 if ((saved_bank & 0xff00) != 0x3300) {
1362 /* The device does not exist -- the card could be off-line, or
1363 maybe it has been ejected. */
1364 netdev_dbg(dev, "SMC91c92 interrupt %d for non-existent/ejected device.\n",
1365 irq);
1366 handled = 0;
1367 goto irq_done;
1368 }
1369
1370 SMC_SELECT_BANK(2);
1371 saved_pointer = inw(ioaddr + POINTER);
1372 mask = inw(ioaddr + INTERRUPT) >> 8;
1373 /* clear all interrupts */
1374 outw(0, ioaddr + INTERRUPT);
1375
1376 do { /* read the status flag, and mask it */
1377 status = inw(ioaddr + INTERRUPT) & 0xff;
1378 netdev_dbg(dev, "Status is %#2.2x (mask %#2.2x).\n",
1379 status, mask);
1380 if ((status & mask) == 0) {
1381 if (bogus_cnt == INTR_WORK)
1382 handled = 0;
1383 break;
1384 }
1385 if (status & IM_RCV_INT) {
1386 /* Got a packet(s). */
1387 smc_rx(dev);
1388 }
1389 if (status & IM_TX_INT) {
1390 smc_tx_err(dev);
1391 outw(IM_TX_INT, ioaddr + INTERRUPT);
1392 }
1393 status &= mask;
1394 if (status & IM_TX_EMPTY_INT) {
1395 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1396 mask &= ~IM_TX_EMPTY_INT;
1397 dev->stats.tx_packets += smc->packets_waiting;
1398 smc->packets_waiting = 0;
1399 }
1400 if (status & IM_ALLOC_INT) {
1401 /* Clear this interrupt so it doesn't happen again */
1402 mask &= ~IM_ALLOC_INT;
1403
1404 smc_hardware_send_packet(dev);
1405
1406 /* enable xmit interrupts based on this */
1407 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1408
1409 /* and let the card send more packets to me */
1410 netif_wake_queue(dev);
1411 }
1412 if (status & IM_RX_OVRN_INT) {
1413 dev->stats.rx_errors++;
1414 dev->stats.rx_fifo_errors++;
1415 if (smc->duplex)
1416 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1417 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1418 }
1419 if (status & IM_EPH_INT)
1420 smc_eph_irq(dev);
1421 } while (--bogus_cnt);
1422
1423 netdev_dbg(dev, " Restoring saved registers mask %2.2x bank %4.4x pointer %4.4x.\n",
1424 mask, saved_bank, saved_pointer);
1425
1426 /* restore state register */
1427 outw((mask<<8), ioaddr + INTERRUPT);
1428 outw(saved_pointer, ioaddr + POINTER);
1429 SMC_SELECT_BANK(saved_bank);
1430
1431 netdev_dbg(dev, "Exiting interrupt IRQ%d.\n", irq);
1432
1433 irq_done:
1434
1435 if ((smc->manfid == MANFID_OSITECH) &&
1436 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1437 /* Retrigger interrupt if needed */
1438 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1439 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1440 }
1441 if (smc->manfid == MANFID_MOTOROLA) {
1442 u_char cor;
1443 cor = readb(smc->base + MOT_UART + CISREG_COR);
1444 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1445 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1446 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1447 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1448 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1449 }
1450
1451 if ((smc->base != NULL) && /* Megahertz MFC's */
1452 (smc->manfid == MANFID_MEGAHERTZ) &&
1453 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1454
1455 u_char tmp;
1456 tmp = readb(smc->base+MEGAHERTZ_ISR);
1457 tmp = readb(smc->base+MEGAHERTZ_ISR);
1458
1459 /* Retrigger interrupt if needed */
1460 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1461 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1462 }
1463
1464 spin_unlock(&smc->lock);
1465 return IRQ_RETVAL(handled);
1466 }
1467
1468 /*====================================================================*/
1469
1470 static void smc_rx(struct net_device *dev)
1471 {
1472 unsigned int ioaddr = dev->base_addr;
1473 int rx_status;
1474 int packet_length; /* Caution: not frame length, rather words
1475 to transfer from the chip. */
1476
1477 /* Assertion: we are in Window 2. */
1478
1479 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1480 netdev_err(dev, "smc_rx() with nothing on Rx FIFO\n");
1481 return;
1482 }
1483
1484 /* Reset the read pointer, and read the status and packet length. */
1485 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1486 rx_status = inw(ioaddr + DATA_1);
1487 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1488
1489 netdev_dbg(dev, "Receive status %4.4x length %d.\n",
1490 rx_status, packet_length);
1491
1492 if (!(rx_status & RS_ERRORS)) {
1493 /* do stuff to make a new packet */
1494 struct sk_buff *skb;
1495 struct smc_private *smc = netdev_priv(dev);
1496
1497 /* Note: packet_length adds 5 or 6 extra bytes here! */
1498 skb = netdev_alloc_skb(dev, packet_length+2);
1499
1500 if (skb == NULL) {
1501 netdev_dbg(dev, "Low memory, packet dropped.\n");
1502 dev->stats.rx_dropped++;
1503 outw(MC_RELEASE, ioaddr + MMU_CMD);
1504 return;
1505 }
1506
1507 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1508 skb_reserve(skb, 2);
1509 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1510 (packet_length+1)>>1);
1511 skb->protocol = eth_type_trans(skb, dev);
1512
1513 netif_rx(skb);
1514 smc->last_rx = jiffies;
1515 dev->stats.rx_packets++;
1516 dev->stats.rx_bytes += packet_length;
1517 if (rx_status & RS_MULTICAST)
1518 dev->stats.multicast++;
1519 } else {
1520 /* error ... */
1521 dev->stats.rx_errors++;
1522
1523 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1524 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
1525 dev->stats.rx_length_errors++;
1526 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1527 }
1528 /* Let the MMU free the memory of this packet. */
1529 outw(MC_RELEASE, ioaddr + MMU_CMD);
1530 }
1531
1532 /*======================================================================
1533
1534 Set the receive mode.
1535
1536 This routine is used by both the protocol level to notify us of
1537 promiscuous/multicast mode changes, and by the open/reset code to
1538 initialize the Rx registers. We always set the multicast list and
1539 leave the receiver running.
1540
1541 ======================================================================*/
1542
1543 static void set_rx_mode(struct net_device *dev)
1544 {
1545 unsigned int ioaddr = dev->base_addr;
1546 struct smc_private *smc = netdev_priv(dev);
1547 unsigned char multicast_table[8];
1548 unsigned long flags;
1549 u_short rx_cfg_setting;
1550 int i;
1551
1552 memset(multicast_table, 0, sizeof(multicast_table));
1553
1554 if (dev->flags & IFF_PROMISC) {
1555 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1556 } else if (dev->flags & IFF_ALLMULTI)
1557 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1558 else {
1559 if (!netdev_mc_empty(dev)) {
1560 struct netdev_hw_addr *ha;
1561
1562 netdev_for_each_mc_addr(ha, dev) {
1563 u_int position = ether_crc(6, ha->addr);
1564 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1565 }
1566 }
1567 rx_cfg_setting = RxStripCRC | RxEnable;
1568 }
1569
1570 /* Load MC table and Rx setting into the chip without interrupts. */
1571 spin_lock_irqsave(&smc->lock, flags);
1572 SMC_SELECT_BANK(3);
1573 for (i = 0; i < 8; i++)
1574 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1575 SMC_SELECT_BANK(0);
1576 outw(rx_cfg_setting, ioaddr + RCR);
1577 SMC_SELECT_BANK(2);
1578 spin_unlock_irqrestore(&smc->lock, flags);
1579 }
1580
1581 /*======================================================================
1582
1583 Senses when a card's config changes. Here, it's coax or TP.
1584
1585 ======================================================================*/
1586
1587 static int s9k_config(struct net_device *dev, struct ifmap *map)
1588 {
1589 struct smc_private *smc = netdev_priv(dev);
1590 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1591 if (smc->cfg & CFG_MII_SELECT)
1592 return -EOPNOTSUPP;
1593 else if (map->port > 2)
1594 return -EINVAL;
1595 dev->if_port = map->port;
1596 netdev_info(dev, "switched to %s port\n", if_names[dev->if_port]);
1597 smc_reset(dev);
1598 }
1599 return 0;
1600 }
1601
1602 /*======================================================================
1603
1604 Reset the chip, reloading every register that might be corrupted.
1605
1606 ======================================================================*/
1607
1608 /*
1609 Set transceiver type, perhaps to something other than what the user
1610 specified in dev->if_port.
1611 */
1612 static void smc_set_xcvr(struct net_device *dev, int if_port)
1613 {
1614 struct smc_private *smc = netdev_priv(dev);
1615 unsigned int ioaddr = dev->base_addr;
1616 u_short saved_bank;
1617
1618 saved_bank = inw(ioaddr + BANK_SELECT);
1619 SMC_SELECT_BANK(1);
1620 if (if_port == 2) {
1621 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1622 if ((smc->manfid == MANFID_OSITECH) &&
1623 (smc->cardid != PRODID_OSITECH_SEVEN))
1624 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1625 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1626 } else {
1627 outw(smc->cfg, ioaddr + CONFIG);
1628 if ((smc->manfid == MANFID_OSITECH) &&
1629 (smc->cardid != PRODID_OSITECH_SEVEN))
1630 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1631 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1632 }
1633 SMC_SELECT_BANK(saved_bank);
1634 }
1635
1636 static void smc_reset(struct net_device *dev)
1637 {
1638 unsigned int ioaddr = dev->base_addr;
1639 struct smc_private *smc = netdev_priv(dev);
1640 int i;
1641
1642 netdev_dbg(dev, "smc91c92 reset called.\n");
1643
1644 /* The first interaction must be a write to bring the chip out
1645 of sleep mode. */
1646 SMC_SELECT_BANK(0);
1647 /* Reset the chip. */
1648 outw(RCR_SOFTRESET, ioaddr + RCR);
1649 udelay(10);
1650
1651 /* Clear the transmit and receive configuration registers. */
1652 outw(RCR_CLEAR, ioaddr + RCR);
1653 outw(TCR_CLEAR, ioaddr + TCR);
1654
1655 /* Set the Window 1 control, configuration and station addr registers.
1656 No point in writing the I/O base register ;-> */
1657 SMC_SELECT_BANK(1);
1658 /* Automatically release successfully transmitted packets,
1659 Accept link errors, counter and Tx error interrupts. */
1660 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1661 ioaddr + CONTROL);
1662 smc_set_xcvr(dev, dev->if_port);
1663 if ((smc->manfid == MANFID_OSITECH) &&
1664 (smc->cardid != PRODID_OSITECH_SEVEN))
1665 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1666 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1667 ioaddr - 0x10 + OSITECH_AUI_PWR);
1668
1669 /* Fill in the physical address. The databook is wrong about the order! */
1670 for (i = 0; i < 6; i += 2)
1671 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1672 ioaddr + ADDR0 + i);
1673
1674 /* Reset the MMU */
1675 SMC_SELECT_BANK(2);
1676 outw(MC_RESET, ioaddr + MMU_CMD);
1677 outw(0, ioaddr + INTERRUPT);
1678
1679 /* Re-enable the chip. */
1680 SMC_SELECT_BANK(0);
1681 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1682 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1683 set_rx_mode(dev);
1684
1685 if (smc->cfg & CFG_MII_SELECT) {
1686 SMC_SELECT_BANK(3);
1687
1688 /* Reset MII */
1689 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1690
1691 /* Advertise 100F, 100H, 10F, 10H */
1692 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1693
1694 /* Restart MII autonegotiation */
1695 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1696 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1697 }
1698
1699 /* Enable interrupts. */
1700 SMC_SELECT_BANK(2);
1701 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1702 ioaddr + INTERRUPT);
1703 }
1704
1705 /*======================================================================
1706
1707 Media selection timer routine
1708
1709 ======================================================================*/
1710
1711 static void media_check(struct timer_list *t)
1712 {
1713 struct smc_private *smc = from_timer(smc, t, media);
1714 struct net_device *dev = smc->mii_if.dev;
1715 unsigned int ioaddr = dev->base_addr;
1716 u_short i, media, saved_bank;
1717 u_short link;
1718 unsigned long flags;
1719
1720 spin_lock_irqsave(&smc->lock, flags);
1721
1722 saved_bank = inw(ioaddr + BANK_SELECT);
1723
1724 if (!netif_device_present(dev))
1725 goto reschedule;
1726
1727 SMC_SELECT_BANK(2);
1728
1729 /* need MC_RESET to keep the memory consistent. errata? */
1730 if (smc->rx_ovrn) {
1731 outw(MC_RESET, ioaddr + MMU_CMD);
1732 smc->rx_ovrn = 0;
1733 }
1734 i = inw(ioaddr + INTERRUPT);
1735 SMC_SELECT_BANK(0);
1736 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1737 SMC_SELECT_BANK(1);
1738 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1739
1740 SMC_SELECT_BANK(saved_bank);
1741 spin_unlock_irqrestore(&smc->lock, flags);
1742
1743 /* Check for pending interrupt with watchdog flag set: with
1744 this, we can limp along even if the interrupt is blocked */
1745 if (smc->watchdog++ && ((i>>8) & i)) {
1746 if (!smc->fast_poll)
1747 netdev_info(dev, "interrupt(s) dropped!\n");
1748 local_irq_save(flags);
1749 smc_interrupt(dev->irq, dev);
1750 local_irq_restore(flags);
1751 smc->fast_poll = HZ;
1752 }
1753 if (smc->fast_poll) {
1754 smc->fast_poll--;
1755 smc->media.expires = jiffies + HZ/100;
1756 add_timer(&smc->media);
1757 return;
1758 }
1759
1760 spin_lock_irqsave(&smc->lock, flags);
1761
1762 saved_bank = inw(ioaddr + BANK_SELECT);
1763
1764 if (smc->cfg & CFG_MII_SELECT) {
1765 if (smc->mii_if.phy_id < 0)
1766 goto reschedule;
1767
1768 SMC_SELECT_BANK(3);
1769 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1770 if (!link || (link == 0xffff)) {
1771 netdev_info(dev, "MII is missing!\n");
1772 smc->mii_if.phy_id = -1;
1773 goto reschedule;
1774 }
1775
1776 link &= 0x0004;
1777 if (link != smc->link_status) {
1778 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1779 netdev_info(dev, "%s link beat\n", link ? "found" : "lost");
1780 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1781 ? TCR_FDUPLX : 0);
1782 if (link) {
1783 netdev_info(dev, "autonegotiation complete: "
1784 "%dbaseT-%cD selected\n",
1785 (p & 0x0180) ? 100 : 10, smc->duplex ? 'F' : 'H');
1786 }
1787 SMC_SELECT_BANK(0);
1788 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1789 smc->link_status = link;
1790 }
1791 goto reschedule;
1792 }
1793
1794 /* Ignore collisions unless we've had no rx's recently */
1795 if (time_after(jiffies, smc->last_rx + HZ)) {
1796 if (smc->tx_err || (smc->media_status & EPH_16COL))
1797 media |= EPH_16COL;
1798 }
1799 smc->tx_err = 0;
1800
1801 if (media != smc->media_status) {
1802 if ((media & smc->media_status & 1) &&
1803 ((smc->media_status ^ media) & EPH_LINK_OK))
1804 netdev_info(dev, "%s link beat\n",
1805 smc->media_status & EPH_LINK_OK ? "lost" : "found");
1806 else if ((media & smc->media_status & 2) &&
1807 ((smc->media_status ^ media) & EPH_16COL))
1808 netdev_info(dev, "coax cable %s\n",
1809 media & EPH_16COL ? "problem" : "ok");
1810 if (dev->if_port == 0) {
1811 if (media & 1) {
1812 if (media & EPH_LINK_OK)
1813 netdev_info(dev, "flipped to 10baseT\n");
1814 else
1815 smc_set_xcvr(dev, 2);
1816 } else {
1817 if (media & EPH_16COL)
1818 smc_set_xcvr(dev, 1);
1819 else
1820 netdev_info(dev, "flipped to 10base2\n");
1821 }
1822 }
1823 smc->media_status = media;
1824 }
1825
1826 reschedule:
1827 smc->media.expires = jiffies + HZ;
1828 add_timer(&smc->media);
1829 SMC_SELECT_BANK(saved_bank);
1830 spin_unlock_irqrestore(&smc->lock, flags);
1831 }
1832
1833 static int smc_link_ok(struct net_device *dev)
1834 {
1835 unsigned int ioaddr = dev->base_addr;
1836 struct smc_private *smc = netdev_priv(dev);
1837
1838 if (smc->cfg & CFG_MII_SELECT) {
1839 return mii_link_ok(&smc->mii_if);
1840 } else {
1841 SMC_SELECT_BANK(0);
1842 return inw(ioaddr + EPH) & EPH_LINK_OK;
1843 }
1844 }
1845
1846 static void smc_netdev_get_ecmd(struct net_device *dev,
1847 struct ethtool_link_ksettings *ecmd)
1848 {
1849 u16 tmp;
1850 unsigned int ioaddr = dev->base_addr;
1851 u32 supported;
1852
1853 supported = (SUPPORTED_TP | SUPPORTED_AUI |
1854 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1855
1856 SMC_SELECT_BANK(1);
1857 tmp = inw(ioaddr + CONFIG);
1858 ecmd->base.port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1859 ecmd->base.speed = SPEED_10;
1860 ecmd->base.phy_address = ioaddr + MGMT;
1861
1862 SMC_SELECT_BANK(0);
1863 tmp = inw(ioaddr + TCR);
1864 ecmd->base.duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1865
1866 ethtool_convert_legacy_u32_to_link_mode(ecmd->link_modes.supported,
1867 supported);
1868 }
1869
1870 static int smc_netdev_set_ecmd(struct net_device *dev,
1871 const struct ethtool_link_ksettings *ecmd)
1872 {
1873 u16 tmp;
1874 unsigned int ioaddr = dev->base_addr;
1875
1876 if (ecmd->base.speed != SPEED_10)
1877 return -EINVAL;
1878 if (ecmd->base.duplex != DUPLEX_HALF &&
1879 ecmd->base.duplex != DUPLEX_FULL)
1880 return -EINVAL;
1881 if (ecmd->base.port != PORT_TP && ecmd->base.port != PORT_AUI)
1882 return -EINVAL;
1883
1884 if (ecmd->base.port == PORT_AUI)
1885 smc_set_xcvr(dev, 1);
1886 else
1887 smc_set_xcvr(dev, 0);
1888
1889 SMC_SELECT_BANK(0);
1890 tmp = inw(ioaddr + TCR);
1891 if (ecmd->base.duplex == DUPLEX_FULL)
1892 tmp |= TCR_FDUPLX;
1893 else
1894 tmp &= ~TCR_FDUPLX;
1895 outw(tmp, ioaddr + TCR);
1896
1897 return 0;
1898 }
1899
1900 static int check_if_running(struct net_device *dev)
1901 {
1902 if (!netif_running(dev))
1903 return -EINVAL;
1904 return 0;
1905 }
1906
1907 static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1908 {
1909 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1910 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1911 }
1912
1913 static int smc_get_link_ksettings(struct net_device *dev,
1914 struct ethtool_link_ksettings *ecmd)
1915 {
1916 struct smc_private *smc = netdev_priv(dev);
1917 unsigned int ioaddr = dev->base_addr;
1918 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1919 unsigned long flags;
1920
1921 spin_lock_irqsave(&smc->lock, flags);
1922 SMC_SELECT_BANK(3);
1923 if (smc->cfg & CFG_MII_SELECT)
1924 mii_ethtool_get_link_ksettings(&smc->mii_if, ecmd);
1925 else
1926 smc_netdev_get_ecmd(dev, ecmd);
1927 SMC_SELECT_BANK(saved_bank);
1928 spin_unlock_irqrestore(&smc->lock, flags);
1929 return 0;
1930 }
1931
1932 static int smc_set_link_ksettings(struct net_device *dev,
1933 const struct ethtool_link_ksettings *ecmd)
1934 {
1935 struct smc_private *smc = netdev_priv(dev);
1936 unsigned int ioaddr = dev->base_addr;
1937 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1938 int ret;
1939 unsigned long flags;
1940
1941 spin_lock_irqsave(&smc->lock, flags);
1942 SMC_SELECT_BANK(3);
1943 if (smc->cfg & CFG_MII_SELECT)
1944 ret = mii_ethtool_set_link_ksettings(&smc->mii_if, ecmd);
1945 else
1946 ret = smc_netdev_set_ecmd(dev, ecmd);
1947 SMC_SELECT_BANK(saved_bank);
1948 spin_unlock_irqrestore(&smc->lock, flags);
1949 return ret;
1950 }
1951
1952 static u32 smc_get_link(struct net_device *dev)
1953 {
1954 struct smc_private *smc = netdev_priv(dev);
1955 unsigned int ioaddr = dev->base_addr;
1956 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1957 u32 ret;
1958 unsigned long flags;
1959
1960 spin_lock_irqsave(&smc->lock, flags);
1961 SMC_SELECT_BANK(3);
1962 ret = smc_link_ok(dev);
1963 SMC_SELECT_BANK(saved_bank);
1964 spin_unlock_irqrestore(&smc->lock, flags);
1965 return ret;
1966 }
1967
1968 static int smc_nway_reset(struct net_device *dev)
1969 {
1970 struct smc_private *smc = netdev_priv(dev);
1971 if (smc->cfg & CFG_MII_SELECT) {
1972 unsigned int ioaddr = dev->base_addr;
1973 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1974 int res;
1975
1976 SMC_SELECT_BANK(3);
1977 res = mii_nway_restart(&smc->mii_if);
1978 SMC_SELECT_BANK(saved_bank);
1979
1980 return res;
1981 } else
1982 return -EOPNOTSUPP;
1983 }
1984
1985 static const struct ethtool_ops ethtool_ops = {
1986 .begin = check_if_running,
1987 .get_drvinfo = smc_get_drvinfo,
1988 .get_link = smc_get_link,
1989 .nway_reset = smc_nway_reset,
1990 .get_link_ksettings = smc_get_link_ksettings,
1991 .set_link_ksettings = smc_set_link_ksettings,
1992 };
1993
1994 static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1995 {
1996 struct smc_private *smc = netdev_priv(dev);
1997 struct mii_ioctl_data *mii = if_mii(rq);
1998 int rc = 0;
1999 u16 saved_bank;
2000 unsigned int ioaddr = dev->base_addr;
2001 unsigned long flags;
2002
2003 if (!netif_running(dev))
2004 return -EINVAL;
2005
2006 spin_lock_irqsave(&smc->lock, flags);
2007 saved_bank = inw(ioaddr + BANK_SELECT);
2008 SMC_SELECT_BANK(3);
2009 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2010 SMC_SELECT_BANK(saved_bank);
2011 spin_unlock_irqrestore(&smc->lock, flags);
2012 return rc;
2013 }
2014
2015 static const struct pcmcia_device_id smc91c92_ids[] = {
2016 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2017 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2018 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2019 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2020 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2021 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2022 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2023 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
2024 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2025 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
2026 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2027 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2028 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2029 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2030 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2031 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2032 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2033 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2034 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
2035 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2036 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
2037 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2038 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2039 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2040 /* These conflict with other cards! */
2041 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2042 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2043 PCMCIA_DEVICE_NULL,
2044 };
2045 MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2046
2047 static struct pcmcia_driver smc91c92_cs_driver = {
2048 .owner = THIS_MODULE,
2049 .name = "smc91c92_cs",
2050 .probe = smc91c92_probe,
2051 .remove = smc91c92_detach,
2052 .id_table = smc91c92_ids,
2053 .suspend = smc91c92_suspend,
2054 .resume = smc91c92_resume,
2055 };
2056 module_pcmcia_driver(smc91c92_cs_driver);
Linux with added FPC-III support