1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe controller EP driver for Freescale Layerscape SoCs
5 * Copyright (C) 2018 NXP Semiconductor.
7 * Author: Xiaowei Bao <xiaowei.bao@nxp.com>
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/of_pci.h>
13 #include <linux/of_platform.h>
14 #include <linux/of_address.h>
15 #include <linux/pci.h>
16 #include <linux/platform_device.h>
17 #include <linux/resource.h>
19 #include "pcie-designware.h"
21 #define PCIE_DBI2_OFFSET 0x1000 /* DBI2 base address*/
27 #define to_ls_pcie_ep(x) dev_get_drvdata((x)->dev)
29 static int ls_pcie_establish_link(struct dw_pcie
*pci
)
34 static const struct dw_pcie_ops ls_pcie_ep_ops
= {
35 .start_link
= ls_pcie_establish_link
,
38 static const struct of_device_id ls_pcie_ep_of_match
[] = {
39 { .compatible
= "fsl,ls-pcie-ep",},
43 static const struct pci_epc_features ls_pcie_epc_features
= {
44 .linkup_notifier
= false,
46 .msix_capable
= false,
49 static const struct pci_epc_features
*
50 ls_pcie_ep_get_features(struct dw_pcie_ep
*ep
)
52 return &ls_pcie_epc_features
;
55 static void ls_pcie_ep_init(struct dw_pcie_ep
*ep
)
57 struct dw_pcie
*pci
= to_dw_pcie_from_ep(ep
);
60 for (bar
= BAR_0
; bar
<= BAR_5
; bar
++)
61 dw_pcie_ep_reset_bar(pci
, bar
);
64 static int ls_pcie_ep_raise_irq(struct dw_pcie_ep
*ep
, u8 func_no
,
65 enum pci_epc_irq_type type
, u16 interrupt_num
)
67 struct dw_pcie
*pci
= to_dw_pcie_from_ep(ep
);
70 case PCI_EPC_IRQ_LEGACY
:
71 return dw_pcie_ep_raise_legacy_irq(ep
, func_no
);
73 return dw_pcie_ep_raise_msi_irq(ep
, func_no
, interrupt_num
);
74 case PCI_EPC_IRQ_MSIX
:
75 return dw_pcie_ep_raise_msix_irq(ep
, func_no
, interrupt_num
);
77 dev_err(pci
->dev
, "UNKNOWN IRQ type\n");
82 static struct dw_pcie_ep_ops pcie_ep_ops
= {
83 .ep_init
= ls_pcie_ep_init
,
84 .raise_irq
= ls_pcie_ep_raise_irq
,
85 .get_features
= ls_pcie_ep_get_features
,
88 static int __init
ls_add_pcie_ep(struct ls_pcie_ep
*pcie
,
89 struct platform_device
*pdev
)
91 struct dw_pcie
*pci
= pcie
->pci
;
92 struct device
*dev
= pci
->dev
;
93 struct dw_pcie_ep
*ep
;
98 ep
->ops
= &pcie_ep_ops
;
100 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "addr_space");
104 ep
->phys_base
= res
->start
;
105 ep
->addr_size
= resource_size(res
);
107 ret
= dw_pcie_ep_init(ep
);
109 dev_err(dev
, "failed to initialize endpoint\n");
116 static int __init
ls_pcie_ep_probe(struct platform_device
*pdev
)
118 struct device
*dev
= &pdev
->dev
;
120 struct ls_pcie_ep
*pcie
;
121 struct resource
*dbi_base
;
124 pcie
= devm_kzalloc(dev
, sizeof(*pcie
), GFP_KERNEL
);
128 pci
= devm_kzalloc(dev
, sizeof(*pci
), GFP_KERNEL
);
132 dbi_base
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "regs");
133 pci
->dbi_base
= devm_pci_remap_cfg_resource(dev
, dbi_base
);
134 if (IS_ERR(pci
->dbi_base
))
135 return PTR_ERR(pci
->dbi_base
);
137 pci
->dbi_base2
= pci
->dbi_base
+ PCIE_DBI2_OFFSET
;
139 pci
->ops
= &ls_pcie_ep_ops
;
142 platform_set_drvdata(pdev
, pcie
);
144 ret
= ls_add_pcie_ep(pcie
, pdev
);
149 static struct platform_driver ls_pcie_ep_driver
= {
151 .name
= "layerscape-pcie-ep",
152 .of_match_table
= ls_pcie_ep_of_match
,
153 .suppress_bind_attrs
= true,
156 builtin_platform_driver_probe(ls_pcie_ep_driver
, ls_pcie_ep_probe
);