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dt-bindings: mtd: ingenic: Use standard ecc-engine property
[linux/fpc-iii.git] / drivers / pci / pci-sysfs.c
blob25794c27c7a4b960b5ed2e0293638d69d4ac9969
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/pci.h>
19 #include <linux/stat.h>
20 #include <linux/export.h>
21 #include <linux/topology.h>
22 #include <linux/mm.h>
23 #include <linux/fs.h>
24 #include <linux/capability.h>
25 #include <linux/security.h>
26 #include <linux/slab.h>
27 #include <linux/vgaarb.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/of.h>
30 #include "pci.h"
31
32 static int sysfs_initialized; /* = 0 */
33
34 /* show configuration fields */
35 #define pci_config_attr(field, format_string) \
36 static ssize_t \
37 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
38 { \
39 struct pci_dev *pdev; \
40 \
41 pdev = to_pci_dev(dev); \
42 return sprintf(buf, format_string, pdev->field); \
43 } \
44 static DEVICE_ATTR_RO(field)
45
46 pci_config_attr(vendor, "0x%04x\n");
47 pci_config_attr(device, "0x%04x\n");
48 pci_config_attr(subsystem_vendor, "0x%04x\n");
49 pci_config_attr(subsystem_device, "0x%04x\n");
50 pci_config_attr(revision, "0x%02x\n");
51 pci_config_attr(class, "0x%06x\n");
52 pci_config_attr(irq, "%u\n");
53
54 static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57 {
58 struct pci_dev *pdev = to_pci_dev(dev);
59 return sprintf(buf, "%u\n", pdev->broken_parity_status);
60 }
61
62 static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65 {
66 struct pci_dev *pdev = to_pci_dev(dev);
67 unsigned long val;
68
69 if (kstrtoul(buf, 0, &val) < 0)
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
75 }
76 static DEVICE_ATTR_RW(broken_parity_status);
77
78 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
79 struct device_attribute *attr, char *buf)
80 {
81 const struct cpumask *mask;
82
83 #ifdef CONFIG_NUMA
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
86 #else
87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
88 #endif
89 return cpumap_print_to_pagebuf(list, buf, mask);
90 }
91
92 static ssize_t local_cpus_show(struct device *dev,
93 struct device_attribute *attr, char *buf)
94 {
95 return pci_dev_show_local_cpu(dev, false, attr, buf);
96 }
97 static DEVICE_ATTR_RO(local_cpus);
98
99 static ssize_t local_cpulist_show(struct device *dev,
100 struct device_attribute *attr, char *buf)
101 {
102 return pci_dev_show_local_cpu(dev, true, attr, buf);
103 }
104 static DEVICE_ATTR_RO(local_cpulist);
105
106 /*
107 * PCI Bus Class Devices
108 */
109 static ssize_t cpuaffinity_show(struct device *dev,
110 struct device_attribute *attr, char *buf)
111 {
112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
113
114 return cpumap_print_to_pagebuf(false, buf, cpumask);
115 }
116 static DEVICE_ATTR_RO(cpuaffinity);
117
118 static ssize_t cpulistaffinity_show(struct device *dev,
119 struct device_attribute *attr, char *buf)
120 {
121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
122
123 return cpumap_print_to_pagebuf(true, buf, cpumask);
124 }
125 static DEVICE_ATTR_RO(cpulistaffinity);
126
127 /* show resources */
128 static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
129 char *buf)
130 {
131 struct pci_dev *pci_dev = to_pci_dev(dev);
132 char *str = buf;
133 int i;
134 int max;
135 resource_size_t start, end;
136
137 if (pci_dev->subordinate)
138 max = DEVICE_COUNT_RESOURCE;
139 else
140 max = PCI_BRIDGE_RESOURCES;
141
142 for (i = 0; i < max; i++) {
143 struct resource *res = &pci_dev->resource[i];
144 pci_resource_to_user(pci_dev, i, res, &start, &end);
145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
146 (unsigned long long)start,
147 (unsigned long long)end,
148 (unsigned long long)res->flags);
149 }
150 return (str - buf);
151 }
152 static DEVICE_ATTR_RO(resource);
153
154 static ssize_t max_link_speed_show(struct device *dev,
155 struct device_attribute *attr, char *buf)
156 {
157 struct pci_dev *pdev = to_pci_dev(dev);
158
159 return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
160 }
161 static DEVICE_ATTR_RO(max_link_speed);
162
163 static ssize_t max_link_width_show(struct device *dev,
164 struct device_attribute *attr, char *buf)
165 {
166 struct pci_dev *pdev = to_pci_dev(dev);
167
168 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
169 }
170 static DEVICE_ATTR_RO(max_link_width);
171
172 static ssize_t current_link_speed_show(struct device *dev,
173 struct device_attribute *attr, char *buf)
174 {
175 struct pci_dev *pci_dev = to_pci_dev(dev);
176 u16 linkstat;
177 int err;
178 const char *speed;
179
180 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
181 if (err)
182 return -EINVAL;
183
184 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
185 case PCI_EXP_LNKSTA_CLS_16_0GB:
186 speed = "16 GT/s";
187 break;
188 case PCI_EXP_LNKSTA_CLS_8_0GB:
189 speed = "8 GT/s";
190 break;
191 case PCI_EXP_LNKSTA_CLS_5_0GB:
192 speed = "5 GT/s";
193 break;
194 case PCI_EXP_LNKSTA_CLS_2_5GB:
195 speed = "2.5 GT/s";
196 break;
197 default:
198 speed = "Unknown speed";
199 }
200
201 return sprintf(buf, "%s\n", speed);
202 }
203 static DEVICE_ATTR_RO(current_link_speed);
204
205 static ssize_t current_link_width_show(struct device *dev,
206 struct device_attribute *attr, char *buf)
207 {
208 struct pci_dev *pci_dev = to_pci_dev(dev);
209 u16 linkstat;
210 int err;
211
212 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
213 if (err)
214 return -EINVAL;
215
216 return sprintf(buf, "%u\n",
217 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
218 }
219 static DEVICE_ATTR_RO(current_link_width);
220
221 static ssize_t secondary_bus_number_show(struct device *dev,
222 struct device_attribute *attr,
223 char *buf)
224 {
225 struct pci_dev *pci_dev = to_pci_dev(dev);
226 u8 sec_bus;
227 int err;
228
229 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
230 if (err)
231 return -EINVAL;
232
233 return sprintf(buf, "%u\n", sec_bus);
234 }
235 static DEVICE_ATTR_RO(secondary_bus_number);
236
237 static ssize_t subordinate_bus_number_show(struct device *dev,
238 struct device_attribute *attr,
239 char *buf)
240 {
241 struct pci_dev *pci_dev = to_pci_dev(dev);
242 u8 sub_bus;
243 int err;
244
245 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
246 if (err)
247 return -EINVAL;
248
249 return sprintf(buf, "%u\n", sub_bus);
250 }
251 static DEVICE_ATTR_RO(subordinate_bus_number);
252
253 static ssize_t ari_enabled_show(struct device *dev,
254 struct device_attribute *attr,
255 char *buf)
256 {
257 struct pci_dev *pci_dev = to_pci_dev(dev);
258
259 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
260 }
261 static DEVICE_ATTR_RO(ari_enabled);
262
263 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
264 char *buf)
265 {
266 struct pci_dev *pci_dev = to_pci_dev(dev);
267
268 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
269 pci_dev->vendor, pci_dev->device,
270 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
271 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
272 (u8)(pci_dev->class));
273 }
274 static DEVICE_ATTR_RO(modalias);
275
276 static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
277 const char *buf, size_t count)
278 {
279 struct pci_dev *pdev = to_pci_dev(dev);
280 unsigned long val;
281 ssize_t result = kstrtoul(buf, 0, &val);
282
283 if (result < 0)
284 return result;
285
286 /* this can crash the machine when done on the "wrong" device */
287 if (!capable(CAP_SYS_ADMIN))
288 return -EPERM;
289
290 device_lock(dev);
291 if (dev->driver)
292 result = -EBUSY;
293 else if (val)
294 result = pci_enable_device(pdev);
295 else if (pci_is_enabled(pdev))
296 pci_disable_device(pdev);
297 else
298 result = -EIO;
299 device_unlock(dev);
300
301 return result < 0 ? result : count;
302 }
303
304 static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
305 char *buf)
306 {
307 struct pci_dev *pdev;
308
309 pdev = to_pci_dev(dev);
310 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
311 }
312 static DEVICE_ATTR_RW(enable);
313
314 #ifdef CONFIG_NUMA
315 static ssize_t numa_node_store(struct device *dev,
316 struct device_attribute *attr, const char *buf,
317 size_t count)
318 {
319 struct pci_dev *pdev = to_pci_dev(dev);
320 int node, ret;
321
322 if (!capable(CAP_SYS_ADMIN))
323 return -EPERM;
324
325 ret = kstrtoint(buf, 0, &node);
326 if (ret)
327 return ret;
328
329 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
330 return -EINVAL;
331
332 if (node != NUMA_NO_NODE && !node_online(node))
333 return -EINVAL;
334
335 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
336 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
337 node);
338
339 dev->numa_node = node;
340 return count;
341 }
342
343 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
344 char *buf)
345 {
346 return sprintf(buf, "%d\n", dev->numa_node);
347 }
348 static DEVICE_ATTR_RW(numa_node);
349 #endif
350
351 static ssize_t dma_mask_bits_show(struct device *dev,
352 struct device_attribute *attr, char *buf)
353 {
354 struct pci_dev *pdev = to_pci_dev(dev);
355
356 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
357 }
358 static DEVICE_ATTR_RO(dma_mask_bits);
359
360 static ssize_t consistent_dma_mask_bits_show(struct device *dev,
361 struct device_attribute *attr,
362 char *buf)
363 {
364 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
365 }
366 static DEVICE_ATTR_RO(consistent_dma_mask_bits);
367
368 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
369 char *buf)
370 {
371 struct pci_dev *pdev = to_pci_dev(dev);
372 struct pci_bus *subordinate = pdev->subordinate;
373
374 return sprintf(buf, "%u\n", subordinate ?
375 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
376 : !pdev->no_msi);
377 }
378
379 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
380 const char *buf, size_t count)
381 {
382 struct pci_dev *pdev = to_pci_dev(dev);
383 struct pci_bus *subordinate = pdev->subordinate;
384 unsigned long val;
385
386 if (kstrtoul(buf, 0, &val) < 0)
387 return -EINVAL;
388
389 if (!capable(CAP_SYS_ADMIN))
390 return -EPERM;
391
392 /*
393 * "no_msi" and "bus_flags" only affect what happens when a driver
394 * requests MSI or MSI-X. They don't affect any drivers that have
395 * already requested MSI or MSI-X.
396 */
397 if (!subordinate) {
398 pdev->no_msi = !val;
399 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
400 val ? "allowed" : "disallowed");
401 return count;
402 }
403
404 if (val)
405 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
406 else
407 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
408
409 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
410 val ? "allowed" : "disallowed");
411 return count;
412 }
413 static DEVICE_ATTR_RW(msi_bus);
414
415 static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
416 {
417 unsigned long val;
418 struct pci_bus *b = NULL;
419
420 if (kstrtoul(buf, 0, &val) < 0)
421 return -EINVAL;
422
423 if (val) {
424 pci_lock_rescan_remove();
425 while ((b = pci_find_next_bus(b)) != NULL)
426 pci_rescan_bus(b);
427 pci_unlock_rescan_remove();
428 }
429 return count;
430 }
431 static BUS_ATTR_WO(rescan);
432
433 static struct attribute *pci_bus_attrs[] = {
434 &bus_attr_rescan.attr,
435 NULL,
436 };
437
438 static const struct attribute_group pci_bus_group = {
439 .attrs = pci_bus_attrs,
440 };
441
442 const struct attribute_group *pci_bus_groups[] = {
443 &pci_bus_group,
444 NULL,
445 };
446
447 static ssize_t dev_rescan_store(struct device *dev,
448 struct device_attribute *attr, const char *buf,
449 size_t count)
450 {
451 unsigned long val;
452 struct pci_dev *pdev = to_pci_dev(dev);
453
454 if (kstrtoul(buf, 0, &val) < 0)
455 return -EINVAL;
456
457 if (val) {
458 pci_lock_rescan_remove();
459 pci_rescan_bus(pdev->bus);
460 pci_unlock_rescan_remove();
461 }
462 return count;
463 }
464 static struct device_attribute dev_rescan_attr = __ATTR(rescan,
465 (S_IWUSR|S_IWGRP),
466 NULL, dev_rescan_store);
467
468 static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
469 const char *buf, size_t count)
470 {
471 unsigned long val;
472
473 if (kstrtoul(buf, 0, &val) < 0)
474 return -EINVAL;
475
476 if (val && device_remove_file_self(dev, attr))
477 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
478 return count;
479 }
480 static struct device_attribute dev_remove_attr = __ATTR(remove,
481 (S_IWUSR|S_IWGRP),
482 NULL, remove_store);
483
484 static ssize_t dev_bus_rescan_store(struct device *dev,
485 struct device_attribute *attr,
486 const char *buf, size_t count)
487 {
488 unsigned long val;
489 struct pci_bus *bus = to_pci_bus(dev);
490
491 if (kstrtoul(buf, 0, &val) < 0)
492 return -EINVAL;
493
494 if (val) {
495 pci_lock_rescan_remove();
496 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
497 pci_rescan_bus_bridge_resize(bus->self);
498 else
499 pci_rescan_bus(bus);
500 pci_unlock_rescan_remove();
501 }
502 return count;
503 }
504 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
505
506 #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
507 static ssize_t d3cold_allowed_store(struct device *dev,
508 struct device_attribute *attr,
509 const char *buf, size_t count)
510 {
511 struct pci_dev *pdev = to_pci_dev(dev);
512 unsigned long val;
513
514 if (kstrtoul(buf, 0, &val) < 0)
515 return -EINVAL;
516
517 pdev->d3cold_allowed = !!val;
518 if (pdev->d3cold_allowed)
519 pci_d3cold_enable(pdev);
520 else
521 pci_d3cold_disable(pdev);
522
523 pm_runtime_resume(dev);
524
525 return count;
526 }
527
528 static ssize_t d3cold_allowed_show(struct device *dev,
529 struct device_attribute *attr, char *buf)
530 {
531 struct pci_dev *pdev = to_pci_dev(dev);
532 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
533 }
534 static DEVICE_ATTR_RW(d3cold_allowed);
535 #endif
536
537 #ifdef CONFIG_OF
538 static ssize_t devspec_show(struct device *dev,
539 struct device_attribute *attr, char *buf)
540 {
541 struct pci_dev *pdev = to_pci_dev(dev);
542 struct device_node *np = pci_device_to_OF_node(pdev);
543
544 if (np == NULL)
545 return 0;
546 return sprintf(buf, "%pOF", np);
547 }
548 static DEVICE_ATTR_RO(devspec);
549 #endif
550
551 #ifdef CONFIG_PCI_IOV
552 static ssize_t sriov_totalvfs_show(struct device *dev,
553 struct device_attribute *attr,
554 char *buf)
555 {
556 struct pci_dev *pdev = to_pci_dev(dev);
557
558 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
559 }
560
561
562 static ssize_t sriov_numvfs_show(struct device *dev,
563 struct device_attribute *attr,
564 char *buf)
565 {
566 struct pci_dev *pdev = to_pci_dev(dev);
567
568 return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
569 }
570
571 /*
572 * num_vfs > 0; number of VFs to enable
573 * num_vfs = 0; disable all VFs
574 *
575 * Note: SRIOV spec doesn't allow partial VF
576 * disable, so it's all or none.
577 */
578 static ssize_t sriov_numvfs_store(struct device *dev,
579 struct device_attribute *attr,
580 const char *buf, size_t count)
581 {
582 struct pci_dev *pdev = to_pci_dev(dev);
583 int ret;
584 u16 num_vfs;
585
586 ret = kstrtou16(buf, 0, &num_vfs);
587 if (ret < 0)
588 return ret;
589
590 if (num_vfs > pci_sriov_get_totalvfs(pdev))
591 return -ERANGE;
592
593 device_lock(&pdev->dev);
594
595 if (num_vfs == pdev->sriov->num_VFs)
596 goto exit;
597
598 /* is PF driver loaded w/callback */
599 if (!pdev->driver || !pdev->driver->sriov_configure) {
600 pci_info(pdev, "Driver doesn't support SRIOV configuration via sysfs\n");
601 ret = -ENOENT;
602 goto exit;
603 }
604
605 if (num_vfs == 0) {
606 /* disable VFs */
607 ret = pdev->driver->sriov_configure(pdev, 0);
608 goto exit;
609 }
610
611 /* enable VFs */
612 if (pdev->sriov->num_VFs) {
613 pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
614 pdev->sriov->num_VFs, num_vfs);
615 ret = -EBUSY;
616 goto exit;
617 }
618
619 ret = pdev->driver->sriov_configure(pdev, num_vfs);
620 if (ret < 0)
621 goto exit;
622
623 if (ret != num_vfs)
624 pci_warn(pdev, "%d VFs requested; only %d enabled\n",
625 num_vfs, ret);
626
627 exit:
628 device_unlock(&pdev->dev);
629
630 if (ret < 0)
631 return ret;
632
633 return count;
634 }
635
636 static ssize_t sriov_offset_show(struct device *dev,
637 struct device_attribute *attr,
638 char *buf)
639 {
640 struct pci_dev *pdev = to_pci_dev(dev);
641
642 return sprintf(buf, "%u\n", pdev->sriov->offset);
643 }
644
645 static ssize_t sriov_stride_show(struct device *dev,
646 struct device_attribute *attr,
647 char *buf)
648 {
649 struct pci_dev *pdev = to_pci_dev(dev);
650
651 return sprintf(buf, "%u\n", pdev->sriov->stride);
652 }
653
654 static ssize_t sriov_vf_device_show(struct device *dev,
655 struct device_attribute *attr,
656 char *buf)
657 {
658 struct pci_dev *pdev = to_pci_dev(dev);
659
660 return sprintf(buf, "%x\n", pdev->sriov->vf_device);
661 }
662
663 static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
664 struct device_attribute *attr,
665 char *buf)
666 {
667 struct pci_dev *pdev = to_pci_dev(dev);
668
669 return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
670 }
671
672 static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
673 struct device_attribute *attr,
674 const char *buf, size_t count)
675 {
676 struct pci_dev *pdev = to_pci_dev(dev);
677 bool drivers_autoprobe;
678
679 if (kstrtobool(buf, &drivers_autoprobe) < 0)
680 return -EINVAL;
681
682 pdev->sriov->drivers_autoprobe = drivers_autoprobe;
683
684 return count;
685 }
686
687 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
688 static struct device_attribute sriov_numvfs_attr =
689 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
690 sriov_numvfs_show, sriov_numvfs_store);
691 static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset);
692 static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride);
693 static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device);
694 static struct device_attribute sriov_drivers_autoprobe_attr =
695 __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
696 sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
697 #endif /* CONFIG_PCI_IOV */
698
699 static ssize_t driver_override_store(struct device *dev,
700 struct device_attribute *attr,
701 const char *buf, size_t count)
702 {
703 struct pci_dev *pdev = to_pci_dev(dev);
704 char *driver_override, *old, *cp;
705
706 /* We need to keep extra room for a newline */
707 if (count >= (PAGE_SIZE - 1))
708 return -EINVAL;
709
710 driver_override = kstrndup(buf, count, GFP_KERNEL);
711 if (!driver_override)
712 return -ENOMEM;
713
714 cp = strchr(driver_override, '\n');
715 if (cp)
716 *cp = '\0';
717
718 device_lock(dev);
719 old = pdev->driver_override;
720 if (strlen(driver_override)) {
721 pdev->driver_override = driver_override;
722 } else {
723 kfree(driver_override);
724 pdev->driver_override = NULL;
725 }
726 device_unlock(dev);
727
728 kfree(old);
729
730 return count;
731 }
732
733 static ssize_t driver_override_show(struct device *dev,
734 struct device_attribute *attr, char *buf)
735 {
736 struct pci_dev *pdev = to_pci_dev(dev);
737 ssize_t len;
738
739 device_lock(dev);
740 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
741 device_unlock(dev);
742 return len;
743 }
744 static DEVICE_ATTR_RW(driver_override);
745
746 static struct attribute *pci_dev_attrs[] = {
747 &dev_attr_resource.attr,
748 &dev_attr_vendor.attr,
749 &dev_attr_device.attr,
750 &dev_attr_subsystem_vendor.attr,
751 &dev_attr_subsystem_device.attr,
752 &dev_attr_revision.attr,
753 &dev_attr_class.attr,
754 &dev_attr_irq.attr,
755 &dev_attr_local_cpus.attr,
756 &dev_attr_local_cpulist.attr,
757 &dev_attr_modalias.attr,
758 #ifdef CONFIG_NUMA
759 &dev_attr_numa_node.attr,
760 #endif
761 &dev_attr_dma_mask_bits.attr,
762 &dev_attr_consistent_dma_mask_bits.attr,
763 &dev_attr_enable.attr,
764 &dev_attr_broken_parity_status.attr,
765 &dev_attr_msi_bus.attr,
766 #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
767 &dev_attr_d3cold_allowed.attr,
768 #endif
769 #ifdef CONFIG_OF
770 &dev_attr_devspec.attr,
771 #endif
772 &dev_attr_driver_override.attr,
773 &dev_attr_ari_enabled.attr,
774 NULL,
775 };
776
777 static struct attribute *pci_bridge_attrs[] = {
778 &dev_attr_subordinate_bus_number.attr,
779 &dev_attr_secondary_bus_number.attr,
780 NULL,
781 };
782
783 static struct attribute *pcie_dev_attrs[] = {
784 &dev_attr_current_link_speed.attr,
785 &dev_attr_current_link_width.attr,
786 &dev_attr_max_link_width.attr,
787 &dev_attr_max_link_speed.attr,
788 NULL,
789 };
790
791 static struct attribute *pcibus_attrs[] = {
792 &dev_attr_rescan.attr,
793 &dev_attr_cpuaffinity.attr,
794 &dev_attr_cpulistaffinity.attr,
795 NULL,
796 };
797
798 static const struct attribute_group pcibus_group = {
799 .attrs = pcibus_attrs,
800 };
801
802 const struct attribute_group *pcibus_groups[] = {
803 &pcibus_group,
804 NULL,
805 };
806
807 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
808 char *buf)
809 {
810 struct pci_dev *pdev = to_pci_dev(dev);
811 struct pci_dev *vga_dev = vga_default_device();
812
813 if (vga_dev)
814 return sprintf(buf, "%u\n", (pdev == vga_dev));
815
816 return sprintf(buf, "%u\n",
817 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
818 IORESOURCE_ROM_SHADOW));
819 }
820 static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
821
822 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
823 struct bin_attribute *bin_attr, char *buf,
824 loff_t off, size_t count)
825 {
826 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
827 unsigned int size = 64;
828 loff_t init_off = off;
829 u8 *data = (u8 *) buf;
830
831 /* Several chips lock up trying to read undefined config space */
832 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
833 size = dev->cfg_size;
834 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
835 size = 128;
836
837 if (off > size)
838 return 0;
839 if (off + count > size) {
840 size -= off;
841 count = size;
842 } else {
843 size = count;
844 }
845
846 pci_config_pm_runtime_get(dev);
847
848 if ((off & 1) && size) {
849 u8 val;
850 pci_user_read_config_byte(dev, off, &val);
851 data[off - init_off] = val;
852 off++;
853 size--;
854 }
855
856 if ((off & 3) && size > 2) {
857 u16 val;
858 pci_user_read_config_word(dev, off, &val);
859 data[off - init_off] = val & 0xff;
860 data[off - init_off + 1] = (val >> 8) & 0xff;
861 off += 2;
862 size -= 2;
863 }
864
865 while (size > 3) {
866 u32 val;
867 pci_user_read_config_dword(dev, off, &val);
868 data[off - init_off] = val & 0xff;
869 data[off - init_off + 1] = (val >> 8) & 0xff;
870 data[off - init_off + 2] = (val >> 16) & 0xff;
871 data[off - init_off + 3] = (val >> 24) & 0xff;
872 off += 4;
873 size -= 4;
874 }
875
876 if (size >= 2) {
877 u16 val;
878 pci_user_read_config_word(dev, off, &val);
879 data[off - init_off] = val & 0xff;
880 data[off - init_off + 1] = (val >> 8) & 0xff;
881 off += 2;
882 size -= 2;
883 }
884
885 if (size > 0) {
886 u8 val;
887 pci_user_read_config_byte(dev, off, &val);
888 data[off - init_off] = val;
889 off++;
890 --size;
891 }
892
893 pci_config_pm_runtime_put(dev);
894
895 return count;
896 }
897
898 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
899 struct bin_attribute *bin_attr, char *buf,
900 loff_t off, size_t count)
901 {
902 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
903 unsigned int size = count;
904 loff_t init_off = off;
905 u8 *data = (u8 *) buf;
906
907 if (off > dev->cfg_size)
908 return 0;
909 if (off + count > dev->cfg_size) {
910 size = dev->cfg_size - off;
911 count = size;
912 }
913
914 pci_config_pm_runtime_get(dev);
915
916 if ((off & 1) && size) {
917 pci_user_write_config_byte(dev, off, data[off - init_off]);
918 off++;
919 size--;
920 }
921
922 if ((off & 3) && size > 2) {
923 u16 val = data[off - init_off];
924 val |= (u16) data[off - init_off + 1] << 8;
925 pci_user_write_config_word(dev, off, val);
926 off += 2;
927 size -= 2;
928 }
929
930 while (size > 3) {
931 u32 val = data[off - init_off];
932 val |= (u32) data[off - init_off + 1] << 8;
933 val |= (u32) data[off - init_off + 2] << 16;
934 val |= (u32) data[off - init_off + 3] << 24;
935 pci_user_write_config_dword(dev, off, val);
936 off += 4;
937 size -= 4;
938 }
939
940 if (size >= 2) {
941 u16 val = data[off - init_off];
942 val |= (u16) data[off - init_off + 1] << 8;
943 pci_user_write_config_word(dev, off, val);
944 off += 2;
945 size -= 2;
946 }
947
948 if (size) {
949 pci_user_write_config_byte(dev, off, data[off - init_off]);
950 off++;
951 --size;
952 }
953
954 pci_config_pm_runtime_put(dev);
955
956 return count;
957 }
958
959 #ifdef HAVE_PCI_LEGACY
960 /**
961 * pci_read_legacy_io - read byte(s) from legacy I/O port space
962 * @filp: open sysfs file
963 * @kobj: kobject corresponding to file to read from
964 * @bin_attr: struct bin_attribute for this file
965 * @buf: buffer to store results
966 * @off: offset into legacy I/O port space
967 * @count: number of bytes to read
968 *
969 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
970 * callback routine (pci_legacy_read).
971 */
972 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
973 struct bin_attribute *bin_attr, char *buf,
974 loff_t off, size_t count)
975 {
976 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
977
978 /* Only support 1, 2 or 4 byte accesses */
979 if (count != 1 && count != 2 && count != 4)
980 return -EINVAL;
981
982 return pci_legacy_read(bus, off, (u32 *)buf, count);
983 }
984
985 /**
986 * pci_write_legacy_io - write byte(s) to legacy I/O port space
987 * @filp: open sysfs file
988 * @kobj: kobject corresponding to file to read from
989 * @bin_attr: struct bin_attribute for this file
990 * @buf: buffer containing value to be written
991 * @off: offset into legacy I/O port space
992 * @count: number of bytes to write
993 *
994 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
995 * callback routine (pci_legacy_write).
996 */
997 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
998 struct bin_attribute *bin_attr, char *buf,
999 loff_t off, size_t count)
1000 {
1001 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1002
1003 /* Only support 1, 2 or 4 byte accesses */
1004 if (count != 1 && count != 2 && count != 4)
1005 return -EINVAL;
1006
1007 return pci_legacy_write(bus, off, *(u32 *)buf, count);
1008 }
1009
1010 /**
1011 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
1012 * @filp: open sysfs file
1013 * @kobj: kobject corresponding to device to be mapped
1014 * @attr: struct bin_attribute for this file
1015 * @vma: struct vm_area_struct passed to mmap
1016 *
1017 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1018 * legacy memory space (first meg of bus space) into application virtual
1019 * memory space.
1020 */
1021 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
1022 struct bin_attribute *attr,
1023 struct vm_area_struct *vma)
1024 {
1025 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1026
1027 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
1028 }
1029
1030 /**
1031 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
1032 * @filp: open sysfs file
1033 * @kobj: kobject corresponding to device to be mapped
1034 * @attr: struct bin_attribute for this file
1035 * @vma: struct vm_area_struct passed to mmap
1036 *
1037 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
1038 * legacy IO space (first meg of bus space) into application virtual
1039 * memory space. Returns -ENOSYS if the operation isn't supported
1040 */
1041 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
1042 struct bin_attribute *attr,
1043 struct vm_area_struct *vma)
1044 {
1045 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1046
1047 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
1048 }
1049
1050 /**
1051 * pci_adjust_legacy_attr - adjustment of legacy file attributes
1052 * @b: bus to create files under
1053 * @mmap_type: I/O port or memory
1054 *
1055 * Stub implementation. Can be overridden by arch if necessary.
1056 */
1057 void __weak pci_adjust_legacy_attr(struct pci_bus *b,
1058 enum pci_mmap_state mmap_type)
1059 {
1060 }
1061
1062 /**
1063 * pci_create_legacy_files - create legacy I/O port and memory files
1064 * @b: bus to create files under
1065 *
1066 * Some platforms allow access to legacy I/O port and ISA memory space on
1067 * a per-bus basis. This routine creates the files and ties them into
1068 * their associated read, write and mmap files from pci-sysfs.c
1069 *
1070 * On error unwind, but don't propagate the error to the caller
1071 * as it is ok to set up the PCI bus without these files.
1072 */
1073 void pci_create_legacy_files(struct pci_bus *b)
1074 {
1075 int error;
1076
1077 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
1078 GFP_ATOMIC);
1079 if (!b->legacy_io)
1080 goto kzalloc_err;
1081
1082 sysfs_bin_attr_init(b->legacy_io);
1083 b->legacy_io->attr.name = "legacy_io";
1084 b->legacy_io->size = 0xffff;
1085 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
1086 b->legacy_io->read = pci_read_legacy_io;
1087 b->legacy_io->write = pci_write_legacy_io;
1088 b->legacy_io->mmap = pci_mmap_legacy_io;
1089 pci_adjust_legacy_attr(b, pci_mmap_io);
1090 error = device_create_bin_file(&b->dev, b->legacy_io);
1091 if (error)
1092 goto legacy_io_err;
1093
1094 /* Allocated above after the legacy_io struct */
1095 b->legacy_mem = b->legacy_io + 1;
1096 sysfs_bin_attr_init(b->legacy_mem);
1097 b->legacy_mem->attr.name = "legacy_mem";
1098 b->legacy_mem->size = 1024*1024;
1099 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
1100 b->legacy_mem->mmap = pci_mmap_legacy_mem;
1101 pci_adjust_legacy_attr(b, pci_mmap_mem);
1102 error = device_create_bin_file(&b->dev, b->legacy_mem);
1103 if (error)
1104 goto legacy_mem_err;
1105
1106 return;
1107
1108 legacy_mem_err:
1109 device_remove_bin_file(&b->dev, b->legacy_io);
1110 legacy_io_err:
1111 kfree(b->legacy_io);
1112 b->legacy_io = NULL;
1113 kzalloc_err:
1114 printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
1115 return;
1116 }
1117
1118 void pci_remove_legacy_files(struct pci_bus *b)
1119 {
1120 if (b->legacy_io) {
1121 device_remove_bin_file(&b->dev, b->legacy_io);
1122 device_remove_bin_file(&b->dev, b->legacy_mem);
1123 kfree(b->legacy_io); /* both are allocated here */
1124 }
1125 }
1126 #endif /* HAVE_PCI_LEGACY */
1127
1128 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
1129
1130 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
1131 enum pci_mmap_api mmap_api)
1132 {
1133 unsigned long nr, start, size;
1134 resource_size_t pci_start = 0, pci_end;
1135
1136 if (pci_resource_len(pdev, resno) == 0)
1137 return 0;
1138 nr = vma_pages(vma);
1139 start = vma->vm_pgoff;
1140 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
1141 if (mmap_api == PCI_MMAP_PROCFS) {
1142 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
1143 &pci_start, &pci_end);
1144 pci_start >>= PAGE_SHIFT;
1145 }
1146 if (start >= pci_start && start < pci_start + size &&
1147 start + nr <= pci_start + size)
1148 return 1;
1149 return 0;
1150 }
1151
1152 /**
1153 * pci_mmap_resource - map a PCI resource into user memory space
1154 * @kobj: kobject for mapping
1155 * @attr: struct bin_attribute for the file being mapped
1156 * @vma: struct vm_area_struct passed into the mmap
1157 * @write_combine: 1 for write_combine mapping
1158 *
1159 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1160 */
1161 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1162 struct vm_area_struct *vma, int write_combine)
1163 {
1164 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1165 int bar = (unsigned long)attr->private;
1166 enum pci_mmap_state mmap_type;
1167 struct resource *res = &pdev->resource[bar];
1168
1169 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1170 return -EINVAL;
1171
1172 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1173 return -EINVAL;
1174
1175 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1176
1177 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1178 }
1179
1180 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1181 struct bin_attribute *attr,
1182 struct vm_area_struct *vma)
1183 {
1184 return pci_mmap_resource(kobj, attr, vma, 0);
1185 }
1186
1187 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1188 struct bin_attribute *attr,
1189 struct vm_area_struct *vma)
1190 {
1191 return pci_mmap_resource(kobj, attr, vma, 1);
1192 }
1193
1194 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1195 struct bin_attribute *attr, char *buf,
1196 loff_t off, size_t count, bool write)
1197 {
1198 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1199 int bar = (unsigned long)attr->private;
1200 unsigned long port = off;
1201
1202 port += pci_resource_start(pdev, bar);
1203
1204 if (port > pci_resource_end(pdev, bar))
1205 return 0;
1206
1207 if (port + count - 1 > pci_resource_end(pdev, bar))
1208 return -EINVAL;
1209
1210 switch (count) {
1211 case 1:
1212 if (write)
1213 outb(*(u8 *)buf, port);
1214 else
1215 *(u8 *)buf = inb(port);
1216 return 1;
1217 case 2:
1218 if (write)
1219 outw(*(u16 *)buf, port);
1220 else
1221 *(u16 *)buf = inw(port);
1222 return 2;
1223 case 4:
1224 if (write)
1225 outl(*(u32 *)buf, port);
1226 else
1227 *(u32 *)buf = inl(port);
1228 return 4;
1229 }
1230 return -EINVAL;
1231 }
1232
1233 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1234 struct bin_attribute *attr, char *buf,
1235 loff_t off, size_t count)
1236 {
1237 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1238 }
1239
1240 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1241 struct bin_attribute *attr, char *buf,
1242 loff_t off, size_t count)
1243 {
1244 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1245 }
1246
1247 /**
1248 * pci_remove_resource_files - cleanup resource files
1249 * @pdev: dev to cleanup
1250 *
1251 * If we created resource files for @pdev, remove them from sysfs and
1252 * free their resources.
1253 */
1254 static void pci_remove_resource_files(struct pci_dev *pdev)
1255 {
1256 int i;
1257
1258 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1259 struct bin_attribute *res_attr;
1260
1261 res_attr = pdev->res_attr[i];
1262 if (res_attr) {
1263 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1264 kfree(res_attr);
1265 }
1266
1267 res_attr = pdev->res_attr_wc[i];
1268 if (res_attr) {
1269 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1270 kfree(res_attr);
1271 }
1272 }
1273 }
1274
1275 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1276 {
1277 /* allocate attribute structure, piggyback attribute name */
1278 int name_len = write_combine ? 13 : 10;
1279 struct bin_attribute *res_attr;
1280 char *res_attr_name;
1281 int retval;
1282
1283 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1284 if (!res_attr)
1285 return -ENOMEM;
1286
1287 res_attr_name = (char *)(res_attr + 1);
1288
1289 sysfs_bin_attr_init(res_attr);
1290 if (write_combine) {
1291 pdev->res_attr_wc[num] = res_attr;
1292 sprintf(res_attr_name, "resource%d_wc", num);
1293 res_attr->mmap = pci_mmap_resource_wc;
1294 } else {
1295 pdev->res_attr[num] = res_attr;
1296 sprintf(res_attr_name, "resource%d", num);
1297 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1298 res_attr->read = pci_read_resource_io;
1299 res_attr->write = pci_write_resource_io;
1300 if (arch_can_pci_mmap_io())
1301 res_attr->mmap = pci_mmap_resource_uc;
1302 } else {
1303 res_attr->mmap = pci_mmap_resource_uc;
1304 }
1305 }
1306 res_attr->attr.name = res_attr_name;
1307 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1308 res_attr->size = pci_resource_len(pdev, num);
1309 res_attr->private = (void *)(unsigned long)num;
1310 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1311 if (retval)
1312 kfree(res_attr);
1313
1314 return retval;
1315 }
1316
1317 /**
1318 * pci_create_resource_files - create resource files in sysfs for @dev
1319 * @pdev: dev in question
1320 *
1321 * Walk the resources in @pdev creating files for each resource available.
1322 */
1323 static int pci_create_resource_files(struct pci_dev *pdev)
1324 {
1325 int i;
1326 int retval;
1327
1328 /* Expose the PCI resources from this device as files */
1329 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1330
1331 /* skip empty resources */
1332 if (!pci_resource_len(pdev, i))
1333 continue;
1334
1335 retval = pci_create_attr(pdev, i, 0);
1336 /* for prefetchable resources, create a WC mappable file */
1337 if (!retval && arch_can_pci_mmap_wc() &&
1338 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1339 retval = pci_create_attr(pdev, i, 1);
1340 if (retval) {
1341 pci_remove_resource_files(pdev);
1342 return retval;
1343 }
1344 }
1345 return 0;
1346 }
1347 #else /* !HAVE_PCI_MMAP */
1348 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1349 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1350 #endif /* HAVE_PCI_MMAP */
1351
1352 /**
1353 * pci_write_rom - used to enable access to the PCI ROM display
1354 * @filp: sysfs file
1355 * @kobj: kernel object handle
1356 * @bin_attr: struct bin_attribute for this file
1357 * @buf: user input
1358 * @off: file offset
1359 * @count: number of byte in input
1360 *
1361 * writing anything except 0 enables it
1362 */
1363 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1364 struct bin_attribute *bin_attr, char *buf,
1365 loff_t off, size_t count)
1366 {
1367 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1368
1369 if ((off == 0) && (*buf == '0') && (count == 2))
1370 pdev->rom_attr_enabled = 0;
1371 else
1372 pdev->rom_attr_enabled = 1;
1373
1374 return count;
1375 }
1376
1377 /**
1378 * pci_read_rom - read a PCI ROM
1379 * @filp: sysfs file
1380 * @kobj: kernel object handle
1381 * @bin_attr: struct bin_attribute for this file
1382 * @buf: where to put the data we read from the ROM
1383 * @off: file offset
1384 * @count: number of bytes to read
1385 *
1386 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1387 * device corresponding to @kobj.
1388 */
1389 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1390 struct bin_attribute *bin_attr, char *buf,
1391 loff_t off, size_t count)
1392 {
1393 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1394 void __iomem *rom;
1395 size_t size;
1396
1397 if (!pdev->rom_attr_enabled)
1398 return -EINVAL;
1399
1400 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1401 if (!rom || !size)
1402 return -EIO;
1403
1404 if (off >= size)
1405 count = 0;
1406 else {
1407 if (off + count > size)
1408 count = size - off;
1409
1410 memcpy_fromio(buf, rom + off, count);
1411 }
1412 pci_unmap_rom(pdev, rom);
1413
1414 return count;
1415 }
1416
1417 static const struct bin_attribute pci_config_attr = {
1418 .attr = {
1419 .name = "config",
1420 .mode = S_IRUGO | S_IWUSR,
1421 },
1422 .size = PCI_CFG_SPACE_SIZE,
1423 .read = pci_read_config,
1424 .write = pci_write_config,
1425 };
1426
1427 static const struct bin_attribute pcie_config_attr = {
1428 .attr = {
1429 .name = "config",
1430 .mode = S_IRUGO | S_IWUSR,
1431 },
1432 .size = PCI_CFG_SPACE_EXP_SIZE,
1433 .read = pci_read_config,
1434 .write = pci_write_config,
1435 };
1436
1437 static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1438 const char *buf, size_t count)
1439 {
1440 struct pci_dev *pdev = to_pci_dev(dev);
1441 unsigned long val;
1442 ssize_t result = kstrtoul(buf, 0, &val);
1443
1444 if (result < 0)
1445 return result;
1446
1447 if (val != 1)
1448 return -EINVAL;
1449
1450 pm_runtime_get_sync(dev);
1451 result = pci_reset_function(pdev);
1452 pm_runtime_put(dev);
1453 if (result < 0)
1454 return result;
1455
1456 return count;
1457 }
1458
1459 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1460
1461 static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1462 {
1463 int retval;
1464
1465 pcie_vpd_create_sysfs_dev_files(dev);
1466 pcie_aspm_create_sysfs_dev_files(dev);
1467
1468 if (dev->reset_fn) {
1469 retval = device_create_file(&dev->dev, &reset_attr);
1470 if (retval)
1471 goto error;
1472 }
1473 return 0;
1474
1475 error:
1476 pcie_aspm_remove_sysfs_dev_files(dev);
1477 pcie_vpd_remove_sysfs_dev_files(dev);
1478 return retval;
1479 }
1480
1481 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1482 {
1483 int retval;
1484 int rom_size;
1485 struct bin_attribute *attr;
1486
1487 if (!sysfs_initialized)
1488 return -EACCES;
1489
1490 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1491 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1492 else
1493 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1494 if (retval)
1495 goto err;
1496
1497 retval = pci_create_resource_files(pdev);
1498 if (retval)
1499 goto err_config_file;
1500
1501 /* If the device has a ROM, try to expose it in sysfs. */
1502 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1503 if (rom_size) {
1504 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1505 if (!attr) {
1506 retval = -ENOMEM;
1507 goto err_resource_files;
1508 }
1509 sysfs_bin_attr_init(attr);
1510 attr->size = rom_size;
1511 attr->attr.name = "rom";
1512 attr->attr.mode = S_IRUSR | S_IWUSR;
1513 attr->read = pci_read_rom;
1514 attr->write = pci_write_rom;
1515 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1516 if (retval) {
1517 kfree(attr);
1518 goto err_resource_files;
1519 }
1520 pdev->rom_attr = attr;
1521 }
1522
1523 /* add sysfs entries for various capabilities */
1524 retval = pci_create_capabilities_sysfs(pdev);
1525 if (retval)
1526 goto err_rom_file;
1527
1528 pci_create_firmware_label_files(pdev);
1529
1530 return 0;
1531
1532 err_rom_file:
1533 if (pdev->rom_attr) {
1534 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1535 kfree(pdev->rom_attr);
1536 pdev->rom_attr = NULL;
1537 }
1538 err_resource_files:
1539 pci_remove_resource_files(pdev);
1540 err_config_file:
1541 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1542 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1543 else
1544 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1545 err:
1546 return retval;
1547 }
1548
1549 static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1550 {
1551 pcie_vpd_remove_sysfs_dev_files(dev);
1552 pcie_aspm_remove_sysfs_dev_files(dev);
1553 if (dev->reset_fn) {
1554 device_remove_file(&dev->dev, &reset_attr);
1555 dev->reset_fn = 0;
1556 }
1557 }
1558
1559 /**
1560 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1561 * @pdev: device whose entries we should free
1562 *
1563 * Cleanup when @pdev is removed from sysfs.
1564 */
1565 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1566 {
1567 if (!sysfs_initialized)
1568 return;
1569
1570 pci_remove_capabilities_sysfs(pdev);
1571
1572 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1573 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1574 else
1575 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1576
1577 pci_remove_resource_files(pdev);
1578
1579 if (pdev->rom_attr) {
1580 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1581 kfree(pdev->rom_attr);
1582 pdev->rom_attr = NULL;
1583 }
1584
1585 pci_remove_firmware_label_files(pdev);
1586 }
1587
1588 static int __init pci_sysfs_init(void)
1589 {
1590 struct pci_dev *pdev = NULL;
1591 int retval;
1592
1593 sysfs_initialized = 1;
1594 for_each_pci_dev(pdev) {
1595 retval = pci_create_sysfs_dev_files(pdev);
1596 if (retval) {
1597 pci_dev_put(pdev);
1598 return retval;
1599 }
1600 }
1601
1602 return 0;
1603 }
1604 late_initcall(pci_sysfs_init);
1605
1606 static struct attribute *pci_dev_dev_attrs[] = {
1607 &vga_attr.attr,
1608 NULL,
1609 };
1610
1611 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1612 struct attribute *a, int n)
1613 {
1614 struct device *dev = kobj_to_dev(kobj);
1615 struct pci_dev *pdev = to_pci_dev(dev);
1616
1617 if (a == &vga_attr.attr)
1618 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1619 return 0;
1620
1621 return a->mode;
1622 }
1623
1624 static struct attribute *pci_dev_hp_attrs[] = {
1625 &dev_remove_attr.attr,
1626 &dev_rescan_attr.attr,
1627 NULL,
1628 };
1629
1630 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1631 struct attribute *a, int n)
1632 {
1633 struct device *dev = kobj_to_dev(kobj);
1634 struct pci_dev *pdev = to_pci_dev(dev);
1635
1636 if (pdev->is_virtfn)
1637 return 0;
1638
1639 return a->mode;
1640 }
1641
1642 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1643 struct attribute *a, int n)
1644 {
1645 struct device *dev = kobj_to_dev(kobj);
1646 struct pci_dev *pdev = to_pci_dev(dev);
1647
1648 if (pci_is_bridge(pdev))
1649 return a->mode;
1650
1651 return 0;
1652 }
1653
1654 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1655 struct attribute *a, int n)
1656 {
1657 struct device *dev = kobj_to_dev(kobj);
1658 struct pci_dev *pdev = to_pci_dev(dev);
1659
1660 if (pci_is_pcie(pdev))
1661 return a->mode;
1662
1663 return 0;
1664 }
1665
1666 static const struct attribute_group pci_dev_group = {
1667 .attrs = pci_dev_attrs,
1668 };
1669
1670 const struct attribute_group *pci_dev_groups[] = {
1671 &pci_dev_group,
1672 NULL,
1673 };
1674
1675 static const struct attribute_group pci_bridge_group = {
1676 .attrs = pci_bridge_attrs,
1677 };
1678
1679 const struct attribute_group *pci_bridge_groups[] = {
1680 &pci_bridge_group,
1681 NULL,
1682 };
1683
1684 static const struct attribute_group pcie_dev_group = {
1685 .attrs = pcie_dev_attrs,
1686 };
1687
1688 const struct attribute_group *pcie_dev_groups[] = {
1689 &pcie_dev_group,
1690 NULL,
1691 };
1692
1693 static const struct attribute_group pci_dev_hp_attr_group = {
1694 .attrs = pci_dev_hp_attrs,
1695 .is_visible = pci_dev_hp_attrs_are_visible,
1696 };
1697
1698 #ifdef CONFIG_PCI_IOV
1699 static struct attribute *sriov_dev_attrs[] = {
1700 &sriov_totalvfs_attr.attr,
1701 &sriov_numvfs_attr.attr,
1702 &sriov_offset_attr.attr,
1703 &sriov_stride_attr.attr,
1704 &sriov_vf_device_attr.attr,
1705 &sriov_drivers_autoprobe_attr.attr,
1706 NULL,
1707 };
1708
1709 static umode_t sriov_attrs_are_visible(struct kobject *kobj,
1710 struct attribute *a, int n)
1711 {
1712 struct device *dev = kobj_to_dev(kobj);
1713
1714 if (!dev_is_pf(dev))
1715 return 0;
1716
1717 return a->mode;
1718 }
1719
1720 static const struct attribute_group sriov_dev_attr_group = {
1721 .attrs = sriov_dev_attrs,
1722 .is_visible = sriov_attrs_are_visible,
1723 };
1724 #endif /* CONFIG_PCI_IOV */
1725
1726 static const struct attribute_group pci_dev_attr_group = {
1727 .attrs = pci_dev_dev_attrs,
1728 .is_visible = pci_dev_attrs_are_visible,
1729 };
1730
1731 static const struct attribute_group pci_bridge_attr_group = {
1732 .attrs = pci_bridge_attrs,
1733 .is_visible = pci_bridge_attrs_are_visible,
1734 };
1735
1736 static const struct attribute_group pcie_dev_attr_group = {
1737 .attrs = pcie_dev_attrs,
1738 .is_visible = pcie_dev_attrs_are_visible,
1739 };
1740
1741 static const struct attribute_group *pci_dev_attr_groups[] = {
1742 &pci_dev_attr_group,
1743 &pci_dev_hp_attr_group,
1744 #ifdef CONFIG_PCI_IOV
1745 &sriov_dev_attr_group,
1746 #endif
1747 &pci_bridge_attr_group,
1748 &pcie_dev_attr_group,
1749 #ifdef CONFIG_PCIEAER
1750 &aer_stats_attr_group,
1751 #endif
1752 NULL,
1753 };
1754
1755 const struct device_type pci_dev_type = {
1756 .groups = pci_dev_attr_groups,
1757 };
Linux with added FPC-III support