1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2012 Freescale Semiconductor, Inc.
6 #include <linux/module.h>
7 #include <linux/of_platform.h>
10 #include <linux/delay.h>
12 #include "ci_hdrc_imx.h"
14 #define MX25_USB_PHY_CTRL_OFFSET 0x08
15 #define MX25_BM_EXTERNAL_VBUS_DIVIDER BIT(23)
17 #define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
18 #define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0)
19 #define MX25_EHCI_INTERFACE_MASK (0xf)
21 #define MX25_OTG_SIC_SHIFT 29
22 #define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT)
23 #define MX25_OTG_PM_BIT BIT(24)
24 #define MX25_OTG_PP_BIT BIT(11)
25 #define MX25_OTG_OCPOL_BIT BIT(3)
27 #define MX25_H1_SIC_SHIFT 21
28 #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
29 #define MX25_H1_PP_BIT BIT(18)
30 #define MX25_H1_PM_BIT BIT(16)
31 #define MX25_H1_IPPUE_UP_BIT BIT(7)
32 #define MX25_H1_IPPUE_DOWN_BIT BIT(6)
33 #define MX25_H1_TLL_BIT BIT(5)
34 #define MX25_H1_USBTE_BIT BIT(4)
35 #define MX25_H1_OCPOL_BIT BIT(2)
37 #define MX27_H1_PM_BIT BIT(8)
38 #define MX27_H2_PM_BIT BIT(16)
39 #define MX27_OTG_PM_BIT BIT(24)
41 #define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08
42 #define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c
43 #define MX53_USB_CTRL_1_OFFSET 0x10
44 #define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK (0x11 << 2)
45 #define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI BIT(2)
46 #define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK (0x11 << 6)
47 #define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI BIT(6)
48 #define MX53_USB_UH2_CTRL_OFFSET 0x14
49 #define MX53_USB_UH3_CTRL_OFFSET 0x18
50 #define MX53_USB_CLKONOFF_CTRL_OFFSET 0x24
51 #define MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF BIT(21)
52 #define MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF BIT(22)
53 #define MX53_BM_OVER_CUR_DIS_H1 BIT(5)
54 #define MX53_BM_OVER_CUR_DIS_OTG BIT(8)
55 #define MX53_BM_OVER_CUR_DIS_UHx BIT(30)
56 #define MX53_USB_CTRL_1_UH2_ULPI_EN BIT(26)
57 #define MX53_USB_CTRL_1_UH3_ULPI_EN BIT(27)
58 #define MX53_USB_UHx_CTRL_WAKE_UP_EN BIT(7)
59 #define MX53_USB_UHx_CTRL_ULPI_INT_EN BIT(8)
60 #define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3
61 #define MX53_USB_PLL_DIV_24_MHZ 0x01
63 #define MX6_BM_NON_BURST_SETTING BIT(1)
64 #define MX6_BM_OVER_CUR_DIS BIT(7)
65 #define MX6_BM_OVER_CUR_POLARITY BIT(8)
66 #define MX6_BM_PWR_POLARITY BIT(9)
67 #define MX6_BM_WAKEUP_ENABLE BIT(10)
68 #define MX6_BM_UTMI_ON_CLOCK BIT(13)
69 #define MX6_BM_ID_WAKEUP BIT(16)
70 #define MX6_BM_VBUS_WAKEUP BIT(17)
71 #define MX6SX_BM_DPDM_WAKEUP_EN BIT(29)
72 #define MX6_BM_WAKEUP_INTR BIT(31)
74 #define MX6_USB_HSIC_CTRL_OFFSET 0x10
75 /* Send resume signal without 480Mhz PHY clock */
76 #define MX6SX_BM_HSIC_AUTO_RESUME BIT(23)
77 /* set before portsc.suspendM = 1 */
78 #define MX6_BM_HSIC_DEV_CONN BIT(21)
80 #define MX6_BM_HSIC_EN BIT(12)
81 /* Force HSIC module 480M clock on, even when in Host is in suspend mode */
82 #define MX6_BM_HSIC_CLK_ON BIT(11)
84 #define MX6_USB_OTG1_PHY_CTRL 0x18
85 /* For imx6dql, it is host-only controller, for later imx6, it is otg's */
86 #define MX6_USB_OTG2_PHY_CTRL 0x1c
87 #define MX6SX_USB_VBUS_WAKEUP_SOURCE(v) (v << 8)
88 #define MX6SX_USB_VBUS_WAKEUP_SOURCE_VBUS MX6SX_USB_VBUS_WAKEUP_SOURCE(0)
89 #define MX6SX_USB_VBUS_WAKEUP_SOURCE_AVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(1)
90 #define MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(2)
91 #define MX6SX_USB_VBUS_WAKEUP_SOURCE_SESS_END MX6SX_USB_VBUS_WAKEUP_SOURCE(3)
93 #define VF610_OVER_CUR_DIS BIT(7)
95 #define MX7D_USBNC_USB_CTRL2 0x4
96 #define MX7D_USB_VBUS_WAKEUP_SOURCE_MASK 0x3
97 #define MX7D_USB_VBUS_WAKEUP_SOURCE(v) (v << 0)
98 #define MX7D_USB_VBUS_WAKEUP_SOURCE_VBUS MX7D_USB_VBUS_WAKEUP_SOURCE(0)
99 #define MX7D_USB_VBUS_WAKEUP_SOURCE_AVALID MX7D_USB_VBUS_WAKEUP_SOURCE(1)
100 #define MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID MX7D_USB_VBUS_WAKEUP_SOURCE(2)
101 #define MX7D_USB_VBUS_WAKEUP_SOURCE_SESS_END MX7D_USB_VBUS_WAKEUP_SOURCE(3)
104 /* It's called once when probe a usb device */
105 int (*init
)(struct imx_usbmisc_data
*data
);
106 /* It's called once after adding a usb device */
107 int (*post
)(struct imx_usbmisc_data
*data
);
108 /* It's called when we need to enable/disable usb wakeup */
109 int (*set_wakeup
)(struct imx_usbmisc_data
*data
, bool enabled
);
110 /* It's called before setting portsc.suspendM */
111 int (*hsic_set_connect
)(struct imx_usbmisc_data
*data
);
112 /* It's called during suspend/resume */
113 int (*hsic_set_clk
)(struct imx_usbmisc_data
*data
, bool enabled
);
119 const struct usbmisc_ops
*ops
;
122 static inline bool is_imx53_usbmisc(struct imx_usbmisc_data
*data
);
124 static int usbmisc_imx25_init(struct imx_usbmisc_data
*data
)
126 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
133 spin_lock_irqsave(&usbmisc
->lock
, flags
);
134 switch (data
->index
) {
136 val
= readl(usbmisc
->base
);
137 val
&= ~(MX25_OTG_SIC_MASK
| MX25_OTG_PP_BIT
);
138 val
|= (MX25_EHCI_INTERFACE_DIFF_UNI
& MX25_EHCI_INTERFACE_MASK
) << MX25_OTG_SIC_SHIFT
;
139 val
|= (MX25_OTG_PM_BIT
| MX25_OTG_OCPOL_BIT
);
142 * If the polarity is not configured assume active high for
143 * historical reasons.
145 if (data
->oc_pol_configured
&& data
->oc_pol_active_low
)
146 val
&= ~MX25_OTG_OCPOL_BIT
;
148 writel(val
, usbmisc
->base
);
151 val
= readl(usbmisc
->base
);
152 val
&= ~(MX25_H1_SIC_MASK
| MX25_H1_PP_BIT
| MX25_H1_IPPUE_UP_BIT
);
153 val
|= (MX25_EHCI_INTERFACE_SINGLE_UNI
& MX25_EHCI_INTERFACE_MASK
) << MX25_H1_SIC_SHIFT
;
154 val
|= (MX25_H1_PM_BIT
| MX25_H1_OCPOL_BIT
| MX25_H1_TLL_BIT
|
155 MX25_H1_USBTE_BIT
| MX25_H1_IPPUE_DOWN_BIT
);
158 * If the polarity is not configured assume active high for
159 * historical reasons.
161 if (data
->oc_pol_configured
&& data
->oc_pol_active_low
)
162 val
&= ~MX25_H1_OCPOL_BIT
;
164 writel(val
, usbmisc
->base
);
168 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
173 static int usbmisc_imx25_post(struct imx_usbmisc_data
*data
)
175 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
186 spin_lock_irqsave(&usbmisc
->lock
, flags
);
187 reg
= usbmisc
->base
+ MX25_USB_PHY_CTRL_OFFSET
;
191 val
|= MX25_BM_EXTERNAL_VBUS_DIVIDER
;
193 val
&= ~MX25_BM_EXTERNAL_VBUS_DIVIDER
;
196 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
197 usleep_range(5000, 10000); /* needed to stabilize voltage */
202 static int usbmisc_imx27_init(struct imx_usbmisc_data
*data
)
204 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
208 switch (data
->index
) {
210 val
= MX27_OTG_PM_BIT
;
213 val
= MX27_H1_PM_BIT
;
216 val
= MX27_H2_PM_BIT
;
222 spin_lock_irqsave(&usbmisc
->lock
, flags
);
223 if (data
->disable_oc
)
224 val
= readl(usbmisc
->base
) | val
;
226 val
= readl(usbmisc
->base
) & ~val
;
227 writel(val
, usbmisc
->base
);
228 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
233 static int usbmisc_imx53_init(struct imx_usbmisc_data
*data
)
235 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
236 void __iomem
*reg
= NULL
;
243 /* Select a 24 MHz reference clock for the PHY */
244 val
= readl(usbmisc
->base
+ MX53_USB_OTG_PHY_CTRL_1_OFFSET
);
245 val
&= ~MX53_USB_PHYCTRL1_PLLDIV_MASK
;
246 val
|= MX53_USB_PLL_DIV_24_MHZ
;
247 writel(val
, usbmisc
->base
+ MX53_USB_OTG_PHY_CTRL_1_OFFSET
);
249 spin_lock_irqsave(&usbmisc
->lock
, flags
);
251 switch (data
->index
) {
253 if (data
->disable_oc
) {
254 reg
= usbmisc
->base
+ MX53_USB_OTG_PHY_CTRL_0_OFFSET
;
255 val
= readl(reg
) | MX53_BM_OVER_CUR_DIS_OTG
;
260 if (data
->disable_oc
) {
261 reg
= usbmisc
->base
+ MX53_USB_OTG_PHY_CTRL_0_OFFSET
;
262 val
= readl(reg
) | MX53_BM_OVER_CUR_DIS_H1
;
268 /* set USBH2 into ULPI-mode. */
269 reg
= usbmisc
->base
+ MX53_USB_CTRL_1_OFFSET
;
270 val
= readl(reg
) | MX53_USB_CTRL_1_UH2_ULPI_EN
;
271 /* select ULPI clock */
272 val
&= ~MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK
;
273 val
|= MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI
;
275 /* Set interrupt wake up enable */
276 reg
= usbmisc
->base
+ MX53_USB_UH2_CTRL_OFFSET
;
277 val
= readl(reg
) | MX53_USB_UHx_CTRL_WAKE_UP_EN
278 | MX53_USB_UHx_CTRL_ULPI_INT_EN
;
280 if (is_imx53_usbmisc(data
)) {
281 /* Disable internal 60Mhz clock */
282 reg
= usbmisc
->base
+
283 MX53_USB_CLKONOFF_CTRL_OFFSET
;
285 MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF
;
290 if (data
->disable_oc
) {
291 reg
= usbmisc
->base
+ MX53_USB_UH2_CTRL_OFFSET
;
292 val
= readl(reg
) | MX53_BM_OVER_CUR_DIS_UHx
;
298 /* set USBH3 into ULPI-mode. */
299 reg
= usbmisc
->base
+ MX53_USB_CTRL_1_OFFSET
;
300 val
= readl(reg
) | MX53_USB_CTRL_1_UH3_ULPI_EN
;
301 /* select ULPI clock */
302 val
&= ~MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK
;
303 val
|= MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI
;
305 /* Set interrupt wake up enable */
306 reg
= usbmisc
->base
+ MX53_USB_UH3_CTRL_OFFSET
;
307 val
= readl(reg
) | MX53_USB_UHx_CTRL_WAKE_UP_EN
308 | MX53_USB_UHx_CTRL_ULPI_INT_EN
;
311 if (is_imx53_usbmisc(data
)) {
312 /* Disable internal 60Mhz clock */
313 reg
= usbmisc
->base
+
314 MX53_USB_CLKONOFF_CTRL_OFFSET
;
316 MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF
;
320 if (data
->disable_oc
) {
321 reg
= usbmisc
->base
+ MX53_USB_UH3_CTRL_OFFSET
;
322 val
= readl(reg
) | MX53_BM_OVER_CUR_DIS_UHx
;
328 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
333 static int usbmisc_imx6q_set_wakeup
334 (struct imx_usbmisc_data
*data
, bool enabled
)
336 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
339 u32 wakeup_setting
= (MX6_BM_WAKEUP_ENABLE
|
340 MX6_BM_VBUS_WAKEUP
| MX6_BM_ID_WAKEUP
);
346 spin_lock_irqsave(&usbmisc
->lock
, flags
);
347 val
= readl(usbmisc
->base
+ data
->index
* 4);
349 val
|= wakeup_setting
;
351 if (val
& MX6_BM_WAKEUP_INTR
)
352 pr_debug("wakeup int at ci_hdrc.%d\n", data
->index
);
353 val
&= ~wakeup_setting
;
355 writel(val
, usbmisc
->base
+ data
->index
* 4);
356 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
361 static int usbmisc_imx6q_init(struct imx_usbmisc_data
*data
)
363 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
370 spin_lock_irqsave(&usbmisc
->lock
, flags
);
372 reg
= readl(usbmisc
->base
+ data
->index
* 4);
373 if (data
->disable_oc
) {
374 reg
|= MX6_BM_OVER_CUR_DIS
;
376 reg
&= ~MX6_BM_OVER_CUR_DIS
;
379 * If the polarity is not configured keep it as setup by the
382 if (data
->oc_pol_configured
&& data
->oc_pol_active_low
)
383 reg
|= MX6_BM_OVER_CUR_POLARITY
;
384 else if (data
->oc_pol_configured
)
385 reg
&= ~MX6_BM_OVER_CUR_POLARITY
;
387 /* If the polarity is not set keep it as setup by the bootlader */
388 if (data
->pwr_pol
== 1)
389 reg
|= MX6_BM_PWR_POLARITY
;
390 writel(reg
, usbmisc
->base
+ data
->index
* 4);
392 /* SoC non-burst setting */
393 reg
= readl(usbmisc
->base
+ data
->index
* 4);
394 writel(reg
| MX6_BM_NON_BURST_SETTING
,
395 usbmisc
->base
+ data
->index
* 4);
397 /* For HSIC controller */
399 reg
= readl(usbmisc
->base
+ data
->index
* 4);
400 writel(reg
| MX6_BM_UTMI_ON_CLOCK
,
401 usbmisc
->base
+ data
->index
* 4);
402 reg
= readl(usbmisc
->base
+ MX6_USB_HSIC_CTRL_OFFSET
403 + (data
->index
- 2) * 4);
404 reg
|= MX6_BM_HSIC_EN
| MX6_BM_HSIC_CLK_ON
;
405 writel(reg
, usbmisc
->base
+ MX6_USB_HSIC_CTRL_OFFSET
406 + (data
->index
- 2) * 4);
409 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
411 usbmisc_imx6q_set_wakeup(data
, false);
416 static int usbmisc_imx6_hsic_get_reg_offset(struct imx_usbmisc_data
*data
)
420 if (data
->index
== 2 || data
->index
== 3) {
421 offset
= (data
->index
- 2) * 4;
422 } else if (data
->index
== 0) {
424 * For SoCs like i.MX7D and later, each USB controller has
425 * its own non-core register region. For SoCs before i.MX7D,
426 * the first two USB controllers are non-HSIC controllers.
430 dev_err(data
->dev
, "index is error for usbmisc\n");
434 return ret
? ret
: offset
;
437 static int usbmisc_imx6_hsic_set_connect(struct imx_usbmisc_data
*data
)
441 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
444 spin_lock_irqsave(&usbmisc
->lock
, flags
);
445 offset
= usbmisc_imx6_hsic_get_reg_offset(data
);
447 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
451 val
= readl(usbmisc
->base
+ MX6_USB_HSIC_CTRL_OFFSET
+ offset
);
452 if (!(val
& MX6_BM_HSIC_DEV_CONN
))
453 writel(val
| MX6_BM_HSIC_DEV_CONN
,
454 usbmisc
->base
+ MX6_USB_HSIC_CTRL_OFFSET
+ offset
);
456 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
461 static int usbmisc_imx6_hsic_set_clk(struct imx_usbmisc_data
*data
, bool on
)
465 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
468 spin_lock_irqsave(&usbmisc
->lock
, flags
);
469 offset
= usbmisc_imx6_hsic_get_reg_offset(data
);
471 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
475 val
= readl(usbmisc
->base
+ MX6_USB_HSIC_CTRL_OFFSET
+ offset
);
476 val
|= MX6_BM_HSIC_EN
| MX6_BM_HSIC_CLK_ON
;
478 val
|= MX6_BM_HSIC_CLK_ON
;
480 val
&= ~MX6_BM_HSIC_CLK_ON
;
482 writel(val
, usbmisc
->base
+ MX6_USB_HSIC_CTRL_OFFSET
+ offset
);
483 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
489 static int usbmisc_imx6sx_init(struct imx_usbmisc_data
*data
)
491 void __iomem
*reg
= NULL
;
493 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
496 usbmisc_imx6q_init(data
);
498 if (data
->index
== 0 || data
->index
== 1) {
499 reg
= usbmisc
->base
+ MX6_USB_OTG1_PHY_CTRL
+ data
->index
* 4;
500 spin_lock_irqsave(&usbmisc
->lock
, flags
);
501 /* Set vbus wakeup source as bvalid */
503 writel(val
| MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID
, reg
);
505 * Disable dp/dm wakeup in device mode when vbus is
508 val
= readl(usbmisc
->base
+ data
->index
* 4);
509 writel(val
& ~MX6SX_BM_DPDM_WAKEUP_EN
,
510 usbmisc
->base
+ data
->index
* 4);
511 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
514 /* For HSIC controller */
516 val
= readl(usbmisc
->base
+ MX6_USB_HSIC_CTRL_OFFSET
);
517 val
|= MX6SX_BM_HSIC_AUTO_RESUME
;
518 writel(val
, usbmisc
->base
+ MX6_USB_HSIC_CTRL_OFFSET
);
524 static int usbmisc_vf610_init(struct imx_usbmisc_data
*data
)
526 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
530 * Vybrid only has one misc register set, but in two different
531 * areas. These is reflected in two instances of this driver.
533 if (data
->index
>= 1)
536 if (data
->disable_oc
) {
537 reg
= readl(usbmisc
->base
);
538 writel(reg
| VF610_OVER_CUR_DIS
, usbmisc
->base
);
544 static int usbmisc_imx7d_set_wakeup
545 (struct imx_usbmisc_data
*data
, bool enabled
)
547 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
550 u32 wakeup_setting
= (MX6_BM_WAKEUP_ENABLE
|
551 MX6_BM_VBUS_WAKEUP
| MX6_BM_ID_WAKEUP
);
553 spin_lock_irqsave(&usbmisc
->lock
, flags
);
554 val
= readl(usbmisc
->base
);
556 writel(val
| wakeup_setting
, usbmisc
->base
);
558 if (val
& MX6_BM_WAKEUP_INTR
)
559 dev_dbg(data
->dev
, "wakeup int\n");
560 writel(val
& ~wakeup_setting
, usbmisc
->base
);
562 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
567 static int usbmisc_imx7d_init(struct imx_usbmisc_data
*data
)
569 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
573 if (data
->index
>= 1)
576 spin_lock_irqsave(&usbmisc
->lock
, flags
);
577 reg
= readl(usbmisc
->base
);
578 if (data
->disable_oc
) {
579 reg
|= MX6_BM_OVER_CUR_DIS
;
581 reg
&= ~MX6_BM_OVER_CUR_DIS
;
584 * If the polarity is not configured keep it as setup by the
587 if (data
->oc_pol_configured
&& data
->oc_pol_active_low
)
588 reg
|= MX6_BM_OVER_CUR_POLARITY
;
589 else if (data
->oc_pol_configured
)
590 reg
&= ~MX6_BM_OVER_CUR_POLARITY
;
592 /* If the polarity is not set keep it as setup by the bootlader */
593 if (data
->pwr_pol
== 1)
594 reg
|= MX6_BM_PWR_POLARITY
;
595 writel(reg
, usbmisc
->base
);
597 reg
= readl(usbmisc
->base
+ MX7D_USBNC_USB_CTRL2
);
598 reg
&= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK
;
599 writel(reg
| MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID
,
600 usbmisc
->base
+ MX7D_USBNC_USB_CTRL2
);
602 spin_unlock_irqrestore(&usbmisc
->lock
, flags
);
604 usbmisc_imx7d_set_wakeup(data
, false);
609 static const struct usbmisc_ops imx25_usbmisc_ops
= {
610 .init
= usbmisc_imx25_init
,
611 .post
= usbmisc_imx25_post
,
614 static const struct usbmisc_ops imx27_usbmisc_ops
= {
615 .init
= usbmisc_imx27_init
,
618 static const struct usbmisc_ops imx51_usbmisc_ops
= {
619 .init
= usbmisc_imx53_init
,
622 static const struct usbmisc_ops imx53_usbmisc_ops
= {
623 .init
= usbmisc_imx53_init
,
626 static const struct usbmisc_ops imx6q_usbmisc_ops
= {
627 .set_wakeup
= usbmisc_imx6q_set_wakeup
,
628 .init
= usbmisc_imx6q_init
,
629 .hsic_set_connect
= usbmisc_imx6_hsic_set_connect
,
630 .hsic_set_clk
= usbmisc_imx6_hsic_set_clk
,
633 static const struct usbmisc_ops vf610_usbmisc_ops
= {
634 .init
= usbmisc_vf610_init
,
637 static const struct usbmisc_ops imx6sx_usbmisc_ops
= {
638 .set_wakeup
= usbmisc_imx6q_set_wakeup
,
639 .init
= usbmisc_imx6sx_init
,
640 .hsic_set_connect
= usbmisc_imx6_hsic_set_connect
,
641 .hsic_set_clk
= usbmisc_imx6_hsic_set_clk
,
644 static const struct usbmisc_ops imx7d_usbmisc_ops
= {
645 .init
= usbmisc_imx7d_init
,
646 .set_wakeup
= usbmisc_imx7d_set_wakeup
,
649 static inline bool is_imx53_usbmisc(struct imx_usbmisc_data
*data
)
651 struct imx_usbmisc
*usbmisc
= dev_get_drvdata(data
->dev
);
653 return usbmisc
->ops
== &imx53_usbmisc_ops
;
656 int imx_usbmisc_init(struct imx_usbmisc_data
*data
)
658 struct imx_usbmisc
*usbmisc
;
663 usbmisc
= dev_get_drvdata(data
->dev
);
664 if (!usbmisc
->ops
->init
)
666 return usbmisc
->ops
->init(data
);
668 EXPORT_SYMBOL_GPL(imx_usbmisc_init
);
670 int imx_usbmisc_init_post(struct imx_usbmisc_data
*data
)
672 struct imx_usbmisc
*usbmisc
;
677 usbmisc
= dev_get_drvdata(data
->dev
);
678 if (!usbmisc
->ops
->post
)
680 return usbmisc
->ops
->post(data
);
682 EXPORT_SYMBOL_GPL(imx_usbmisc_init_post
);
684 int imx_usbmisc_set_wakeup(struct imx_usbmisc_data
*data
, bool enabled
)
686 struct imx_usbmisc
*usbmisc
;
691 usbmisc
= dev_get_drvdata(data
->dev
);
692 if (!usbmisc
->ops
->set_wakeup
)
694 return usbmisc
->ops
->set_wakeup(data
, enabled
);
696 EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup
);
698 int imx_usbmisc_hsic_set_connect(struct imx_usbmisc_data
*data
)
700 struct imx_usbmisc
*usbmisc
;
705 usbmisc
= dev_get_drvdata(data
->dev
);
706 if (!usbmisc
->ops
->hsic_set_connect
|| !data
->hsic
)
708 return usbmisc
->ops
->hsic_set_connect(data
);
710 EXPORT_SYMBOL_GPL(imx_usbmisc_hsic_set_connect
);
712 int imx_usbmisc_hsic_set_clk(struct imx_usbmisc_data
*data
, bool on
)
714 struct imx_usbmisc
*usbmisc
;
719 usbmisc
= dev_get_drvdata(data
->dev
);
720 if (!usbmisc
->ops
->hsic_set_clk
|| !data
->hsic
)
722 return usbmisc
->ops
->hsic_set_clk(data
, on
);
724 EXPORT_SYMBOL_GPL(imx_usbmisc_hsic_set_clk
);
725 static const struct of_device_id usbmisc_imx_dt_ids
[] = {
727 .compatible
= "fsl,imx25-usbmisc",
728 .data
= &imx25_usbmisc_ops
,
731 .compatible
= "fsl,imx35-usbmisc",
732 .data
= &imx25_usbmisc_ops
,
735 .compatible
= "fsl,imx27-usbmisc",
736 .data
= &imx27_usbmisc_ops
,
739 .compatible
= "fsl,imx51-usbmisc",
740 .data
= &imx51_usbmisc_ops
,
743 .compatible
= "fsl,imx53-usbmisc",
744 .data
= &imx53_usbmisc_ops
,
747 .compatible
= "fsl,imx6q-usbmisc",
748 .data
= &imx6q_usbmisc_ops
,
751 .compatible
= "fsl,vf610-usbmisc",
752 .data
= &vf610_usbmisc_ops
,
755 .compatible
= "fsl,imx6sx-usbmisc",
756 .data
= &imx6sx_usbmisc_ops
,
759 .compatible
= "fsl,imx6ul-usbmisc",
760 .data
= &imx6sx_usbmisc_ops
,
763 .compatible
= "fsl,imx7d-usbmisc",
764 .data
= &imx7d_usbmisc_ops
,
768 MODULE_DEVICE_TABLE(of
, usbmisc_imx_dt_ids
);
770 static int usbmisc_imx_probe(struct platform_device
*pdev
)
772 struct resource
*res
;
773 struct imx_usbmisc
*data
;
774 const struct of_device_id
*of_id
;
776 of_id
= of_match_device(usbmisc_imx_dt_ids
, &pdev
->dev
);
780 data
= devm_kzalloc(&pdev
->dev
, sizeof(*data
), GFP_KERNEL
);
784 spin_lock_init(&data
->lock
);
786 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
787 data
->base
= devm_ioremap_resource(&pdev
->dev
, res
);
788 if (IS_ERR(data
->base
))
789 return PTR_ERR(data
->base
);
791 data
->ops
= (const struct usbmisc_ops
*)of_id
->data
;
792 platform_set_drvdata(pdev
, data
);
797 static int usbmisc_imx_remove(struct platform_device
*pdev
)
802 static struct platform_driver usbmisc_imx_driver
= {
803 .probe
= usbmisc_imx_probe
,
804 .remove
= usbmisc_imx_remove
,
806 .name
= "usbmisc_imx",
807 .of_match_table
= usbmisc_imx_dt_ids
,
811 module_platform_driver(usbmisc_imx_driver
);
813 MODULE_ALIAS("platform:usbmisc-imx");
814 MODULE_LICENSE("GPL");
815 MODULE_DESCRIPTION("driver for imx usb non-core registers");
816 MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>");