| blob | 0da68df259c8600644db989f247904822002e9b7 |
1 // SPDX-License-Identifier: GPL-2.0+
2 /* Faraday FOTG210 EHCI-like driver
3 *
4 * Copyright (c) 2013 Faraday Technology Corporation
5 *
6 * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
7 * Feng-Hsin Chiang <john453@faraday-tech.com>
8 * Po-Yu Chuang <ratbert.chuang@gmail.com>
9 *
10 * Most of code borrowed from the Linux-3.7 EHCI driver
11 */
12 #include <linux/module.h>
13 #include <linux/device.h>
14 #include <linux/dmapool.h>
15 #include <linux/kernel.h>
16 #include <linux/delay.h>
17 #include <linux/ioport.h>
18 #include <linux/sched.h>
19 #include <linux/vmalloc.h>
20 #include <linux/errno.h>
21 #include <linux/init.h>
22 #include <linux/hrtimer.h>
23 #include <linux/list.h>
24 #include <linux/interrupt.h>
25 #include <linux/usb.h>
26 #include <linux/usb/hcd.h>
27 #include <linux/moduleparam.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/debugfs.h>
30 #include <linux/slab.h>
31 #include <linux/uaccess.h>
32 #include <linux/platform_device.h>
33 #include <linux/io.h>
34 #include <linux/clk.h>
36 #include <asm/byteorder.h>
37 #include <asm/irq.h>
38 #include <asm/unaligned.h>
44 #undef FOTG210_URB_TRACE
45 #define FOTG210_STATS
47 /* magic numbers that can affect system performance */
50 #define FOTG210_TUNE_RL_TT 0
52 #define FOTG210_TUNE_MULT_TT 1
54 /* Some drivers think it's safe to schedule isochronous transfers more than 256
55 * ms into the future (partly as a result of an old bug in the scheduling
56 * code). In an attempt to avoid trouble, we will use a minimum scheduling
57 * length of 512 frames instead of 256.
58 */
61 /* Initial IRQ latency: faster than hw default */
66 /* initial park setting: slower than hw default */
71 /* for link power management(LPM) feature */
76 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
80 #define fotg210_dbg(fotg210, fmt, args...) \
81 dev_dbg(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
82 #define fotg210_err(fotg210, fmt, args...) \
83 dev_err(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
84 #define fotg210_info(fotg210, fmt, args...) \
85 dev_info(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
86 #define fotg210_warn(fotg210, fmt, args...) \
87 dev_warn(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
89 /* check the values in the HCSPARAMS register (host controller _Structural_
90 * parameters) see EHCI spec, Table 2-4 for each value
91 */
93 {
98 }
100 /* check the values in the HCCPARAMS register (host controller _Capability_
101 * parameters) see EHCI Spec, Table 2-5 for each value
102 */
104 {
108 params,
111 }
113 static void __maybe_unused
115 {
127 }
129 static void __maybe_unused
131 {
139 }
141 static void __maybe_unused
143 {
173 }
175 static int __maybe_unused
177 {
190 }
192 static int __maybe_unused
194 {
203 }
208 u32 command)
209 {
222 }
225 u32 status)
226 {
229 /* signaling state */
243 }
248 sig,
258 }
260 /* functions have the "wrong" filename when they're output... */
261 #define dbg_status(fotg210, label, status) { \
262 char _buf[80]; \
263 dbg_status_buf(_buf, sizeof(_buf), label, status); \
265 }
267 #define dbg_cmd(fotg210, label, command) { \
268 char _buf[80]; \
269 dbg_command_buf(_buf, sizeof(_buf), label, command); \
271 }
273 #define dbg_port(fotg210, label, port, status) { \
274 char _buf[80]; \
276 dbg_port_buf(_buf, sizeof(_buf), label, port, status));\
277 }
279 /* troubleshooting help: expose state in debugfs */
294 };
301 };
308 };
319 };
322 {
335 }
336 }
339 {
348 /* tries to advance through hw_alt_next */
350 }
354 {
355 u32 scratch;
356 u32 hw_curr;
367 else
375 /* else alt_next points to some other qtd */
376 }
392 /* hc may be modifying the list as we read it ... */
405 }
424 scratch,
432 }
441 done:
444 }
447 {
462 /* dumps a snapshot of the async schedule.
463 * usually empty except for long-term bulk reads, or head.
464 * one QH per line, and TDs we know about
465 */
478 }
482 }
484 /* count tds, get ep direction */
487 {
493 /* count tds, get ep direction */
495 temp++;
503 }
504 }
510 }
512 #define DBG_SCHED_LIMIT 64
514 {
522 __hc32 tag;
539 /* dump a snapshot of the periodic schedule.
540 * iso changes, interrupt usually doesn't.
541 */
564 /* uframe masks */
569 /* don't repeat what follows this qh */
578 }
580 }
581 /* show more info the first time around */
607 }
615 }
620 }
621 #undef DBG_SCHED_LIMIT
624 {
634 }
636 }
639 {
664 }
666 /* Capability Registers */
680 /* FIXME interpret both types of params */
691 /* Operational Registers */
720 }
722 #ifdef FOTG210_STATS
734 #endif
736 done:
740 }
742 static struct debug_buffer
744 {
754 }
757 }
760 {
769 }
776 }
778 out:
780 }
784 {
794 }
795 }
801 out:
804 }
807 {
813 }
816 }
818 {
822 }
825 {
835 }
838 {
840 fill_registers_buffer);
843 }
846 {
858 }
861 {
863 }
865 /* handshake - spin reading hc until handshake completes or fails
866 * @ptr: address of hc register to be read
867 * @mask: bits to look at in result of read
868 * @done: value of those bits when handshake succeeds
869 * @usec: timeout in microseconds
870 *
871 * Returns negative errno, or zero on success
872 *
873 * Success happens when the "mask" bits have the specified value (hardware
874 * handshake done). There are two failure modes: "usec" have passed (major
875 * hardware flakeout), or the register reads as all-ones (hardware removed).
876 *
877 * That last failure should_only happen in cases like physical cardbus eject
878 * before driver shutdown. But it also seems to be caused by bugs in cardbus
879 * bridge shutdown: shutting down the bridge before the devices using it.
880 */
883 {
884 u32 result;
894 usec--;
897 }
899 /* Force HC to halt state from unknown (EHCI spec section 2.3).
900 * Must be called with interrupts enabled and the lock not held.
901 */
903 {
904 u32 temp;
908 /* disable any irqs left enabled by previous code */
911 /*
912 * This routine gets called during probe before fotg210->command
913 * has been initialized, so we can't rely on its value.
914 */
925 }
927 /* Reset a non-running (STS_HALT == 1) controller.
928 * Must be called with interrupts enabled and the lock not held.
929 */
931 {
935 /* If the EHCI debug controller is active, special care must be
936 * taken before and after a host controller reset
937 */
958 }
960 /* Idle the controller (turn off the schedules).
961 * Must be called with interrupts enabled and the lock not held.
962 */
964 {
965 u32 temp;
970 /* wait for any schedule enables/disables to take effect */
975 /* then disable anything that's still active */
981 /* hardware can take 16 microframes to turn off ... */
984 }
993 /* Set a bit in the USBCMD register */
995 {
999 /* unblock posted write */
1001 }
1003 /* Clear a bit in the USBCMD register */
1005 {
1009 /* unblock posted write */
1011 }
1013 /* EHCI timer support... Now using hrtimers.
1014 *
1015 * Lots of different events are triggered from fotg210->hrtimer. Whenever
1016 * the timer routine runs, it checks each possible event; events that are
1017 * currently enabled and whose expiration time has passed get handled.
1018 * The set of enabled events is stored as a collection of bitflags in
1019 * fotg210->enabled_hrtimer_events, and they are numbered in order of
1020 * increasing delay values (ranging between 1 ms and 100 ms).
1021 *
1022 * Rather than implementing a sorted list or tree of all pending events,
1023 * we keep track only of the lowest-numbered pending event, in
1024 * fotg210->next_hrtimer_event. Whenever fotg210->hrtimer gets restarted, its
1025 * expiration time is set to the timeout value for this event.
1026 *
1027 * As a result, events might not get handled right away; the actual delay
1028 * could be anywhere up to twice the requested delay. This doesn't
1029 * matter, because none of the events are especially time-critical. The
1030 * ones that matter most all have a delay of 1 ms, so they will be
1031 * handled after 2 ms at most, which is okay. In addition to this, we
1032 * allow for an expiration range of 1 ms.
1033 */
1035 /* Delay lengths for the hrtimer event types.
1036 * Keep this list sorted by delay length, in the same order as
1037 * the event types indexed by enum fotg210_hrtimer_event in fotg210.h.
1038 */
1050 };
1052 /* Enable a pending hrtimer event */
1055 {
1062 /* Track only the lowest-numbered pending event */
1067 }
1068 }
1071 /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
1073 {
1076 /* Don't enable anything if the controller isn't running (e.g., died) */
1085 /* Poll again later, but give up after about 20 ms */
1090 }
1093 }
1096 /* The status is up-to-date; restart or stop the schedule as needed */
1104 /* Turn off the schedule after a while */
1106 FOTG210_HRTIMER_DISABLE_ASYNC,
1108 }
1109 }
1110 }
1112 /* Turn off the async schedule after a brief delay */
1114 {
1116 }
1119 /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
1121 {
1124 /* Don't do anything if the controller isn't running (e.g., died) */
1133 /* Poll again later, but give up after about 20 ms */
1138 }
1141 }
1144 /* The status is up-to-date; restart or stop the schedule as needed */
1152 /* Turn off the schedule after a while */
1154 FOTG210_HRTIMER_DISABLE_PERIODIC,
1156 }
1157 }
1158 }
1160 /* Turn off the periodic schedule after a brief delay */
1162 {
1164 }
1167 /* Poll the STS_HALT status bit; see when a dead controller stops */
1169 {
1172 /* Give up after a few milliseconds */
1174 /* Try again later */
1178 }
1180 }
1182 /* Clean up the mess */
1188 /* Not in process context, so don't try to reset the controller */
1189 }
1192 /* Handle unlinked interrupt QHs once they are gone from the hardware */
1194 {
1197 /*
1198 * Process all the QHs on the intr_unlink list that were added
1199 * before the current unlink cycle began. The list is in
1200 * temporal order, so stop when we reach the first entry in the
1201 * current cycle. But if the root hub isn't running then
1202 * process all the QHs on the list.
1203 */
1213 }
1215 /* Handle remaining entries later */
1220 }
1222 }
1225 /* Start another free-iTDs/siTDs cycle */
1227 {
1234 }
1235 }
1237 /* Wait for controller to stop using old iTDs and siTDs */
1239 {
1250 }
1254 }
1257 /* Handle lost (or very late) IAA interrupts */
1259 {
1263 /*
1264 * Lost IAA irqs wedge things badly; seen first with a vt8235.
1265 * So we need this watchdog, but must protect it against both
1266 * (a) SMP races against real IAA firing and retriggering, and
1267 * (b) clean HC shutdown, when IAA watchdog was pending.
1268 */
1272 /* If we get here, IAA is *REALLY* late. It's barely
1273 * conceivable that the system is so busy that CMD_IAAD
1274 * is still legitimately set, so let's be sure it's
1275 * clear before we read STS_IAA. (The HC should clear
1276 * CMD_IAAD when it sets STS_IAA.)
1277 */
1280 /*
1281 * If IAA is set here it either legitimately triggered
1282 * after the watchdog timer expired (_way_ late, so we'll
1283 * still count it as lost) ... or a silicon erratum:
1284 * - VIA seems to set IAA without triggering the IRQ;
1285 * - IAAD potentially cleared without setting IAA.
1286 */
1292 }
1297 }
1298 }
1301 /* Enable the I/O watchdog, if appropriate */
1303 {
1304 /* Not needed if the controller isn't running or it's already enabled */
1310 /*
1311 * Isochronous transfers always need the watchdog.
1312 * For other sorts we use it only if the flag is set.
1313 */
1318 }
1321 /* Handler functions for the hrtimer event types.
1322 * Keep this array in the same order as the event types indexed by
1323 * enum fotg210_hrtimer_event in fotg210.h.
1324 */
1336 };
1339 {
1342 ktime_t now;
1353 /*
1354 * Check each pending event. If its time has expired, handle
1355 * the event; otherwise re-enable it.
1356 */
1361 else
1363 }
1367 }
1369 #define fotg210_bus_suspend NULL
1370 #define fotg210_bus_resume NULL
1374 {
1378 /* if reset finished and it's still not enabled -- handoff */
1380 /* with integrated TT, there's nobody to hand it to! */
1383 else
1388 }
1391 /* build "status change" packet (one or two bytes) from HC registers */
1394 {
1397 u32 mask;
1401 /* init status to no-changes */
1404 /* Inform the core about resumes-in-progress by returning
1405 * a non-zero value even if there are no status changes.
1406 */
1410 /* PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND */
1412 /* no hub change reports (bit 0) for now (power, ...) */
1414 /* port N changes (bit N)? */
1419 /*
1420 * Return status information even for ports with OWNER set.
1421 * Otherwise hub_wq wouldn't see the disconnect event when a
1422 * high-speed device is switched over to the companion
1423 * controller by the user.
1424 */
1431 }
1432 /* FIXME autosuspend idle root hubs */
1435 }
1439 {
1441 u16 temp;
1451 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1458 }
1462 {
1471 /*
1472 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1473 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1474 * (track current state ourselves) ... blink for diagnostics,
1475 * power, "this is the one", etc. EHCI spec supports this.
1476 */
1484 /* no hub-wide feature/status flags */
1488 }
1493 wIndex--;
1497 /*
1498 * Even if OWNER is set, so the port is owned by the
1499 * companion controller, hub_wq needs to be able to clear
1500 * the port-change status bits (especially
1501 * USB_PORT_STAT_C_CONNECTION).
1502 */
1519 /* resume signaling for 20 msec */
1535 /* GetPortStatus clears reset */
1539 }
1544 buf);
1547 /* no hub-wide feature/status flags */
1549 /*cpu_to_le32s ((u32 *) buf); */
1554 wIndex--;
1558 /* wPortChange bits */
1568 /* whoever resumes must GetPortStatus to complete it!! */
1571 /* Remote Wakeup received? */
1573 /* resume signaling for 20 msec */
1576 /* check the port again */
1579 }
1581 /* resume completed? */
1588 /* stop resume signaling */
1592 status_reg);
1601 }
1603 }
1604 }
1606 /* whoever resets must GetPortStatus to complete it!! */
1613 /* force reset to complete */
1616 status_reg);
1617 /* REVISIT: some hardware needs 550+ usec to clear
1618 * this bit; seems too long to spin routinely...
1619 */
1626 }
1628 /* see what we found out */
1631 }
1636 }
1638 /* transfer dedicated ports to the companion hc */
1646 }
1648 /*
1649 * Even if OWNER is set, there's no harm letting hub_wq
1650 * see the wPortStatus values (they should all be 0 except
1651 * for PORT_POWER anyway).
1652 */
1657 }
1661 /* maybe the port was unsuspended without our knowledge */
1670 }
1688 /* no hub-wide feature/status flags */
1692 }
1700 wIndex--;
1709 /* After above check the port must be connected.
1710 * Set appropriate bit thus could put phy into low power
1711 * mode if we have hostpc feature
1712 */
1714 status_reg);
1720 /* line status bits may report this as low speed,
1721 * which can be fine if this root hub has a
1722 * transaction translator built in.
1723 */
1728 /*
1729 * caller must wait, then call GetPortStatus
1730 * usb 2.0 spec says 50 ms resets on root
1731 */
1737 /* For downstream facing ports (these): one hub port is put
1738 * into test mode according to USB2 11.24.2.13, then the hub
1739 * must be reset (which for root hub now means rmmod+modprobe,
1740 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
1741 * about the EHCI-specific stuff.
1742 */
1750 /* Put all enabled ports into suspend */
1755 status_reg);
1768 }
1773 error:
1774 /* "stall" on error */
1776 }
1779 }
1783 {
1785 }
1789 {
1791 }
1793 /* There's basically three types of memory:
1794 * - data used only by the HCD ... kmalloc is fine
1795 * - async and periodic schedules, shared by HC and HCD ... these
1796 * need to use dma_pool or dma_alloc_coherent
1797 * - driver buffers, read/written by HC ... single shot DMA mapped
1798 *
1799 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
1800 * No memory seen by this driver is pageable.
1801 */
1803 /* Allocate the key transfer structures from the previously allocated pool */
1806 {
1813 }
1816 gfp_t flags)
1817 {
1819 dma_addr_t dma;
1826 }
1830 {
1832 }
1836 {
1837 /* clean qtds first, and know this is not linked */
1841 }
1846 }
1849 gfp_t flags)
1850 {
1852 dma_addr_t dma;
1863 /* dummy td enables safe urb queuing */
1868 }
1869 done:
1871 fail1:
1873 fail:
1876 }
1878 /* The queue heads and transfer descriptors are managed from pools tied
1879 * to each of the "per device" structures.
1880 * This is the initialisation and cleanup code.
1881 */
1884 {
1893 /* DMA consistent memory and pools */
1909 /* shadow periodic table */
1912 }
1914 /* remember to add cleanup code (above) if you add anything here */
1916 {
1919 /* QTDs for control/bulk/intr transfers */
1928 /* QHs for control/bulk/intr transfers */
1941 /* ITD for high speed ISO transfers */
1950 /* Hardware periodic table */
1961 /* software shadow of hardware table */
1963 flags);
1967 fail:
1971 }
1972 /* EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
1973 *
1974 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
1975 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
1976 * buffers needed for the larger number). We use one QH per endpoint, queue
1977 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
1978 *
1979 * ISO traffic uses "ISO TD" (itd) records, and (along with
1980 * interrupts) needs careful scheduling. Performance improvements can be
1981 * an ongoing challenge. That's in "ehci-sched.c".
1982 *
1983 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
1984 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
1985 * (b) special fields in qh entries or (c) split iso entries. TTs will
1986 * buffer low/full speed data so the host collects it at high speed.
1987 */
1989 /* fill a qtd, returning how much of the buffer we were able to queue up */
1992 {
1996 /* one buffer entry per 4K ... first might be short or unaligned */
2006 /* per-qtd limit: from 16K to 20K (best alignment) */
2015 else
2017 }
2019 /* short packets may only terminate transfers */
2022 }
2027 }
2031 {
2034 /* writes to an active overlay are unsafe */
2040 /* Except for control endpoints, we make hardware maintain data
2041 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
2042 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
2043 * ever clear it.
2044 */
2053 }
2054 }
2057 }
2059 /* if it weren't for a common silicon quirk (writing the dummy into the qh
2060 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
2061 * recovery (including urb dequeue) would need software changes to a QH...
2062 */
2064 {
2072 /*
2073 * first qtd may already be partially processed.
2074 * If we come here during unlink, the QH overlay region
2075 * might have reference to the just unlinked qtd. The
2076 * qtd is updated in qh_completions(). Update the QH
2077 * overlay here.
2078 */
2082 }
2083 }
2087 }
2093 {
2104 }
2108 {
2110 /* If an async split transaction gets an error or is unlinked,
2111 * the TT buffer may be left in an indeterminate state. We
2112 * have to clear the TT buffer.
2113 *
2114 * Note: this routine is never called for Isochronous transfers.
2115 */
2128 }
2129 }
2130 }
2134 {
2137 /* count IN/OUT bytes, not SETUP (even short packets) */
2141 /* don't modify error codes */
2145 /* force cleanup after short read; not always an error */
2149 /* serious "can't proceed" faults reported by the hardware */
2152 /* FIXME "must" disable babbling device's port too */
2154 /* CERR nonzero + halt --> stall */
2158 /* In theory, more than one of the following bits can be set
2159 * since they are sticky and the transaction is retried.
2160 * Which to test first is rather arbitrary.
2161 */
2163 /* fs/ls interrupt xfer missed the complete-split */
2170 /* timeout, bad CRC, wrong PID, etc */
2178 }
2186 }
2189 }
2195 {
2199 /* S-mask in a QH means it's an interrupt urb */
2202 /* ... update hc-wide periodic stats (for usbfs) */
2204 }
2205 }
2210 /* report non-error and short read status as zero */
2214 }
2216 #ifdef FOTG210_URB_TRACE
2222 status,
2224 #endif
2226 /* complete() can reenter this HCD */
2231 }
2235 /* Process and free completed qtds for a qh, returning URBs to drivers.
2236 * Chases up to qh->hw_current. Returns number of completions called,
2237 * indicating how much "real" work we did.
2238 */
2241 {
2247 u8 state;
2253 /* completions (or tasks on other cpus) must never clobber HALT
2254 * till we've gone through and cleaned everything up, even when
2255 * they add urbs to this qh's queue or mark them for unlinking.
2256 *
2257 * NOTE: unlinking expects to be done in queue order.
2258 *
2259 * It's a bug for qh->qh_state to be anything other than
2260 * QH_STATE_IDLE, unless our caller is scan_async() or
2261 * scan_intr().
2262 */
2267 rescan:
2272 /* remove de-activated QTDs from front of queue.
2273 * after faults (including short reads), cleanup this urb
2274 * then let the queue advance.
2275 * if queue is stopped, handles unlinks.
2276 */
2283 /* clean up any state from previous QTD ...*/
2287 last_status);
2288 count++;
2290 }
2293 }
2295 /* ignore urbs submitted during completions we reported */
2299 /* hardware copies qtd out of qh overlay */
2303 /* always clean up qtds the hc de-activated */
2304 retry_xacterr:
2307 /* Report Data Buffer Error: non-fatal but useful */
2316 /* on STALL, error, and short reads this urb must
2317 * complete and all its qtds must be recycled.
2318 */
2321 /* retry transaction errors until we
2322 * reach the software xacterr limit
2323 */
2334 /* reset the token in the qtd and the
2335 * qh overlay (which still contains
2336 * the qtd) so that we pick up from
2337 * where we left off
2338 */
2343 token);
2346 token);
2348 }
2351 /* magic dummy for some short reads; qh won't advance.
2352 * that silicon quirk can kick in with this dummy too.
2353 *
2354 * other short reads won't stop the queue, including
2355 * control transfers (status stage handles that) or
2356 * most other single-qtd reads ... the queue stops if
2357 * URB_SHORT_NOT_OK was set so the driver submitting
2358 * the urbs could clean it up.
2359 */
2364 }
2366 /* stop scanning when we reach qtds the hc is using */
2371 /* scan the whole queue for unlinks whenever it stops */
2375 /* cancel everything if we halt, suspend, etc */
2379 /* this qtd is active; skip it unless a previous qtd
2380 * for its urb faulted, or its urb was canceled.
2381 */
2385 /* qh unlinked; token in overlay may be most current */
2391 /* An unlink may leave an incomplete
2392 * async transaction in the TT buffer.
2393 * We have to clear it.
2394 */
2396 token);
2397 }
2398 }
2400 /* unless we already know the urb's status, collect qtd status
2401 * and update count of bytes transferred. in common short read
2402 * cases with only one data qtd (including control transfers),
2403 * queue processing won't halt. but with two or more qtds (for
2404 * example, with a 32 KB transfer), when the first qtd gets a
2405 * short read the second must be removed by hand.
2406 */
2415 /* As part of low/full-speed endpoint-halt processing
2416 * we must clear the TT buffer (11.17.5).
2417 */
2420 /* The TT's in some hubs malfunction when they
2421 * receive this request following a STALL (they
2422 * stop sending isochronous packets). Since a
2423 * STALL can't leave the TT buffer in a busy
2424 * state (if you believe Figures 11-48 - 11-51
2425 * in the USB 2.0 spec), we won't clear the TT
2426 * buffer in this case. Strictly speaking this
2427 * is a violation of the spec.
2428 */
2432 }
2433 }
2435 /* if we're removing something not at the queue head,
2436 * patch the hardware queue pointer.
2437 */
2442 }
2444 /* remove qtd; it's recycled after possible urb completion */
2448 /* reinit the xacterr counter for the next qtd */
2450 }
2452 /* last urb's completion might still need calling */
2455 count++;
2457 }
2459 /* Do we need to rescan for URBs dequeued during a giveback? */
2461 /* If the QH is already unlinked, do the rescan now. */
2465 /* Otherwise we have to wait until the QH is fully unlinked.
2466 * Our caller will start an unlink if qh->needs_rescan is
2467 * set. But if an unlink has already started, nothing needs
2468 * to be done.
2469 */
2472 }
2474 /* restore original state; caller must unlink or relink */
2477 /* be sure the hardware's done with the qh before refreshing
2478 * it after fault cleanup, or recovering from silicon wrongly
2479 * overlaying the dummy qtd (which reduces DMA chatter).
2480 */
2487 /* We won't refresh a QH that's linked (after the HC
2488 * stopped the queue). That avoids a race:
2489 * - HC reads first part of QH;
2490 * - CPU updates that first part and the token;
2491 * - HC reads rest of that QH, including token
2492 * Result: HC gets an inconsistent image, and then
2493 * DMAs to/from the wrong memory (corrupting it).
2494 *
2495 * That should be rare for interrupt transfers,
2496 * except maybe high bandwidth ...
2497 */
2499 /* Tell the caller to start an unlink */
2502 /* otherwise, unlink already started */
2503 }
2504 }
2507 }
2509 /* high bandwidth multiplier, as encoded in highspeed endpoint descriptors */
2510 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
2511 /* ... and packet size, for any kind of endpoint descriptor */
2512 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
2514 /* reverse of qh_urb_transaction: free a list of TDs.
2515 * used for cleanup after errors, before HC sees an URB's TDs.
2516 */
2519 {
2525 }
2526 }
2528 /* create a list of filled qtds for this URB; won't link into qh.
2529 */
2532 {
2534 dma_addr_t buf;
2537 u32 token;
2541 /*
2542 * URBs map to sequences of QTDs: one logical transaction
2543 */
2552 /* for split transactions, SplitXState initialized to zero */
2557 /* SETUP pid */
2562 /* ... and always at least one more pid */
2572 /* for zero length DATA stages, STATUS is always IN */
2575 }
2577 /*
2578 * data transfer stage: buffer setup
2579 */
2585 /* urb->transfer_buffer_length may be smaller than the
2586 * size of the scatterlist (or vice versa)
2587 */
2593 }
2597 /* else it's already initted to "out" pid (0 << 8) */
2601 /*
2602 * buffer gets wrapped in one or more qtds;
2603 * last one may be "short" (including zero len)
2604 * and may serve as a control status ack
2605 */
2610 maxpacket);
2615 /*
2616 * short reads advance to a "magic" dummy instead of the next
2617 * qtd ... that forces the queue to stop, for manual cleanup.
2618 * (this will usually be overridden later.)
2619 */
2623 /* qh makes control packets use qtd toggle; maybe switch it */
2633 }
2642 }
2644 /*
2645 * unless the caller requires manual cleanup after short reads,
2646 * have the alt_next mechanism keep the queue running after the
2647 * last data qtd (the only one, for control and most other cases).
2648 */
2653 /*
2654 * control requests may need a terminating data "status" ack;
2655 * other OUT ones may need a terminating short packet
2656 * (zero length).
2657 */
2669 }
2679 /* never any data in such packets */
2681 }
2682 }
2684 /* by default, enable interrupt on urb completion */
2689 cleanup:
2692 }
2694 /* Would be best to create all qh's from config descriptors,
2695 * when each interface/altsetting is established. Unlink
2696 * any previous qh and cancel its urbs first; endpoints are
2697 * implicitly reset then (data toggle too).
2698 * That'd mean updating how usbcore talks to HCDs. (2.7?)
2699 */
2702 /* Each QH holds a qtd list; a QH is used for everything except iso.
2703 *
2704 * For interrupt urbs, the scheduler must set the microframe scheduling
2705 * mask(s) each time the QH gets scheduled. For highspeed, that's
2706 * just one microframe in the s-mask. For split interrupt transactions
2707 * there are additional complications: c-mask, maybe FSTNs.
2708 */
2710 gfp_t flags)
2711 {
2722 /*
2723 * init endpoint/device data for this QH
2724 */
2732 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
2733 * acts like up to 3KB, but is built from smaller packets.
2734 */
2739 }
2741 /* Compute interrupt scheduling parameters just once, and save.
2742 * - allowing for high bandwidth, how many nsec/uframe are used?
2743 * - split transactions need a second CSPLIT uframe; same question
2744 * - splits also need a schedule gap (for full/low speed I/O)
2745 * - qh has a polling interval
2746 *
2747 * For control/bulk requests, the HC or TT handles these.
2748 */
2761 /* NOTE interval 2 or 4 uframes could work.
2762 * But interval 1 scheduling is simpler, and
2763 * includes high bandwidth.
2764 */
2769 }
2773 /* gap is f(FS/LS transfer times) */
2777 /* FIXME this just approximates SPLIT/CSPLIT times */
2784 }
2794 }
2795 }
2796 }
2798 /* support for tt scheduling, and access to toggles */
2801 /* using TT? */
2805 /* FALL THROUGH */
2808 /* EPS 0 means "full" */
2814 }
2819 /* Some Freescale processors have an erratum in which the
2820 * port number in the queue head was 0..N-1 instead of 1..N.
2821 */
2824 else
2827 /* set the address of the TT; for TDI's integrated
2828 * root hub tt, leave it zeroed.
2829 */
2833 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
2846 /* The USB spec says that high speed bulk endpoints
2847 * always use 512 byte maxpacket. But some device
2848 * vendors decided to ignore that, and MSFT is happy
2849 * to help them do so. So now people expect to use
2850 * such nonconformant devices with Linux too; sigh.
2851 */
2857 }
2862 done:
2865 }
2867 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
2869 /* init as live, toggle clear, advance to dummy */
2878 }
2881 {
2885 /* Stop waiting to turn off the async schedule */
2888 /* Don't start the schedule until ASS is 0 */
2891 }
2894 {
2898 /* The async schedule and async_unlink list are supposed to be empty */
2901 /* Don't turn off the schedule until ASS is 1 */
2903 }
2905 /* move qh (and its qtds) onto async queue; maybe enable queue. */
2908 {
2912 /* Don't link a QH if there's a Clear-TT-Buffer pending */
2918 /* clear halt and/or toggle; and maybe recover from silicon quirk */
2921 /* splice right after start */
2932 /* qtd completions reported later by interrupt */
2935 }
2937 /* For control/bulk/interrupt, return QH with these TDs appended.
2938 * Allocates and initializes the QH if necessary.
2939 * Returns null if it can't allocate a QH it needs to.
2940 * If the QH has TDs (urbs) already, that's great.
2941 */
2945 {
2951 /* can't sleep here, we have fotg210->lock... */
2954 }
2960 else
2962 qtd_list);
2964 /* control qh may need patching ... */
2966 /* usb_reset_device() briefly reverts to address 0 */
2969 }
2971 /* just one way to queue requests: swap with the dummy qtd.
2972 * only hc or qh_refresh() ever modify the overlay.
2973 */
2976 dma_addr_t dma;
2977 __hc32 token;
2979 /* to avoid racing the HC, use the dummy td instead of
2980 * the first td of our list (becomes new dummy). both
2981 * tds stay deactivated until we're done, when the
2982 * HC is allowed to fetch the old dummy (4.10.2).
2983 */
3000 /* hc must see the new dummy at list end */
3006 /* let the hc process these next qtds */
3011 }
3012 }
3014 }
3018 {
3026 #ifdef FOTG210_URB_TRACE
3027 {
3038 }
3039 #endif
3045 }
3055 }
3057 /* Control/bulk operations through TTs don't need scheduling,
3058 * the HC and TT handle it when the TT has a buffer ready.
3059 */
3062 done:
3067 }
3071 {
3074 /* Add to the end of the list of QHs waiting for the next IAAD */
3078 else
3082 /* Unlink it from the schedule */
3091 }
3094 {
3095 /*
3096 * Do nothing if an IAA cycle is already running or
3097 * if one will be started shortly.
3098 */
3102 /* Do all the waiting QHs at once */
3106 /* If the controller isn't running, we don't have to wait for it */
3111 /* Otherwise start a new IAA cycle */
3113 /* Make sure the unlinks are all visible to the hardware */
3121 }
3122 }
3124 /* the async qh for the qtds being unlinked are now gone from the HC */
3127 {
3130 /* Process the idle QHs */
3131 restart:
3146 }
3149 /* Start a new IAA cycle if any QHs are waiting for it */
3154 }
3155 }
3158 {
3163 /* Unlink all the async QHs that have been empty for a timer cycle */
3174 else
3176 }
3177 }
3179 /* Start a new IAA cycle if any QHs are waiting for it */
3183 /* QHs that haven't been empty for long enough will be handled later */
3188 }
3189 }
3191 /* makes sure the async qh will become idle */
3192 /* caller must own fotg210->lock */
3196 {
3197 /*
3198 * If the QH isn't linked then there's nothing we can do
3199 * unless we were called during a giveback, in which case
3200 * qh_completions() has to deal with it.
3201 */
3206 }
3210 }
3213 {
3221 rescan:
3222 /* clean any finished work for this qh */
3226 /*
3227 * Unlinks could happen here; completion reporting
3228 * drops the lock. That's why fotg210->qh_scan_next
3229 * always holds the next qh to scan; if the next qh
3230 * gets unlinked then fotg210->qh_scan_next is adjusted
3231 * in single_unlink_async().
3232 */
3242 }
3243 }
3245 /*
3246 * Unlink empty entries, reducing DMA usage as well
3247 * as HCD schedule-scanning costs. Delay for any qh
3248 * we just scanned, there's a not-unusual case that it
3249 * doesn't stay idle for long.
3250 */
3257 }
3258 }
3259 /* EHCI scheduled transaction support: interrupt, iso, split iso
3260 * These are called "periodic" transactions in the EHCI spec.
3261 *
3262 * Note that for interrupt transfers, the QH/QTD manipulation is shared
3263 * with the "asynchronous" transaction support (control/bulk transfers).
3264 * The only real difference is in how interrupt transfers are scheduled.
3265 *
3266 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
3267 * It keeps track of every ITD (or SITD) that's linked, and holds enough
3268 * pre-calculated schedule data to make appending to the queue be quick.
3269 */
3272 /* periodic_next_shadow - return "next" pointer on shadow list
3273 * @periodic: host pointer to qh/itd
3274 * @tag: hardware tag for type of this record
3275 */
3278 {
3286 }
3287 }
3291 {
3293 /* our fotg210_shadow.qh is actually software part */
3296 /* others are hw parts */
3299 }
3300 }
3302 /* caller must hold fotg210->lock */
3305 {
3310 /* find predecessor of "ptr"; hw and shadow lists are in sync */
3317 }
3318 /* an interrupt entry (at list end) could have been shared */
3322 /* update shadow and hardware lists ... the old "next" pointers
3323 * from ptr may still be in use, the caller updates them.
3324 */
3330 }
3332 /* how many of the uframe's 125 usecs are allocated? */
3335 {
3345 /* is it in the S-mask? */
3348 /* ... or C-mask? */
3355 /* case Q_TYPE_FSTN: */
3357 /* for "save place" FSTNs, count the relevant INTR
3358 * bandwidth from the previous frame
3359 */
3372 }
3373 }
3378 }
3381 {
3388 else
3390 }
3392 /* return true iff the device's transaction translator is available
3393 * for a periodic transfer starting at the specified frame, using
3394 * all the uframes in the mask.
3395 */
3398 {
3402 /* note bandwidth wastage: split never follows csplit
3403 * (different dev or endpoint) until the next uframe.
3404 * calling convention doesn't make that distinction.
3405 */
3408 __hc32 type;
3422 u32 mask;
3426 /* "knows" no gap is needed */
3430 }
3434 /* case Q_TYPE_FSTN: */
3439 }
3441 /* collision or error */
3443 }
3444 }
3446 /* no collision */
3448 }
3451 {
3455 /* Stop waiting to turn off the periodic schedule */
3459 /* Don't start the schedule until PSS is 0 */
3462 }
3465 {
3469 /* Don't turn off the schedule until PSS is 1 */
3471 }
3473 /* periodic schedule slots have iso tds (normal or split) first, then a
3474 * sparse tree for active interrupt transfers.
3475 *
3476 * this just links in a qh; caller guarantees uframe masks are set right.
3477 * no FSTN support (yet; fotg210 0.96+)
3478 */
3480 {
3490 /* high bandwidth, or otherwise every microframe */
3500 /* skip the iso nodes at list head */
3508 }
3510 /* sorting each branch by period (slow-->fast)
3511 * enables sharing interior tree nodes
3512 */
3519 }
3520 /* link in this qh, unless some earlier pass did that */
3528 }
3529 }
3533 /* update per-qh bandwidth for usbfs */
3540 /* maybe enable periodic schedule processing */
3543 }
3547 {
3551 /*
3552 * If qh is for a low/full-speed device, simply unlinking it
3553 * could interfere with an ongoing split transaction. To unlink
3554 * it safely would require setting the QH_INACTIVATE bit and
3555 * waiting at least one frame, as described in EHCI 4.12.2.5.
3556 *
3557 * We won't bother with any of this. Instead, we assume that the
3558 * only reason for unlinking an interrupt QH while the current URB
3559 * is still active is to dequeue all the URBs (flush the whole
3560 * endpoint queue).
3561 *
3562 * If rebalancing the periodic schedule is ever implemented, this
3563 * approach will no longer be valid.
3564 */
3566 /* high bandwidth, or otherwise part of every microframe */
3574 /* update per-qh bandwidth for usbfs */
3585 /* qh->qh_next still "live" to HC */
3593 }
3597 {
3598 /* If the QH isn't linked then there's nothing we can do
3599 * unless we were called during a giveback, in which case
3600 * qh_completions() has to deal with it.
3601 */
3606 }
3610 /* Make sure the unlinks are visible before starting the timer */
3613 /*
3614 * The EHCI spec doesn't say how long it takes the controller to
3615 * stop accessing an unlinked interrupt QH. The timer delay is
3616 * 9 uframes; presumably that will be long enough.
3617 */
3620 /* New entries go at the end of the intr_unlink list */
3623 else
3635 }
3636 }
3639 {
3648 /* reschedule QH iff another request is queued */
3653 /* An error here likely indicates handshake failure
3654 * or no space left in the schedule. Neither fault
3655 * should happen often ...
3656 *
3657 * FIXME kill the now-dysfunctional queued urbs
3658 */
3662 }
3664 /* maybe turn off periodic schedule */
3667 }
3671 {
3674 /* complete split running into next frame?
3675 * given FSTN support, we could sometimes check...
3676 */
3680 /* convert "usecs we need" to "max already claimed" */
3683 /* we "know" 2 and 4 uframe intervals were rejected; so
3684 * for period 0, check _every_ microframe in the schedule.
3685 */
3690 uframe);
3693 }
3696 /* just check the specified uframe, at that period */
3703 }
3705 /* success! */
3707 }
3711 {
3724 }
3726 /* Make sure this tt's buffer is also available for CSPLITs.
3727 * We pessimize a bit; probably the typical full speed case
3728 * doesn't need the second CSPLIT.
3729 *
3730 * NOTE: both SPLIT and CSPLIT could be checked in just
3731 * one smart pass...
3732 */
3745 }
3746 done:
3748 }
3750 /* "first fit" scheduling policy used the first time through,
3751 * or when the previous schedule slot can't be re-used.
3752 */
3754 {
3757 __hc32 c_mask;
3765 /* reuse the previous schedule slots, if we can */
3774 }
3776 /* else scan the schedule to find a group of slots such that all
3777 * uframes have enough periodic bandwidth available.
3778 */
3780 /* "normal" case, uframing flexible except with splits */
3792 }
3793 }
3795 /* qh->period == 0 means every uframe */
3800 }
3805 /* reset S-frame and (maybe) C-frame masks */
3814 /* stuff into the periodic schedule */
3816 done:
3818 }
3822 {
3829 /* get endpoint and transfer/schedule data */
3837 }
3842 /* get qh and force any scheduling errors */
3848 }
3853 }
3855 /* then queue the urb's tds to the qh */
3859 /* ... update usbfs periodic stats */
3862 done:
3865 done_not_linked:
3871 }
3874 {
3879 rescan:
3880 /* clean any finished work for this qh */
3884 /*
3885 * Unlinks could happen here; completion reporting
3886 * drops the lock. That's why fotg210->qh_scan_next
3887 * always holds the next qh to scan; if the next qh
3888 * gets unlinked then fotg210->qh_scan_next is adjusted
3889 * in qh_unlink_periodic().
3890 */
3898 }
3899 }
3900 }
3902 /* fotg210_iso_stream ops work with both ITD and SITD */
3905 {
3913 }
3915 }
3920 {
3921 u32 buf1;
3927 /*
3928 * this might be a "high bandwidth" highspeed endpoint,
3929 * as encoded in the ep descriptor's wMaxPacket field
3930 */
3936 else
3948 /* usbfs wants to report the average usecs per frame tied up
3949 * when transfers on this endpoint are scheduled ...
3950 */
3959 }
3968 }
3972 {
3981 else
3994 }
3996 /* if dev->ep[epnum] is a QH, hw is set */
4002 }
4006 }
4008 /* fotg210_iso_sched ops can be ITD-only or SITD-only */
4011 gfp_t mem_flags)
4012 {
4022 }
4027 {
4031 /* how many uframes are needed for these transfers */
4034 /* figure out per-uframe itd fields that we'll need later
4035 * when we fit new itds into the schedule.
4036 */
4040 dma_addr_t buf;
4041 u32 trans;
4054 /* might need to cross a buffer page within a uframe */
4059 }
4060 }
4064 {
4067 /* caller must hold fotg210->lock!*/
4070 }
4074 {
4076 dma_addr_t itd_dma;
4090 else
4093 /* allocate/init ITDs */
4097 /*
4098 * Use iTDs from the free list, but not iTDs that may
4099 * still be in use by the hardware.
4100 */
4109 alloc_itd:
4118 }
4119 }
4123 }
4126 /* temporarily store schedule info in hcpriv */
4130 }
4134 {
4137 /* can't commit more than uframe_periodic_max usec */
4142 /* we know urb->interval is 2^N uframes */
4146 }
4148 /* This scheduler plans almost as far into the future as it has actual
4149 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
4150 * "as small as possible" to be cache-friendlier.) That limits the size
4151 * transfers you can stream reliably; avoid more than 64 msec per urb.
4152 * Also avoid queue depths of less than fotg210's worst irq latency (affected
4153 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
4154 * and other factors); or more than about 230 msec total (for portability,
4155 * given FOTG210_TUNE_FLS and the slop). Or, write a smarter scheduler!
4156 */
4162 {
4175 }
4179 /* Typical case: reuse current schedule, stream is still active.
4180 * Hopefully there are no gaps from the host falling behind
4181 * (irq delays etc), but if there are we'll take the next
4182 * slot in the schedule, implicitly assuming URB_ISO_ASAP.
4183 */
4185 u32 excess;
4187 /* For high speed devices, allow scheduling within the
4188 * isochronous scheduling threshold. For full speed devices
4189 * and Intel PCI-based controllers, don't (work around for
4190 * Intel ICH9 bug).
4191 */
4194 else
4197 /* Fell behind (by up to twice the slop amount)?
4198 * We decide based on the time of the last currently-scheduled
4199 * slot, not the time of the next available slot.
4200 */
4205 else
4210 mod);
4213 }
4214 }
4216 /* need to schedule; when's the next (u)frame we could start?
4217 * this is bigger than fotg210->i_thresh allows; scheduling itself
4218 * isn't free, the slop should handle reasonably slow cpus. it
4219 * can also help high bandwidth if the dma and irq loads don't
4220 * jump until after the queue is primed.
4221 */
4227 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
4229 /* find a uframe slot with enough bandwidth.
4230 * Early uframes are more precious because full-speed
4231 * iso IN transfers can't use late uframes,
4232 * and therefore they should be allocated last.
4233 */
4237 start--;
4238 /* check schedule: enough space? */
4244 /* no room in the schedule */
4250 }
4251 }
4253 /* Tried to schedule too far into the future? */
4261 }
4265 /* report high speed start in uframes; full speed, in frames */
4270 /* Make sure scan_isoc() sees these */
4275 fail:
4279 }
4283 {
4286 /* it's been recently zeroed */
4295 /* All other fields are filled when scheduling */
4296 }
4301 {
4313 /* iso_frame_desc[].offset must be strictly increasing */
4320 }
4321 }
4325 {
4331 /* skip any iso nodes which might belong to previous microframes */
4339 }
4347 }
4349 /* fit urb's itds into the selected schedule slot; activate as needed */
4352 {
4369 }
4371 /* fill iTDs uframe by uframe */
4374 /* ASSERT: we have all necessary itds */
4376 /* ASSERT: no itds for this endpoint in this uframe */
4384 }
4393 packet++;
4395 /* link completed itds into the schedule */
4399 itd);
4401 }
4402 }
4405 /* don't need that schedule data any more */
4411 }
4413 #define ISO_ERRS (FOTG210_ISOC_BUF_ERR | FOTG210_ISOC_BABBLE |\
4414 FOTG210_ISOC_XACTERR)
4416 /* Process and recycle a completed ITD. Return true iff its urb completed,
4417 * and hence its completion callback probably added things to the hardware
4418 * schedule.
4419 *
4420 * Note that we carefully avoid recycling this descriptor until after any
4421 * completion callback runs, so that it won't be reused quickly. That is,
4422 * assuming (a) no more than two urbs per frame on this endpoint, and also
4423 * (b) only this endpoint's completions submit URBs. It seems some silicon
4424 * corrupts things if you reuse completed descriptors very quickly...
4425 */
4427 {
4430 u32 t;
4437 /* for each uframe with a packet */
4447 /* report transfer status */
4459 /* HC need not update length with this error */
4464 }
4470 /* URB was too late */
4472 }
4473 }
4475 /* handle completion now? */
4479 /* ASSERT: it's really the last itd for this urb
4480 * list_for_each_entry (itd, &stream->td_list, itd_list)
4481 * BUG_ON (itd->urb == urb);
4482 */
4484 /* give urb back to the driver; completion often (re)submits */
4500 }
4502 done:
4505 /* Add to the end of the free list for later reuse */
4508 /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
4513 }
4516 }
4519 gfp_t mem_flags)
4520 {
4525 /* Get iso_stream head */
4530 }
4533 USB_PORT_STAT_HIGH_SPEED)) {
4537 }
4539 #ifdef FOTG210_URB_TRACE
4547 stream);
4548 #endif
4550 /* allocate ITDs w/o locking anything */
4555 }
4557 /* schedule ... need to lock */
4562 }
4569 else
4571 done_not_linked:
4573 done:
4575 }
4579 {
4585 /* scan each element in frame's queue for completions */
4595 /* If this ITD is still active, leave it for
4596 * later processing ... check the next entry.
4597 * No need to check for activity unless the
4598 * frame is current.
4599 */
4606 }
4614 }
4615 }
4617 /* Take finished ITDs out of the schedule
4618 * and process them: recycle, maybe report
4619 * URB completion. HC won't cache the
4620 * pointer for much longer, if at all.
4621 */
4632 /* FALL THROUGH */
4635 /* End of the iTDs and siTDs */
4638 }
4640 /* assume completion callbacks modify the queue */
4643 }
4645 }
4648 {
4653 /*
4654 * When running, scan from last scan point up to "now"
4655 * else clean up by scanning everything that's left.
4656 * Touches as few pages as possible: cache-friendly.
4657 */
4665 }
4675 /* Stop when we have reached the current frame */
4679 }
4681 }
4683 /* Display / Set uframe_periodic_max
4684 */
4687 {
4694 }
4699 {
4705 ssize_t ret;
4713 uframe_periodic_max);
4715 }
4719 /*
4720 * lock, so that our checking does not race with possible periodic
4721 * bandwidth allocation through submitting new urbs.
4722 */
4725 /*
4726 * for request to decrease max periodic bandwidth, we have to check
4727 * every microframe in the schedule to see whether the decrease is
4728 * possible.
4729 */
4737 uframe));
4741 "cannot decrease uframe_periodic_max because periodic bandwidth is already allocated (%u > %u)\n",
4744 }
4745 }
4747 /* increasing is always ok */
4759 out_unlock:
4762 }
4767 {
4771 }
4774 {
4778 }
4779 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
4780 * The firmware seems to think that powering off is a wakeup event!
4781 * This routine turns off remote wakeup and everything else, on all ports.
4782 */
4784 {
4788 }
4790 /* Halt HC, turn off all ports, and let the BIOS use the companion controllers.
4791 * Must be called with interrupts enabled and the lock not held.
4792 */
4794 {
4801 }
4803 /* fotg210_shutdown kick in for silicon on any bus (not just pci, etc).
4804 * This forcibly disables dma and IRQs, helping kexec and other cases
4805 * where the next system software may expect clean state.
4806 */
4808 {
4820 }
4822 /* fotg210_work is called from some interrupts, timers, and so on.
4823 * it calls driver completion functions, after dropping fotg210->lock.
4824 */
4826 {
4827 /* another CPU may drop fotg210->lock during a schedule scan while
4828 * it reports urb completions. this flag guards against bogus
4829 * attempts at re-entrant schedule scanning.
4830 */
4834 }
4837 rescan:
4849 /* the IO watchdog guards against hardware or driver bugs that
4850 * misplace IRQs, and should let us run completely without IRQs.
4851 * such lossage has been observed on both VT6202 and VT8235.
4852 */
4854 }
4856 /* Called when the fotg210_hcd module is removed.
4857 */
4859 {
4864 /* no more interrupts ... */
4878 /* root hub is shut down separately (first, when possible) */
4884 #ifdef FOTG210_STATS
4890 #endif
4894 }
4896 /* one-time init, only for memory state */
4898 {
4900 u32 temp;
4902 u32 hcc_params;
4907 /*
4908 * keep io watchdog by default, those good HCDs could turn off it later
4909 */
4918 /*
4919 * by default set standard 80% (== 100 usec/uframe) max periodic
4920 * bandwidth as required by USB 2.0
4921 */
4924 /*
4925 * hw default: 1K periodic list heads, one per frame.
4926 * periodic_size can shrink by USBCMD update if hcc_params allows.
4927 */
4933 /* periodic schedule size can be smaller than default */
4946 }
4947 }
4952 /* controllers may cache some of the periodic schedule ... */
4955 /*
4956 * dedicate a qh for the async ring head, since we couldn't unlink
4957 * a 'real' qh without stopping the async schedule [4.8]. use it
4958 * as the 'reclamation list head' too.
4959 * its dummy is used in hw_alt_next of many tds, to prevent the qh
4960 * from automatically advancing to the next td after short reads.
4961 */
4971 /* clear interrupt enables, set irq latency */
4976 /* HW default park == 3, on hardware that supports it (like
4977 * NVidia and ALI silicon), maximizes throughput on the async
4978 * schedule by avoiding QH fetches between transfers.
4979 *
4980 * With fast usb storage devices and NForce2, "park" seems to
4981 * make problems: throughput reduction (!), data errors...
4982 */
4987 }
4989 }
4991 /* periodic schedule size can be smaller than default */
4994 }
4997 /* Accept arbitrarily long scatter-gather lists */
5001 }
5003 /* start HC running; it's halted, hcd_fotg210_init() has been run (once) */
5005 {
5007 u32 temp;
5008 u32 hcc_params;
5012 /* EHCI spec section 4.1 */
5019 /*
5020 * hcc_params controls whether fotg210->regs->segment must (!!!)
5021 * be used; it constrains QH/ITD/SITD and QTD locations.
5022 * dma_pool consistent memory always uses segment zero.
5023 * streaming mappings for I/O buffers, like pci_map_single(),
5024 * can return segments above 4GB, if the device allows.
5025 *
5026 * NOTE: the dma mask is visible through dev->dma_mask, so
5027 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
5028 * Scsi_Host.highmem_io, and so forth. It's readonly to all
5029 * host side drivers though.
5030 */
5033 /*
5034 * Philips, Intel, and maybe others need CMD_RUN before the
5035 * root hub will detect new devices (why?); NEC doesn't
5036 */
5042 /*
5043 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
5044 * are explicitly handed to companion controller(s), so no TT is
5045 * involved with the root hub. (Except where one is integrated,
5046 * and there's no companion controller unless maybe for USB OTG.)
5047 *
5048 * Turning on the CF flag will transfer ownership of all ports
5049 * from the companions to the EHCI controller. If any of the
5050 * companions are in the middle of a port reset at the time, it
5051 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
5052 * guarantees that no resets are in progress. After we set CF,
5053 * a short delay lets the hardware catch up; new resets shouldn't
5054 * be started before the port switching actions could complete.
5055 */
5058 /* unblock posted writes */
5074 /* GRR this is run-once init(), being done every time the HC starts.
5075 * So long as they're part of class devices, we can't do it init()
5076 * since the class device isn't created that early.
5077 */
5082 }
5085 {
5095 /* cache this readonly data; minimize chip reads */
5101 /* data structure init */
5113 }
5116 {
5125 /* e.g. cardbus physical eject */
5129 }
5131 /*
5132 * We don't use STS_FLR, but some controllers don't like it to
5133 * remain on, so mask it out along with the other status bits.
5134 */
5137 /* Shared IRQ? */
5142 }
5144 /* clear (just) interrupts */
5149 /* unrequested/ignored: Frame List Rollover */
5152 /* INT, ERR, and IAA interrupt rates can be throttled */
5154 /* normal [4.15.1.2] or error [4.15.1.1] completion */
5158 else
5161 }
5163 /* complete the unlinking of some qh [4.15.2.3] */
5166 /* Turn off the IAA watchdog */
5170 /*
5171 * Mild optimization: Allow another IAAD to reset the
5172 * hrtimer, if one occurs before the next expiration.
5173 * In theory we could always cancel the hrtimer, but
5174 * tests show that about half the time it will be reset
5175 * for some other event anyway.
5176 */
5180 /* guard against (alleged) silicon errata */
5188 }
5190 /* remote wakeup [4.3.1] */
5195 /* kick root hub later */
5198 /* resume root hub? */
5210 /* start 20 msec resume signaling from this port,
5211 * and make hub_wq collect PORT_STAT_C_SUSPEND to
5212 * stop that signaling. Use 5 ms extra for safety,
5213 * like usb_port_resume() does.
5214 */
5219 }
5220 }
5222 /* PCI errors [4.15.2.4] */
5227 dead:
5230 /* Don't let the controller do anything more */
5239 /* Handle completions when the controller stops */
5241 }
5249 }
5251 /* non-error returns are a promise to giveback() the urb later
5252 * we drop ownership so next owner (or urb unlink) can get it
5253 *
5254 * urb + dev is in hcd.self.controller.urb_list
5255 * we're queueing TDs onto software and hardware lists
5256 *
5257 * hcd-specific init for hcpriv hasn't been done yet
5258 *
5259 * NOTE: control, bulk, and interrupt share the same code to append TDs
5260 * to a (possibly active) QH, and the same QH scanning code.
5261 */
5263 gfp_t mem_flags)
5264 {
5272 /* qh_completions() code doesn't handle all the fault cases
5273 * in multi-TD control transfers. Even 1KB is rare anyway.
5274 */
5277 /* FALLTHROUGH */
5278 /* case PIPE_BULK: */
5291 }
5292 }
5294 /* remove from hardware lists
5295 * completions normally happen asynchronously
5296 */
5299 {
5311 /* case PIPE_CONTROL: */
5312 /* case PIPE_BULK:*/
5324 /* already started */
5327 /* QH might be waiting for a Clear-TT-Buffer */
5330 }
5349 }
5353 /* itd... */
5355 /* wait till next completion, do it then. */
5356 /* completion irqs can wait up to 1024 msec, */
5358 }
5359 done:
5362 }
5364 /* bulk qh holds the data toggle */
5368 {
5373 /* ASSERT: any requests/urbs are being unlinked */
5374 /* ASSERT: nobody can be submitting urbs for this any more */
5376 rescan:
5382 /* endpoints can be iso streams. for now, we don't
5383 * accelerate iso completions ... so spin a while.
5384 */
5391 /* BUG_ON(!list_empty(&stream->free_list)); */
5394 }
5405 /* periodic qh self-unlinks on empty, and a COMPLETING qh
5406 * may already be unlinked.
5407 */
5410 /* FALL THROUGH */
5413 idle_timeout:
5423 }
5424 /* fall through */
5426 /* caller was supposed to have unlinked any requests;
5427 * that's not our job. just leak this memory.
5428 */
5433 }
5434 done:
5437 }
5441 {
5455 /* For Bulk and Interrupt endpoints we maintain the toggle state
5456 * in the hardware; the toggle bits in udev aren't used at all.
5457 * When an endpoint is reset by usb_clear_halt() we must reset
5458 * the toggle bit in the QH.
5459 */
5467 /* The toggle value in the QH can't be updated
5468 * while the QH is active. Unlink it now;
5469 * re-linking will call qh_refresh().
5470 */
5473 else
5475 }
5476 }
5478 }
5481 {
5486 }
5488 /* The EHCI in ChipIdea HDRC cannot be a separate module or device,
5489 * because its registers (and irq) are shared between host/gadget/otg
5490 * functions and in order to facilitate role switching we cannot
5491 * give the fotg210 driver exclusive access to those.
5492 */
5502 /*
5503 * generic hardware linkage
5504 */
5508 /*
5509 * basic lifecycle operations
5510 */
5516 /*
5517 * managing i/o requests and associated device resources
5518 */
5524 /*
5525 * scheduling support
5526 */
5529 /*
5530 * root hub support
5531 */
5541 };
5544 {
5545 u32 value;
5554 }
5556 /**
5557 * fotg210_hcd_probe - initialize faraday FOTG210 HCDs
5558 *
5559 * Allocates basic resources for this USB host controller, and
5560 * then invokes the start() method for the HCD associated with it
5561 * through the hotplug entry's driver_data.
5562 */
5564 {
5582 }
5592 }
5601 }
5610 /* It's OK not to supply this clock */
5617 }
5619 /*
5620 * Percolate deferrals, for anything else,
5621 * just live without the clocking.
5622 */
5625 }
5637 }
5643 failed_dis_clk:
5646 failed_put_hcd:
5648 fail_create_hcd:
5651 }
5653 /**
5654 * fotg210_hcd_remove - shutdown processing for EHCI HCDs
5655 * @dev: USB Host Controller being removed
5656 *
5657 */
5659 {
5670 }
5675 },
5678 };
5681 {
5691 pr_warn("Warning! fotg210_hcd should always be loaded before uhci_hcd and ohci_hcd, not after\n");
5705 clean:
5711 }
5715 {
5719 }