drivers/usb/serial/mct_u232.h

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver
   4  *
   5  *   Copyright (C) 2000 Wolfgang Grandegger (wolfgang@ces.ch)
   6  *
   7  * This driver is for the device MCT USB-RS232 Converter (25 pin, Model No.
   8  * U232-P25) from Magic Control Technology Corp. (there is also a 9 pin
   9  * Model No. U232-P9). See http://www.mct.com.tw/products/product_us232.html
  10  * for further information. The properties of this device are listed at the end
  11  * of this file. This device was used in the Dlink DSB-S25.
  12  *
  13  * All of the information about the device was acquired by using SniffUSB
  14  * on Windows98. The technical details of the reverse engineering are
  15  * summarized at the end of this file.
  16  */
  17
  18 #ifndef __LINUX_USB_SERIAL_MCT_U232_H
  19 #define __LINUX_USB_SERIAL_MCT_U232_H
  20
  21 #define MCT_U232_VID                    0x0711  /* Vendor Id */
  22 #define MCT_U232_PID                    0x0210  /* Original MCT Product Id */
  23
  24 /* U232-P25, Sitecom */
  25 #define MCT_U232_SITECOM_PID            0x0230  /* Sitecom Product Id */
  26
  27 /* DU-H3SP USB BAY hub */
  28 #define MCT_U232_DU_H3SP_PID            0x0200  /* D-Link DU-H3SP USB BAY */
  29
  30 /* Belkin badge the MCT U232-P9 as the F5U109 */
  31 #define MCT_U232_BELKIN_F5U109_VID      0x050d  /* Vendor Id */
  32 #define MCT_U232_BELKIN_F5U109_PID      0x0109  /* Product Id */
  33
  34 /*
  35  * Vendor Request Interface
  36  */
  37 #define MCT_U232_SET_REQUEST_TYPE       0x40
  38 #define MCT_U232_GET_REQUEST_TYPE       0xc0
  39
  40 /* Get Modem Status Register (MSR) */
  41 #define MCT_U232_GET_MODEM_STAT_REQUEST 2
  42 #define MCT_U232_GET_MODEM_STAT_SIZE    1
  43
  44 /* Get Line Control Register (LCR) */
  45 /* ... not used by this driver */
  46 #define MCT_U232_GET_LINE_CTRL_REQUEST  6
  47 #define MCT_U232_GET_LINE_CTRL_SIZE     1
  48
  49 /* Set Baud Rate Divisor */
  50 #define MCT_U232_SET_BAUD_RATE_REQUEST  5
  51 #define MCT_U232_SET_BAUD_RATE_SIZE     4
  52
  53 /* Set Line Control Register (LCR) */
  54 #define MCT_U232_SET_LINE_CTRL_REQUEST  7
  55 #define MCT_U232_SET_LINE_CTRL_SIZE     1
  56
  57 /* Set Modem Control Register (MCR) */
  58 #define MCT_U232_SET_MODEM_CTRL_REQUEST 10
  59 #define MCT_U232_SET_MODEM_CTRL_SIZE    1
  60
  61 /*
  62  * This USB device request code is not well understood.  It is transmitted by
  63  * the MCT-supplied Windows driver whenever the baud rate changes.
  64  */
  65 #define MCT_U232_SET_UNKNOWN1_REQUEST   11  /* Unknown functionality */
  66 #define MCT_U232_SET_UNKNOWN1_SIZE      1
  67
  68 /*
  69  * This USB device request code appears to control whether CTS is required
  70  * during transmission.
  71  *
  72  * Sending a zero byte allows data transmission to a device which is not
  73  * asserting CTS.  Sending a '1' byte will cause transmission to be deferred
  74  * until the device asserts CTS.
  75  */
  76 #define MCT_U232_SET_CTS_REQUEST        12
  77 #define MCT_U232_SET_CTS_SIZE           1
  78
  79 #define MCT_U232_MAX_SIZE               4       /* of MCT_XXX_SIZE */
  80
  81 /*
  82  * Baud rate (divisor)
  83  * Actually, there are two of them, MCT website calls them "Philips solution"
  84  * and "Intel solution". They are the regular MCT and "Sitecom" for us.
  85  * This is pointless to document in the header, see the code for the bits.
  86  */
  87 static int mct_u232_calculate_baud_rate(struct usb_serial *serial,
  88                                         speed_t value, speed_t *result);
  89
  90 /*
  91  * Line Control Register (LCR)
  92  */
  93 #define MCT_U232_SET_BREAK              0x40
  94
  95 #define MCT_U232_PARITY_SPACE           0x38
  96 #define MCT_U232_PARITY_MARK            0x28
  97 #define MCT_U232_PARITY_EVEN            0x18
  98 #define MCT_U232_PARITY_ODD             0x08
  99 #define MCT_U232_PARITY_NONE            0x00
 100
 101 #define MCT_U232_DATA_BITS_5            0x00
 102 #define MCT_U232_DATA_BITS_6            0x01
 103 #define MCT_U232_DATA_BITS_7            0x02
 104 #define MCT_U232_DATA_BITS_8            0x03
 105
 106 #define MCT_U232_STOP_BITS_2            0x04
 107 #define MCT_U232_STOP_BITS_1            0x00
 108
 109 /*
 110  * Modem Control Register (MCR)
 111  */
 112 #define MCT_U232_MCR_NONE               0x8     /* Deactivate DTR and RTS */
 113 #define MCT_U232_MCR_RTS                0xa     /* Activate RTS */
 114 #define MCT_U232_MCR_DTR                0x9     /* Activate DTR */
 115
 116 /*
 117  * Modem Status Register (MSR)
 118  */
 119 #define MCT_U232_MSR_INDEX              0x0     /* data[index] */
 120 #define MCT_U232_MSR_CD                 0x80    /* Current CD */
 121 #define MCT_U232_MSR_RI                 0x40    /* Current RI */
 122 #define MCT_U232_MSR_DSR                0x20    /* Current DSR */
 123 #define MCT_U232_MSR_CTS                0x10    /* Current CTS */
 124 #define MCT_U232_MSR_DCD                0x08    /* Delta CD */
 125 #define MCT_U232_MSR_DRI                0x04    /* Delta RI */
 126 #define MCT_U232_MSR_DDSR               0x02    /* Delta DSR */
 127 #define MCT_U232_MSR_DCTS               0x01    /* Delta CTS */
 128
 129 /*
 130  * Line Status Register (LSR)
 131  */
 132 #define MCT_U232_LSR_INDEX      1       /* data[index] */
 133 #define MCT_U232_LSR_ERR        0x80    /* OE | PE | FE | BI */
 134 #define MCT_U232_LSR_TEMT       0x40    /* transmit register empty */
 135 #define MCT_U232_LSR_THRE       0x20    /* transmit holding register empty */
 136 #define MCT_U232_LSR_BI         0x10    /* break indicator */
 137 #define MCT_U232_LSR_FE         0x08    /* framing error */
 138 #define MCT_U232_LSR_OE         0x02    /* overrun error */
 139 #define MCT_U232_LSR_PE         0x04    /* parity error */
 140 #define MCT_U232_LSR_OE         0x02    /* overrun error */
 141 #define MCT_U232_LSR_DR         0x01    /* receive data ready */
 142
 143
 144 /* -----------------------------------------------------------------------------
 145  * Technical Specification reverse engineered with SniffUSB on Windows98
 146  * =====================================================================
 147  *
 148  *  The technical details of the device have been acquired be using "SniffUSB"
 149  *  and the vendor-supplied device driver (version 2.3A) under Windows98. To
 150  *  identify the USB vendor-specific requests and to assign them to terminal
 151  *  settings (flow control, baud rate, etc.) the program "SerialSettings" from
 152  *  William G. Greathouse has been proven to be very useful. I also used the
 153  *  Win98 "HyperTerminal" and "usb-robot" on Linux for testing. The results and
 154  *  observations are summarized below:
 155  *
 156  *  The USB requests seem to be directly mapped to the registers of a 8250,
 157  *  16450 or 16550 UART. The FreeBSD handbook (appendix F.4 "Input/Output
 158  *  devices") contains a comprehensive description of UARTs and its registers.
 159  *  The bit descriptions are actually taken from there.
 160  *
 161  *
 162  * Baud rate (divisor)
 163  * -------------------
 164  *
 165  *   BmRequestType:  0x40 (0100 0000B)
 166  *   bRequest:       0x05
 167  *   wValue:         0x0000
 168  *   wIndex:         0x0000
 169  *   wLength:        0x0004
 170  *   Data:           divisor = 115200 / baud_rate
 171  *
 172  *   SniffUSB observations (Nov 2003): Contrary to the 'wLength' value of 4
 173  *   shown above, observations with a Belkin F5U109 adapter, using the
 174  *   MCT-supplied Windows98 driver (U2SPORT.VXD, "File version: 1.21P.0104 for
 175  *   Win98/Me"), show this request has a length of 1 byte, presumably because
 176  *   of the fact that the Belkin adapter and the 'Sitecom U232-P25' adapter
 177  *   use a baud-rate code instead of a conventional RS-232 baud rate divisor.
 178  *   The current source code for this driver does not reflect this fact, but
 179  *   the driver works fine with this adapter/driver combination nonetheless.
 180  *
 181  *
 182  * Line Control Register (LCR)
 183  * ---------------------------
 184  *
 185  *  BmRequestType:  0x40 (0100 0000B)    0xc0 (1100 0000B)
 186  *  bRequest:       0x07                 0x06
 187  *  wValue:         0x0000
 188  *  wIndex:         0x0000
 189  *  wLength:        0x0001
 190  *  Data:           LCR (see below)
 191  *
 192  *  Bit 7: Divisor Latch Access Bit (DLAB). When set, access to the data
 193  *         transmit/receive register (THR/RBR) and the Interrupt Enable Register
 194  *         (IER) is disabled. Any access to these ports is now redirected to the
 195  *         Divisor Latch Registers. Setting this bit, loading the Divisor
 196  *         Registers, and clearing DLAB should be done with interrupts disabled.
 197  *  Bit 6: Set Break. When set to "1", the transmitter begins to transmit
 198  *         continuous Spacing until this bit is set to "0". This overrides any
 199  *         bits of characters that are being transmitted.
 200  *  Bit 5: Stick Parity. When parity is enabled, setting this bit causes parity
 201  *         to always be "1" or "0", based on the value of Bit 4.
 202  *  Bit 4: Even Parity Select (EPS). When parity is enabled and Bit 5 is "0",
 203  *         setting this bit causes even parity to be transmitted and expected.
 204  *         Otherwise, odd parity is used.
 205  *  Bit 3: Parity Enable (PEN). When set to "1", a parity bit is inserted
 206  *         between the last bit of the data and the Stop Bit. The UART will also
 207  *         expect parity to be present in the received data.
 208  *  Bit 2: Number of Stop Bits (STB). If set to "1" and using 5-bit data words,
 209  *         1.5 Stop Bits are transmitted and expected in each data word. For
 210  *         6, 7 and 8-bit data words, 2 Stop Bits are transmitted and expected.
 211  *         When this bit is set to "0", one Stop Bit is used on each data word.
 212  *  Bit 1: Word Length Select Bit #1 (WLSB1)
 213  *  Bit 0: Word Length Select Bit #0 (WLSB0)
 214  *         Together these bits specify the number of bits in each data word.
 215  *           1 0  Word Length
 216  *           0 0  5 Data Bits
 217  *           0 1  6 Data Bits
 218  *           1 0  7 Data Bits
 219  *           1 1  8 Data Bits
 220  *
 221  *  SniffUSB observations: Bit 7 seems not to be used. There seem to be two bugs
 222  *  in the Win98 driver: the break does not work (bit 6 is not asserted) and the
 223  *  stick parity bit is not cleared when set once. The LCR can also be read
 224  *  back with USB request 6 but this has never been observed with SniffUSB.
 225  *
 226  *
 227  * Modem Control Register (MCR)
 228  * ----------------------------
 229  *
 230  *  BmRequestType:  0x40  (0100 0000B)
 231  *  bRequest:       0x0a
 232  *  wValue:         0x0000
 233  *  wIndex:         0x0000
 234  *  wLength:        0x0001
 235  *  Data:           MCR (Bit 4..7, see below)
 236  *
 237  *  Bit 7: Reserved, always 0.
 238  *  Bit 6: Reserved, always 0.
 239  *  Bit 5: Reserved, always 0.
 240  *  Bit 4: Loop-Back Enable. When set to "1", the UART transmitter and receiver
 241  *         are internally connected together to allow diagnostic operations. In
 242  *         addition, the UART modem control outputs are connected to the UART
 243  *         modem control inputs. CTS is connected to RTS, DTR is connected to
 244  *         DSR, OUT1 is connected to RI, and OUT 2 is connected to DCD.
 245  *  Bit 3: OUT 2. An auxiliary output that the host processor may set high or
 246  *         low. In the IBM PC serial adapter (and most clones), OUT 2 is used
 247  *         to tri-state (disable) the interrupt signal from the
 248  *         8250/16450/16550 UART.
 249  *  Bit 2: OUT 1. An auxiliary output that the host processor may set high or
 250  *         low. This output is not used on the IBM PC serial adapter.
 251  *  Bit 1: Request to Send (RTS). When set to "1", the output of the UART -RTS
 252  *         line is Low (Active).
 253  *  Bit 0: Data Terminal Ready (DTR). When set to "1", the output of the UART
 254  *         -DTR line is Low (Active).
 255  *
 256  *  SniffUSB observations: Bit 2 and 4 seem not to be used but bit 3 has been
 257  *  seen _always_ set.
 258  *
 259  *
 260  * Modem Status Register (MSR)
 261  * ---------------------------
 262  *
 263  *  BmRequestType:  0xc0  (1100 0000B)
 264  *  bRequest:       0x02
 265  *  wValue:         0x0000
 266  *  wIndex:         0x0000
 267  *  wLength:        0x0001
 268  *  Data:           MSR (see below)
 269  *
 270  *  Bit 7: Data Carrier Detect (CD). Reflects the state of the DCD line on the
 271  *         UART.
 272  *  Bit 6: Ring Indicator (RI). Reflects the state of the RI line on the UART.
 273  *  Bit 5: Data Set Ready (DSR). Reflects the state of the DSR line on the UART.
 274  *  Bit 4: Clear To Send (CTS). Reflects the state of the CTS line on the UART.
 275  *  Bit 3: Delta Data Carrier Detect (DDCD). Set to "1" if the -DCD line has
 276  *         changed state one more more times since the last time the MSR was
 277  *         read by the host.
 278  *  Bit 2: Trailing Edge Ring Indicator (TERI). Set to "1" if the -RI line has
 279  *         had a low to high transition since the last time the MSR was read by
 280  *         the host.
 281  *  Bit 1: Delta Data Set Ready (DDSR). Set to "1" if the -DSR line has changed
 282  *         state one more more times since the last time the MSR was read by the
 283  *         host.
 284  *  Bit 0: Delta Clear To Send (DCTS). Set to "1" if the -CTS line has changed
 285  *         state one more times since the last time the MSR was read by the
 286  *         host.
 287  *
 288  *  SniffUSB observations: the MSR is also returned as first byte on the
 289  *  interrupt-in endpoint 0x83 to signal changes of modem status lines. The USB
 290  *  request to read MSR cannot be applied during normal device operation.
 291  *
 292  *
 293  * Line Status Register (LSR)
 294  * --------------------------
 295  *
 296  *  Bit 7   Error in Receiver FIFO. On the 8250/16450 UART, this bit is zero.
 297  *          This bit is set to "1" when any of the bytes in the FIFO have one
 298  *          or more of the following error conditions: PE, FE, or BI.
 299  *  Bit 6   Transmitter Empty (TEMT). When set to "1", there are no words
 300  *          remaining in the transmit FIFO or the transmit shift register. The
 301  *          transmitter is completely idle.
 302  *  Bit 5   Transmitter Holding Register Empty (THRE). When set to "1", the
 303  *          FIFO (or holding register) now has room for at least one additional
 304  *          word to transmit. The transmitter may still be transmitting when
 305  *          this bit is set to "1".
 306  *  Bit 4   Break Interrupt (BI). The receiver has detected a Break signal.
 307  *  Bit 3   Framing Error (FE). A Start Bit was detected but the Stop Bit did
 308  *          not appear at the expected time. The received word is probably
 309  *          garbled.
 310  *  Bit 2   Parity Error (PE). The parity bit was incorrect for the word
 311  *          received.
 312  *  Bit 1   Overrun Error (OE). A new word was received and there was no room
 313  *          in the receive buffer. The newly-arrived word in the shift register
 314  *          is discarded. On 8250/16450 UARTs, the word in the holding register
 315  *          is discarded and the newly- arrived word is put in the holding
 316  *          register.
 317  *  Bit 0   Data Ready (DR). One or more words are in the receive FIFO that the
 318  *          host may read. A word must be completely received and moved from
 319  *          the shift register into the FIFO (or holding register for
 320  *          8250/16450 designs) before this bit is set.
 321  *
 322  *  SniffUSB observations: the LSR is returned as second byte on the
 323  *  interrupt-in endpoint 0x83 to signal error conditions. Such errors have
 324  *  been seen with minicom/zmodem transfers (CRC errors).
 325  *
 326  *
 327  * Unknown #1
 328  * -------------------
 329  *
 330  *   BmRequestType:  0x40 (0100 0000B)
 331  *   bRequest:       0x0b
 332  *   wValue:         0x0000
 333  *   wIndex:         0x0000
 334  *   wLength:        0x0001
 335  *   Data:           0x00
 336  *
 337  *   SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
 338  *   (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
 339  *   occurs immediately after a "Baud rate (divisor)" message.  It was not
 340  *   observed at any other time.  It is unclear what purpose this message
 341  *   serves.
 342  *
 343  *
 344  * Unknown #2
 345  * -------------------
 346  *
 347  *   BmRequestType:  0x40 (0100 0000B)
 348  *   bRequest:       0x0c
 349  *   wValue:         0x0000
 350  *   wIndex:         0x0000
 351  *   wLength:        0x0001
 352  *   Data:           0x00
 353  *
 354  *   SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
 355  *   (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
 356  *   occurs immediately after the 'Unknown #1' message (see above).  It was
 357  *   not observed at any other time.  It is unclear what other purpose (if
 358  *   any) this message might serve, but without it, the USB/RS-232 adapter
 359  *   will not write to RS-232 devices which do not assert the 'CTS' signal.
 360  *
 361  *
 362  * Flow control
 363  * ------------
 364  *
 365  *  SniffUSB observations: no flow control specific requests have been realized
 366  *  apart from DTR/RTS settings. Both signals are dropped for no flow control
 367  *  but asserted for hardware or software flow control.
 368  *
 369  *
 370  * Endpoint usage
 371  * --------------
 372  *
 373  *  SniffUSB observations: the bulk-out endpoint 0x1 and interrupt-in endpoint
 374  *  0x81 is used to transmit and receive characters. The second interrupt-in
 375  *  endpoint 0x83 signals exceptional conditions like modem line changes and
 376  *  errors. The first byte returned is the MSR and the second byte the LSR.
 377  *
 378  *
 379  * Other observations
 380  * ------------------
 381  *
 382  *  Queued bulk transfers like used in visor.c did not work.
 383  *
 384  *
 385  * Properties of the USB device used (as found in /var/log/messages)
 386  * -----------------------------------------------------------------
 387  *
 388  *  Manufacturer: MCT Corporation.
 389  *  Product: USB-232 Interfact Controller
 390  *  SerialNumber: U2S22050
 391  *
 392  *    Length              = 18
 393  *    DescriptorType      = 01
 394  *    USB version         = 1.00
 395  *    Vendor:Product      = 0711:0210
 396  *    MaxPacketSize0      = 8
 397  *    NumConfigurations   = 1
 398  *    Device version      = 1.02
 399  *    Device Class:SubClass:Protocol = 00:00:00
 400  *      Per-interface classes
 401  *  Configuration:
 402  *    bLength             =    9
 403  *    bDescriptorType     =   02
 404  *    wTotalLength        = 0027
 405  *    bNumInterfaces      =   01
 406  *    bConfigurationValue =   01
 407  *    iConfiguration      =   00
 408  *    bmAttributes        =   c0
 409  *    MaxPower            =  100mA
 410  *
 411  *    Interface: 0
 412  *    Alternate Setting:  0
 413  *      bLength             =    9
 414  *      bDescriptorType     =   04
 415  *      bInterfaceNumber    =   00
 416  *      bAlternateSetting   =   00
 417  *      bNumEndpoints       =   03
 418  *      bInterface Class:SubClass:Protocol =   00:00:00
 419  *      iInterface          =   00
 420  *      Endpoint:
 421  *        bLength             =    7
 422  *        bDescriptorType     =   05
 423  *        bEndpointAddress    =   81 (in)
 424  *        bmAttributes        =   03 (Interrupt)
 425  *        wMaxPacketSize      = 0040
 426  *        bInterval           =   02
 427  *      Endpoint:
 428  *        bLength             =    7
 429  *        bDescriptorType     =   05
 430  *        bEndpointAddress    =   01 (out)
 431  *        bmAttributes        =   02 (Bulk)
 432  *        wMaxPacketSize      = 0040
 433  *        bInterval           =   00
 434  *      Endpoint:
 435  *        bLength             =    7
 436  *        bDescriptorType     =   05
 437  *        bEndpointAddress    =   83 (in)
 438  *        bmAttributes        =   03 (Interrupt)
 439  *        wMaxPacketSize      = 0002
 440  *        bInterval           =   02
 441  *
 442  *
 443  * Hardware details (added by Martin Hamilton, 2001/12/06)
 444  * -----------------------------------------------------------------
 445  *
 446  * This info was gleaned from opening a Belkin F5U109 DB9 USB serial
 447  * adaptor, which turns out to simply be a re-badged U232-P9.  We
 448  * know this because there is a sticky label on the circuit board
 449  * which says "U232-P9" ;-)
 450  *
 451  * The circuit board inside the adaptor contains a Philips PDIUSBD12
 452  * USB endpoint chip and a Philips P87C52UBAA microcontroller with
 453  * embedded UART.  Exhaustive documentation for these is available at:
 454  *
 455  *   http://www.semiconductors.philips.com/pip/p87c52ubaa
 456  *   http://www.nxp.com/acrobat_download/various/PDIUSBD12_PROGRAMMING_GUIDE.pdf
 457  *
 458  * Thanks to Julian Highfield for the pointer to the Philips database.
 459  *
 460  */
 461
 462 #endif /* __LINUX_USB_SERIAL_MCT_U232_H */
 463