dt-bindings: mtd: ingenic: Use standard ecc-engine property
[linux/fpc-iii.git] / drivers / watchdog / bcm_kona_wdt.c
blob4249b47902bd5321bf7955b3f86bb773b8c2a305
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2013 Broadcom Corporation
5 */
7 #include <linux/debugfs.h>
8 #include <linux/delay.h>
9 #include <linux/err.h>
10 #include <linux/io.h>
11 #include <linux/module.h>
12 #include <linux/of_address.h>
13 #include <linux/platform_device.h>
14 #include <linux/watchdog.h>
16 #define SECWDOG_CTRL_REG 0x00000000
17 #define SECWDOG_COUNT_REG 0x00000004
19 #define SECWDOG_RESERVED_MASK 0x1dffffff
20 #define SECWDOG_WD_LOAD_FLAG 0x10000000
21 #define SECWDOG_EN_MASK 0x08000000
22 #define SECWDOG_SRSTEN_MASK 0x04000000
23 #define SECWDOG_RES_MASK 0x00f00000
24 #define SECWDOG_COUNT_MASK 0x000fffff
26 #define SECWDOG_MAX_COUNT SECWDOG_COUNT_MASK
27 #define SECWDOG_CLKS_SHIFT 20
28 #define SECWDOG_MAX_RES 15
29 #define SECWDOG_DEFAULT_RESOLUTION 4
30 #define SECWDOG_MAX_TRY 1000
32 #define SECS_TO_TICKS(x, w) ((x) << (w)->resolution)
33 #define TICKS_TO_SECS(x, w) ((x) >> (w)->resolution)
35 #define BCM_KONA_WDT_NAME "bcm_kona_wdt"
37 struct bcm_kona_wdt {
38 void __iomem *base;
40 * One watchdog tick is 1/(2^resolution) seconds. Resolution can take
41 * the values 0-15, meaning one tick can be 1s to 30.52us. Our default
42 * resolution of 4 means one tick is 62.5ms.
44 * The watchdog counter is 20 bits. Depending on resolution, the maximum
45 * counter value of 0xfffff expires after about 12 days (resolution 0)
46 * down to only 32s (resolution 15). The default resolution of 4 gives
47 * us a maximum of about 18 hours and 12 minutes before the watchdog
48 * times out.
50 int resolution;
51 spinlock_t lock;
52 #ifdef CONFIG_BCM_KONA_WDT_DEBUG
53 unsigned long busy_count;
54 struct dentry *debugfs;
55 #endif
58 static int secure_register_read(struct bcm_kona_wdt *wdt, uint32_t offset)
60 uint32_t val;
61 unsigned count = 0;
64 * If the WD_LOAD_FLAG is set, the watchdog counter field is being
65 * updated in hardware. Once the WD timer is updated in hardware, it
66 * gets cleared.
68 do {
69 if (unlikely(count > 1))
70 udelay(5);
71 val = readl_relaxed(wdt->base + offset);
72 count++;
73 } while ((val & SECWDOG_WD_LOAD_FLAG) && count < SECWDOG_MAX_TRY);
75 #ifdef CONFIG_BCM_KONA_WDT_DEBUG
76 /* Remember the maximum number iterations due to WD_LOAD_FLAG */
77 if (count > wdt->busy_count)
78 wdt->busy_count = count;
79 #endif
81 /* This is the only place we return a negative value. */
82 if (val & SECWDOG_WD_LOAD_FLAG)
83 return -ETIMEDOUT;
85 /* We always mask out reserved bits. */
86 val &= SECWDOG_RESERVED_MASK;
88 return val;
91 #ifdef CONFIG_BCM_KONA_WDT_DEBUG
93 static int bcm_kona_show(struct seq_file *s, void *data)
95 int ctl_val, cur_val;
96 unsigned long flags;
97 struct bcm_kona_wdt *wdt = s->private;
99 if (!wdt) {
100 seq_puts(s, "No device pointer\n");
101 return 0;
104 spin_lock_irqsave(&wdt->lock, flags);
105 ctl_val = secure_register_read(wdt, SECWDOG_CTRL_REG);
106 cur_val = secure_register_read(wdt, SECWDOG_COUNT_REG);
107 spin_unlock_irqrestore(&wdt->lock, flags);
109 if (ctl_val < 0 || cur_val < 0) {
110 seq_puts(s, "Error accessing hardware\n");
111 } else {
112 int ctl, cur, ctl_sec, cur_sec, res;
114 ctl = ctl_val & SECWDOG_COUNT_MASK;
115 res = (ctl_val & SECWDOG_RES_MASK) >> SECWDOG_CLKS_SHIFT;
116 cur = cur_val & SECWDOG_COUNT_MASK;
117 ctl_sec = TICKS_TO_SECS(ctl, wdt);
118 cur_sec = TICKS_TO_SECS(cur, wdt);
119 seq_printf(s,
120 "Resolution: %d / %d\n"
121 "Control: %d s / %d (%#x) ticks\n"
122 "Current: %d s / %d (%#x) ticks\n"
123 "Busy count: %lu\n",
124 res, wdt->resolution,
125 ctl_sec, ctl, ctl,
126 cur_sec, cur, cur,
127 wdt->busy_count);
130 return 0;
133 DEFINE_SHOW_ATTRIBUTE(bcm_kona);
135 static void bcm_kona_wdt_debug_init(struct platform_device *pdev)
137 struct dentry *dir;
138 struct bcm_kona_wdt *wdt = platform_get_drvdata(pdev);
140 if (!wdt)
141 return;
143 wdt->debugfs = NULL;
145 dir = debugfs_create_dir(BCM_KONA_WDT_NAME, NULL);
146 if (IS_ERR_OR_NULL(dir))
147 return;
149 if (debugfs_create_file("info", S_IFREG | S_IRUGO, dir, wdt,
150 &bcm_kona_fops))
151 wdt->debugfs = dir;
152 else
153 debugfs_remove_recursive(dir);
156 static void bcm_kona_wdt_debug_exit(struct platform_device *pdev)
158 struct bcm_kona_wdt *wdt = platform_get_drvdata(pdev);
160 if (wdt && wdt->debugfs) {
161 debugfs_remove_recursive(wdt->debugfs);
162 wdt->debugfs = NULL;
166 #else
168 static void bcm_kona_wdt_debug_init(struct platform_device *pdev) {}
169 static void bcm_kona_wdt_debug_exit(struct platform_device *pdev) {}
171 #endif /* CONFIG_BCM_KONA_WDT_DEBUG */
173 static int bcm_kona_wdt_ctrl_reg_modify(struct bcm_kona_wdt *wdt,
174 unsigned mask, unsigned newval)
176 int val;
177 unsigned long flags;
178 int ret = 0;
180 spin_lock_irqsave(&wdt->lock, flags);
182 val = secure_register_read(wdt, SECWDOG_CTRL_REG);
183 if (val < 0) {
184 ret = val;
185 } else {
186 val &= ~mask;
187 val |= newval;
188 writel_relaxed(val, wdt->base + SECWDOG_CTRL_REG);
191 spin_unlock_irqrestore(&wdt->lock, flags);
193 return ret;
196 static int bcm_kona_wdt_set_resolution_reg(struct bcm_kona_wdt *wdt)
198 if (wdt->resolution > SECWDOG_MAX_RES)
199 return -EINVAL;
201 return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_RES_MASK,
202 wdt->resolution << SECWDOG_CLKS_SHIFT);
205 static int bcm_kona_wdt_set_timeout_reg(struct watchdog_device *wdog,
206 unsigned watchdog_flags)
208 struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog);
210 return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_COUNT_MASK,
211 SECS_TO_TICKS(wdog->timeout, wdt) |
212 watchdog_flags);
215 static int bcm_kona_wdt_set_timeout(struct watchdog_device *wdog,
216 unsigned int t)
218 wdog->timeout = t;
219 return 0;
222 static unsigned int bcm_kona_wdt_get_timeleft(struct watchdog_device *wdog)
224 struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog);
225 int val;
226 unsigned long flags;
228 spin_lock_irqsave(&wdt->lock, flags);
229 val = secure_register_read(wdt, SECWDOG_COUNT_REG);
230 spin_unlock_irqrestore(&wdt->lock, flags);
232 if (val < 0)
233 return val;
235 return TICKS_TO_SECS(val & SECWDOG_COUNT_MASK, wdt);
238 static int bcm_kona_wdt_start(struct watchdog_device *wdog)
240 return bcm_kona_wdt_set_timeout_reg(wdog,
241 SECWDOG_EN_MASK | SECWDOG_SRSTEN_MASK);
244 static int bcm_kona_wdt_stop(struct watchdog_device *wdog)
246 struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog);
248 return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_EN_MASK |
249 SECWDOG_SRSTEN_MASK, 0);
252 static const struct watchdog_ops bcm_kona_wdt_ops = {
253 .owner = THIS_MODULE,
254 .start = bcm_kona_wdt_start,
255 .stop = bcm_kona_wdt_stop,
256 .set_timeout = bcm_kona_wdt_set_timeout,
257 .get_timeleft = bcm_kona_wdt_get_timeleft,
260 static const struct watchdog_info bcm_kona_wdt_info = {
261 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
262 WDIOF_KEEPALIVEPING,
263 .identity = "Broadcom Kona Watchdog Timer",
266 static struct watchdog_device bcm_kona_wdt_wdd = {
267 .info = &bcm_kona_wdt_info,
268 .ops = &bcm_kona_wdt_ops,
269 .min_timeout = 1,
270 .max_timeout = SECWDOG_MAX_COUNT >> SECWDOG_DEFAULT_RESOLUTION,
271 .timeout = SECWDOG_MAX_COUNT >> SECWDOG_DEFAULT_RESOLUTION,
274 static void bcm_kona_wdt_shutdown(struct platform_device *pdev)
276 bcm_kona_wdt_stop(&bcm_kona_wdt_wdd);
279 static int bcm_kona_wdt_probe(struct platform_device *pdev)
281 struct device *dev = &pdev->dev;
282 struct bcm_kona_wdt *wdt;
283 struct resource *res;
284 int ret;
286 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
287 if (!wdt)
288 return -ENOMEM;
290 spin_lock_init(&wdt->lock);
292 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
293 wdt->base = devm_ioremap_resource(dev, res);
294 if (IS_ERR(wdt->base))
295 return -ENODEV;
297 wdt->resolution = SECWDOG_DEFAULT_RESOLUTION;
298 ret = bcm_kona_wdt_set_resolution_reg(wdt);
299 if (ret) {
300 dev_err(dev, "Failed to set resolution (error: %d)", ret);
301 return ret;
304 platform_set_drvdata(pdev, wdt);
305 watchdog_set_drvdata(&bcm_kona_wdt_wdd, wdt);
306 bcm_kona_wdt_wdd.parent = &pdev->dev;
308 ret = bcm_kona_wdt_set_timeout_reg(&bcm_kona_wdt_wdd, 0);
309 if (ret) {
310 dev_err(dev, "Failed set watchdog timeout");
311 return ret;
314 ret = watchdog_register_device(&bcm_kona_wdt_wdd);
315 if (ret) {
316 dev_err(dev, "Failed to register watchdog device");
317 return ret;
320 bcm_kona_wdt_debug_init(pdev);
321 dev_dbg(dev, "Broadcom Kona Watchdog Timer");
323 return 0;
326 static int bcm_kona_wdt_remove(struct platform_device *pdev)
328 bcm_kona_wdt_debug_exit(pdev);
329 bcm_kona_wdt_shutdown(pdev);
330 watchdog_unregister_device(&bcm_kona_wdt_wdd);
331 dev_dbg(&pdev->dev, "Watchdog driver disabled");
333 return 0;
336 static const struct of_device_id bcm_kona_wdt_of_match[] = {
337 { .compatible = "brcm,kona-wdt", },
340 MODULE_DEVICE_TABLE(of, bcm_kona_wdt_of_match);
342 static struct platform_driver bcm_kona_wdt_driver = {
343 .driver = {
344 .name = BCM_KONA_WDT_NAME,
345 .of_match_table = bcm_kona_wdt_of_match,
347 .probe = bcm_kona_wdt_probe,
348 .remove = bcm_kona_wdt_remove,
349 .shutdown = bcm_kona_wdt_shutdown,
352 module_platform_driver(bcm_kona_wdt_driver);
354 MODULE_ALIAS("platform:" BCM_KONA_WDT_NAME);
355 MODULE_AUTHOR("Markus Mayer <mmayer@broadcom.com>");
356 MODULE_DESCRIPTION("Broadcom Kona Watchdog Driver");
357 MODULE_LICENSE("GPL v2");