drivers/watchdog/mpc8xxx_wdt.c

   1 /*
   2  * mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
   3  *
   4  * Authors: Dave Updegraff <dave@cray.org>
   5  *          Kumar Gala <galak@kernel.crashing.org>
   6  *              Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
   7  *                              ..and from sc520_wdt
   8  * Copyright (c) 2008  MontaVista Software, Inc.
   9  *                     Anton Vorontsov <avorontsov@ru.mvista.com>
  10  *
  11  * Note: it appears that you can only actually ENABLE or DISABLE the thing
  12  * once after POR. Once enabled, you cannot disable, and vice versa.
  13  *
  14  * This program is free software; you can redistribute  it and/or modify it
  15  * under  the terms of  the GNU General  Public License as published by the
  16  * Free Software Foundation;  either version 2 of the  License, or (at your
  17  * option) any later version.
  18  */
  19
  20 #include <linux/fs.h>
  21 #include <linux/init.h>
  22 #include <linux/kernel.h>
  23 #include <linux/of_address.h>
  24 #include <linux/of_platform.h>
  25 #include <linux/module.h>
  26 #include <linux/watchdog.h>
  27 #include <linux/io.h>
  28 #include <linux/uaccess.h>
  29 #include <sysdev/fsl_soc.h>
  30
  31 #define WATCHDOG_TIMEOUT 10
  32
  33 struct mpc8xxx_wdt {
  34         __be32 res0;
  35         __be32 swcrr; /* System watchdog control register */
  36 #define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
  37 #define SWCRR_SWF  0x00000008 /* Software Watchdog Freeze (mpc8xx). */
  38 #define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
  39 #define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
  40 #define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
  41         __be32 swcnr; /* System watchdog count register */
  42         u8 res1[2];
  43         __be16 swsrr; /* System watchdog service register */
  44         u8 res2[0xF0];
  45 };
  46
  47 struct mpc8xxx_wdt_type {
  48         int prescaler;
  49         bool hw_enabled;
  50         u32 rsr_mask;
  51 };
  52
  53 struct mpc8xxx_wdt_ddata {
  54         struct mpc8xxx_wdt __iomem *base;
  55         struct watchdog_device wdd;
  56         spinlock_t lock;
  57         u16 swtc;
  58 };
  59
  60 static u16 timeout;
  61 module_param(timeout, ushort, 0);
  62 MODULE_PARM_DESC(timeout,
  63         "Watchdog timeout in seconds. (1<timeout<65535, default="
  64         __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
  65
  66 static bool reset = 1;
  67 module_param(reset, bool, 0);
  68 MODULE_PARM_DESC(reset,
  69         "Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");
  70
  71 static bool nowayout = WATCHDOG_NOWAYOUT;
  72 module_param(nowayout, bool, 0);
  73 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  74                  "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  75
  76 static void mpc8xxx_wdt_keepalive(struct mpc8xxx_wdt_ddata *ddata)
  77 {
  78         /* Ping the WDT */
  79         spin_lock(&ddata->lock);
  80         out_be16(&ddata->base->swsrr, 0x556c);
  81         out_be16(&ddata->base->swsrr, 0xaa39);
  82         spin_unlock(&ddata->lock);
  83 }
  84
  85 static int mpc8xxx_wdt_start(struct watchdog_device *w)
  86 {
  87         struct mpc8xxx_wdt_ddata *ddata =
  88                 container_of(w, struct mpc8xxx_wdt_ddata, wdd);
  89         u32 tmp = in_be32(&ddata->base->swcrr);
  90
  91         /* Good, fire up the show */
  92         tmp &= ~(SWCRR_SWTC | SWCRR_SWF | SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR);
  93         tmp |= SWCRR_SWEN | SWCRR_SWPR | (ddata->swtc << 16);
  94
  95         if (reset)
  96                 tmp |= SWCRR_SWRI;
  97
  98         out_be32(&ddata->base->swcrr, tmp);
  99
 100         tmp = in_be32(&ddata->base->swcrr);
 101         if (!(tmp & SWCRR_SWEN))
 102                 return -EOPNOTSUPP;
 103
 104         ddata->swtc = tmp >> 16;
 105         set_bit(WDOG_HW_RUNNING, &ddata->wdd.status);
 106
 107         return 0;
 108 }
 109
 110 static int mpc8xxx_wdt_ping(struct watchdog_device *w)
 111 {
 112         struct mpc8xxx_wdt_ddata *ddata =
 113                 container_of(w, struct mpc8xxx_wdt_ddata, wdd);
 114
 115         mpc8xxx_wdt_keepalive(ddata);
 116         return 0;
 117 }
 118
 119 static struct watchdog_info mpc8xxx_wdt_info = {
 120         .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT,
 121         .firmware_version = 1,
 122         .identity = "MPC8xxx",
 123 };
 124
 125 static struct watchdog_ops mpc8xxx_wdt_ops = {
 126         .owner = THIS_MODULE,
 127         .start = mpc8xxx_wdt_start,
 128         .ping = mpc8xxx_wdt_ping,
 129 };
 130
 131 static int mpc8xxx_wdt_probe(struct platform_device *ofdev)
 132 {
 133         int ret;
 134         struct resource *res;
 135         const struct mpc8xxx_wdt_type *wdt_type;
 136         struct mpc8xxx_wdt_ddata *ddata;
 137         u32 freq = fsl_get_sys_freq();
 138         bool enabled;
 139         struct device *dev = &ofdev->dev;
 140
 141         wdt_type = of_device_get_match_data(dev);
 142         if (!wdt_type)
 143                 return -EINVAL;
 144
 145         if (!freq || freq == -1)
 146                 return -EINVAL;
 147
 148         ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
 149         if (!ddata)
 150                 return -ENOMEM;
 151
 152         res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
 153         ddata->base = devm_ioremap_resource(dev, res);
 154         if (IS_ERR(ddata->base))
 155                 return PTR_ERR(ddata->base);
 156
 157         enabled = in_be32(&ddata->base->swcrr) & SWCRR_SWEN;
 158         if (!enabled && wdt_type->hw_enabled) {
 159                 dev_info(dev, "could not be enabled in software\n");
 160                 return -ENODEV;
 161         }
 162
 163         res = platform_get_resource(ofdev, IORESOURCE_MEM, 1);
 164         if (res) {
 165                 bool status;
 166                 u32 __iomem *rsr = ioremap(res->start, resource_size(res));
 167
 168                 if (!rsr)
 169                         return -ENOMEM;
 170
 171                 status = in_be32(rsr) & wdt_type->rsr_mask;
 172                 ddata->wdd.bootstatus = status ? WDIOF_CARDRESET : 0;
 173                  /* clear reset status bits related to watchdog timer */
 174                 out_be32(rsr, wdt_type->rsr_mask);
 175                 iounmap(rsr);
 176
 177                 dev_info(dev, "Last boot was %scaused by watchdog\n",
 178                          status ? "" : "not ");
 179         }
 180
 181         spin_lock_init(&ddata->lock);
 182
 183         ddata->wdd.info = &mpc8xxx_wdt_info,
 184         ddata->wdd.ops = &mpc8xxx_wdt_ops,
 185
 186         ddata->wdd.timeout = WATCHDOG_TIMEOUT;
 187         watchdog_init_timeout(&ddata->wdd, timeout, dev);
 188
 189         watchdog_set_nowayout(&ddata->wdd, nowayout);
 190
 191         ddata->swtc = min(ddata->wdd.timeout * freq / wdt_type->prescaler,
 192                           0xffffU);
 193
 194         /*
 195          * If the watchdog was previously enabled or we're running on
 196          * MPC8xxx, we should ping the wdt from the kernel until the
 197          * userspace handles it.
 198          */
 199         if (enabled)
 200                 mpc8xxx_wdt_start(&ddata->wdd);
 201
 202         ddata->wdd.max_hw_heartbeat_ms = (ddata->swtc * wdt_type->prescaler) /
 203                                          (freq / 1000);
 204         ddata->wdd.min_timeout = ddata->wdd.max_hw_heartbeat_ms / 1000;
 205         if (ddata->wdd.timeout < ddata->wdd.min_timeout)
 206                 ddata->wdd.timeout = ddata->wdd.min_timeout;
 207
 208         ret = watchdog_register_device(&ddata->wdd);
 209         if (ret) {
 210                 dev_err(dev, "cannot register watchdog device (err=%d)\n", ret);
 211                 return ret;
 212         }
 213
 214         dev_info(dev,
 215                  "WDT driver for MPC8xxx initialized. mode:%s timeout=%d sec\n",
 216                  reset ? "reset" : "interrupt", ddata->wdd.timeout);
 217
 218         platform_set_drvdata(ofdev, ddata);
 219         return 0;
 220 }
 221
 222 static int mpc8xxx_wdt_remove(struct platform_device *ofdev)
 223 {
 224         struct mpc8xxx_wdt_ddata *ddata = platform_get_drvdata(ofdev);
 225
 226         dev_crit(&ofdev->dev, "Watchdog removed, expect the %s soon!\n",
 227                  reset ? "reset" : "machine check exception");
 228         watchdog_unregister_device(&ddata->wdd);
 229
 230         return 0;
 231 }
 232
 233 static const struct of_device_id mpc8xxx_wdt_match[] = {
 234         {
 235                 .compatible = "mpc83xx_wdt",
 236                 .data = &(struct mpc8xxx_wdt_type) {
 237                         .prescaler = 0x10000,
 238                         .rsr_mask = BIT(3), /* RSR Bit SWRS */
 239                 },
 240         },
 241         {
 242                 .compatible = "fsl,mpc8610-wdt",
 243                 .data = &(struct mpc8xxx_wdt_type) {
 244                         .prescaler = 0x10000,
 245                         .hw_enabled = true,
 246                         .rsr_mask = BIT(20), /* RSTRSCR Bit WDT_RR */
 247                 },
 248         },
 249         {
 250                 .compatible = "fsl,mpc823-wdt",
 251                 .data = &(struct mpc8xxx_wdt_type) {
 252                         .prescaler = 0x800,
 253                         .hw_enabled = true,
 254                         .rsr_mask = BIT(28), /* RSR Bit SWRS */
 255                 },
 256         },
 257         {},
 258 };
 259 MODULE_DEVICE_TABLE(of, mpc8xxx_wdt_match);
 260
 261 static struct platform_driver mpc8xxx_wdt_driver = {
 262         .probe          = mpc8xxx_wdt_probe,
 263         .remove         = mpc8xxx_wdt_remove,
 264         .driver = {
 265                 .name = "mpc8xxx_wdt",
 266                 .of_match_table = mpc8xxx_wdt_match,
 267         },
 268 };
 269
 270 static int __init mpc8xxx_wdt_init(void)
 271 {
 272         return platform_driver_register(&mpc8xxx_wdt_driver);
 273 }
 274 arch_initcall(mpc8xxx_wdt_init);
 275
 276 static void __exit mpc8xxx_wdt_exit(void)
 277 {
 278         platform_driver_unregister(&mpc8xxx_wdt_driver);
 279 }
 280 module_exit(mpc8xxx_wdt_exit);
 281
 282 MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
 283 MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx "
 284                    "uProcessors");
 285 MODULE_LICENSE("GPL");