2 * linux/arch/arm/kernel/head-common.S
4 * Copyright (C) 1994-2002 Russell King
5 * Copyright (c) 2003 ARM Limited
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #define ATAG_CORE 0x54410001
15 #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
16 #define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2)
19 * Exception handling. Something went wrong and we can't proceed. We
20 * ought to tell the user, but since we don't have any guarantee that
21 * we're even running on the right architecture, we do virtually nothing.
23 * If CONFIG_DEBUG_LL is set we try to print out something about the error
24 * and hope for the best (useful if bootloader fails to pass a proper
25 * machine ID for example).
29 /* Determine validity of the r2 atags pointer. The heuristic requires
30 * that the pointer be aligned, in the first 16k of physical RAM and
31 * that the ATAG_CORE marker is first and present. Future revisions
32 * of this function may be more lenient with the physical address and
33 * may also be able to move the ATAGS block if necessary.
36 * r2 either valid atags pointer, or zero
40 tst r2, #0x3 @ aligned?
43 ldr r5, [r2, #0] @ is first tag ATAG_CORE?
44 cmp r5, #ATAG_CORE_SIZE
45 cmpne r5, #ATAG_CORE_SIZE_EMPTY
52 mov pc, lr @ atag pointer is ok
59 * The following fragment of code is executed with the MMU on in MMU mode,
60 * and uses absolute addresses; this is not position independent.
62 * r0 = cp#15 control register
69 adr r3, __mmap_switched_data
71 ldmia r3!, {r4, r5, r6, r7}
72 cmp r4, r5 @ Copy data segment if needed
78 mov fp, #0 @ Clear BSS (and zero fp)
83 ARM( ldmia r3, {r4, r5, r6, r7, sp})
84 THUMB( ldmia r3, {r4, r5, r6, r7} )
85 THUMB( ldr sp, [r3, #16] )
86 str r9, [r4] @ Save processor ID
87 str r1, [r5] @ Save machine type
88 str r2, [r6] @ Save atags pointer
89 bic r4, r0, #CR_A @ Clear 'A' bit
90 stmia r7, {r0, r4} @ Save control register values
92 ENDPROC(__mmap_switched)
95 .type __mmap_switched_data, %object
99 .long __bss_start @ r6
101 .long processor_id @ r4
102 .long __machine_arch_type @ r5
103 .long __atags_pointer @ r6
104 .long cr_alignment @ r7
105 .long init_thread_union + THREAD_START_SP @ sp
106 .size __mmap_switched_data, . - __mmap_switched_data
109 * This provides a C-API version of __lookup_processor_type
111 ENTRY(lookup_processor_type)
112 stmfd sp!, {r4 - r6, r9, lr}
114 bl __lookup_processor_type
116 ldmfd sp!, {r4 - r6, r9, pc}
117 ENDPROC(lookup_processor_type)
120 * Read processor ID register (CP#15, CR0), and look up in the linker-built
121 * supported processor list. Note that we can't use the absolute addresses
122 * for the __proc_info lists since we aren't running with the MMU on
123 * (and therefore, we are not in the correct address space). We have to
124 * calculate the offset.
128 * r3, r4, r6 corrupted
129 * r5 = proc_info pointer in physical address space
130 * r9 = cpuid (preserved)
133 __lookup_processor_type:
134 adr r3, __lookup_processor_type_data
136 sub r3, r3, r4 @ get offset between virt&phys
137 add r5, r5, r3 @ convert virt addresses to
138 add r6, r6, r3 @ physical address space
139 1: ldmia r5, {r3, r4} @ value, mask
140 and r4, r4, r9 @ mask wanted bits
143 add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list)
146 mov r5, #0 @ unknown processor
148 ENDPROC(__lookup_processor_type)
151 * Look in <asm/procinfo.h> for information about the __proc_info structure.
154 .type __lookup_processor_type_data, %object
155 __lookup_processor_type_data:
157 .long __proc_info_begin
158 .long __proc_info_end
159 .size __lookup_processor_type_data, . - __lookup_processor_type_data
162 #ifdef CONFIG_DEBUG_LL
170 str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x"
171 str_p2: .asciz ").\n"
177 #ifdef CONFIG_ARCH_RPC
179 * Turn the screen red on a error - RiscPC only.
183 orr r3, r3, r3, lsl #8
184 orr r3, r3, r3, lsl #16