arch/arm/mach-msm/include/mach/clk.h

   1 /* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
   2  *
   3  * Redistribution and use in source and binary forms, with or without
   4  * modification, are permitted provided that the following conditions are
   5  * met:
   6  *     * Redistributions of source code must retain the above copyright
   7  *       notice, this list of conditions and the following disclaimer.
   8  *     * Redistributions in binary form must reproduce the above
   9  *       copyright notice, this list of conditions and the following
  10  *       disclaimer in the documentation and/or other materials provided
  11  *       with the distribution.
  12  *     * Neither the name of Code Aurora Forum, Inc. nor the names of its
  13  *       contributors may be used to endorse or promote products derived
  14  *       from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
  20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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  26  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  */
  29 #ifndef __MACH_CLK_H
  30 #define __MACH_CLK_H
  31
  32 /* Magic rate value for use with PM QOS to request the board's maximum
  33  * supported AXI rate. PM QOS will only pass positive s32 rate values
  34  * through to the clock driver, so INT_MAX is used.
  35  */
  36 #define MSM_AXI_MAX_FREQ        LONG_MAX
  37
  38 enum clk_reset_action {
  39         CLK_RESET_DEASSERT      = 0,
  40         CLK_RESET_ASSERT        = 1
  41 };
  42
  43 struct clk;
  44
  45 /* Rate is minimum clock rate in Hz */
  46 int clk_set_min_rate(struct clk *clk, unsigned long rate);
  47
  48 /* Rate is maximum clock rate in Hz */
  49 int clk_set_max_rate(struct clk *clk, unsigned long rate);
  50
  51 /* Assert/Deassert reset to a hardware block associated with a clock */
  52 int clk_reset(struct clk *clk, enum clk_reset_action action);
  53
  54 /* Set clock-specific configuration parameters */
  55 int clk_set_flags(struct clk *clk, unsigned long flags);
  56
  57 #endif