arch/arm/mach-pnx4008/include/mach/i2c.h

   1 /*
   2  * PNX4008-specific tweaks for I2C IP3204 block
   3  *
   4  * Author: Vitaly Wool <vwool@ru.mvista.com>
   5  *
   6  * 2005 (c) MontaVista Software, Inc. This file is licensed under
   7  * the terms of the GNU General Public License version 2. This program
   8  * is licensed "as is" without any warranty of any kind, whether express
   9  * or implied.
  10  */
  11
  12 #ifndef __ASM_ARCH_I2C_H__
  13 #define __ASM_ARCH_I2C_H__
  14
  15 enum {
  16         mstatus_tdi = 0x00000001,
  17         mstatus_afi = 0x00000002,
  18         mstatus_nai = 0x00000004,
  19         mstatus_drmi = 0x00000008,
  20         mstatus_active = 0x00000020,
  21         mstatus_scl = 0x00000040,
  22         mstatus_sda = 0x00000080,
  23         mstatus_rff = 0x00000100,
  24         mstatus_rfe = 0x00000200,
  25         mstatus_tff = 0x00000400,
  26         mstatus_tfe = 0x00000800,
  27 };
  28
  29 enum {
  30         mcntrl_tdie = 0x00000001,
  31         mcntrl_afie = 0x00000002,
  32         mcntrl_naie = 0x00000004,
  33         mcntrl_drmie = 0x00000008,
  34         mcntrl_daie = 0x00000020,
  35         mcntrl_rffie = 0x00000040,
  36         mcntrl_tffie = 0x00000080,
  37         mcntrl_reset = 0x00000100,
  38         mcntrl_cdbmode = 0x00000400,
  39 };
  40
  41 enum {
  42         rw_bit = 1 << 0,
  43         start_bit = 1 << 8,
  44         stop_bit = 1 << 9,
  45 };
  46
  47 #define I2C_REG_RX(a)   ((a)->ioaddr)           /* Rx FIFO reg (RO) */
  48 #define I2C_REG_TX(a)   ((a)->ioaddr)           /* Tx FIFO reg (WO) */
  49 #define I2C_REG_STS(a)  ((a)->ioaddr + 0x04)    /* Status reg (RO) */
  50 #define I2C_REG_CTL(a)  ((a)->ioaddr + 0x08)    /* Ctl reg */
  51 #define I2C_REG_CKL(a)  ((a)->ioaddr + 0x0c)    /* Clock divider low */
  52 #define I2C_REG_CKH(a)  ((a)->ioaddr + 0x10)    /* Clock divider high */
  53 #define I2C_REG_ADR(a)  ((a)->ioaddr + 0x14)    /* I2C address */
  54 #define I2C_REG_RFL(a)  ((a)->ioaddr + 0x18)    /* Rx FIFO level (RO) */
  55 #define I2C_REG_TFL(a)  ((a)->ioaddr + 0x1c)    /* Tx FIFO level (RO) */
  56 #define I2C_REG_RXB(a)  ((a)->ioaddr + 0x20)    /* Num of bytes Rx-ed (RO) */
  57 #define I2C_REG_TXB(a)  ((a)->ioaddr + 0x24)    /* Num of bytes Tx-ed (RO) */
  58 #define I2C_REG_TXS(a)  ((a)->ioaddr + 0x28)    /* Tx slave FIFO (RO) */
  59 #define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c)    /* Tx slave FIFO level (RO) */
  60
  61 #define HCLK_MHZ                13
  62 #define I2C_CHIP_NAME           "PNX4008-I2C"
  63
  64 #endif                          /* __ASM_ARCH_I2C_H___ */