arch/arm/mach-tegra/clock.h

   1 /*
   2  * arch/arm/mach-tegra/include/mach/clock.h
   3  *
   4  * Copyright (C) 2010 Google, Inc.
   5  *
   6  * Author:
   7  *      Colin Cross <ccross@google.com>
   8  *
   9  * This software is licensed under the terms of the GNU General Public
  10  * License version 2, as published by the Free Software Foundation, and
  11  * may be copied, distributed, and modified under those terms.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  */
  19
  20 #ifndef __MACH_TEGRA_CLOCK_H
  21 #define __MACH_TEGRA_CLOCK_H
  22
  23 #include <linux/list.h>
  24 #include <linux/clkdev.h>
  25
  26 #define DIV_BUS                 (1 << 0)
  27 #define DIV_U71                 (1 << 1)
  28 #define DIV_U71_FIXED           (1 << 2)
  29 #define DIV_2                   (1 << 3)
  30 #define DIV_U16                 (1 << 4)
  31 #define PLL_FIXED               (1 << 5)
  32 #define PLL_HAS_CPCON           (1 << 6)
  33 #define MUX                     (1 << 7)
  34 #define PLLD                    (1 << 8)
  35 #define PERIPH_NO_RESET         (1 << 9)
  36 #define PERIPH_NO_ENB           (1 << 10)
  37 #define PERIPH_EMC_ENB          (1 << 11)
  38 #define PERIPH_MANUAL_RESET     (1 << 12)
  39 #define PLL_ALT_MISC_REG        (1 << 13)
  40 #define PLLU                    (1 << 14)
  41 #define ENABLE_ON_INIT          (1 << 28)
  42
  43 struct clk;
  44 struct regulator;
  45
  46 struct dvfs_table {
  47         unsigned long rate;
  48         int millivolts;
  49 };
  50
  51 struct dvfs_process_id_table {
  52         int process_id;
  53         struct dvfs_table *table;
  54 };
  55
  56
  57 struct dvfs {
  58         struct regulator *reg;
  59         struct dvfs_table *table;
  60         int max_millivolts;
  61
  62         int process_id_table_length;
  63         const char *reg_id;
  64         bool cpu;
  65         struct dvfs_process_id_table process_id_table[];
  66 };
  67
  68 struct clk_mux_sel {
  69         struct clk      *input;
  70         u32             value;
  71 };
  72
  73 struct clk_pll_table {
  74         unsigned long   input_rate;
  75         unsigned long   output_rate;
  76         u16             n;
  77         u16             m;
  78         u8              p;
  79         u8              cpcon;
  80 };
  81
  82 struct clk_ops {
  83         void            (*init)(struct clk *);
  84         int             (*enable)(struct clk *);
  85         void            (*disable)(struct clk *);
  86         int             (*set_parent)(struct clk *, struct clk *);
  87         int             (*set_rate)(struct clk *, unsigned long);
  88         long            (*round_rate)(struct clk *, unsigned long);
  89 };
  90
  91 enum clk_state {
  92         UNINITIALIZED = 0,
  93         ON,
  94         OFF,
  95 };
  96
  97 struct clk {
  98         /* node for master clocks list */
  99         struct list_head                node;
 100         struct list_head                children;       /* list of children */
 101         struct list_head                sibling;        /* node for children */
 102 #ifdef CONFIG_DEBUG_FS
 103         struct dentry                   *dent;
 104         struct dentry                   *parent_dent;
 105 #endif
 106         struct clk_ops                  *ops;
 107         struct clk                      *parent;
 108         struct clk_lookup               lookup;
 109         unsigned long                   rate;
 110         unsigned long                   max_rate;
 111         u32                             flags;
 112         u32                             refcnt;
 113         const char                      *name;
 114         u32                             reg;
 115         u32                             reg_shift;
 116         unsigned int                    clk_num;
 117         enum clk_state                  state;
 118 #ifdef CONFIG_DEBUG_FS
 119         bool                            set;
 120 #endif
 121
 122         /* PLL */
 123         unsigned long                   input_min;
 124         unsigned long                   input_max;
 125         unsigned long                   cf_min;
 126         unsigned long                   cf_max;
 127         unsigned long                   vco_min;
 128         unsigned long                   vco_max;
 129         const struct clk_pll_table      *pll_table;
 130
 131         /* DIV */
 132         u32                             div;
 133         u32                             mul;
 134
 135         /* MUX */
 136         const struct clk_mux_sel        *inputs;
 137         u32                             sel;
 138         u32                             reg_mask;
 139
 140         /* Virtual cpu clock */
 141         struct clk                      *main;
 142         struct clk                      *backup;
 143
 144         struct dvfs                     *dvfs;
 145 };
 146
 147
 148 struct clk_duplicate {
 149         const char *name;
 150         struct clk_lookup lookup;
 151 };
 152
 153 struct tegra_clk_init_table {
 154         const char *name;
 155         const char *parent;
 156         unsigned long rate;
 157         bool enabled;
 158 };
 159
 160 void tegra2_init_clocks(void);
 161 void tegra2_periph_reset_deassert(struct clk *c);
 162 void tegra2_periph_reset_assert(struct clk *c);
 163 void clk_init(struct clk *clk);
 164 struct clk *tegra_get_clock_by_name(const char *name);
 165 unsigned long clk_measure_input_freq(void);
 166 void clk_disable_locked(struct clk *c);
 167 int clk_enable_locked(struct clk *c);
 168 int clk_set_parent_locked(struct clk *c, struct clk *parent);
 169 int clk_set_rate_locked(struct clk *c, unsigned long rate);
 170 int clk_reparent(struct clk *c, struct clk *parent);
 171 void tegra_clk_init_from_table(struct tegra_clk_init_table *table);
 172
 173 #endif