arch/arm/plat-mxc/include/mach/iomux-mxc91231.h

   1 /*
   2  * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
   4  * Copyright (C) 2009 by Dmitriy Taychenachev <dimichxp@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #ifndef __MACH_IOMUX_MXC91231_H__
  18 #define __MACH_IOMUX_MXC91231_H__
  19
  20 /*
  21  * various IOMUX output functions
  22  */
  23
  24 #define IOMUX_OCONFIG_GPIO (0 << 4)     /* used as GPIO */
  25 #define IOMUX_OCONFIG_FUNC (1 << 4)     /* used as function */
  26 #define IOMUX_OCONFIG_ALT1 (2 << 4)     /* used as alternate function 1 */
  27 #define IOMUX_OCONFIG_ALT2 (3 << 4)     /* used as alternate function 2 */
  28 #define IOMUX_OCONFIG_ALT3 (4 << 4)     /* used as alternate function 3 */
  29 #define IOMUX_OCONFIG_ALT4 (5 << 4)     /* used as alternate function 4 */
  30 #define IOMUX_OCONFIG_ALT5 (6 << 4)     /* used as alternate function 5 */
  31 #define IOMUX_OCONFIG_ALT6 (7 << 4)     /* used as alternate function 6 */
  32 #define IOMUX_ICONFIG_NONE  0           /* not configured for input */
  33 #define IOMUX_ICONFIG_GPIO  1           /* used as GPIO */
  34 #define IOMUX_ICONFIG_FUNC  2           /* used as function */
  35 #define IOMUX_ICONFIG_ALT1  4           /* used as alternate function 1 */
  36 #define IOMUX_ICONFIG_ALT2  8           /* used as alternate function 2 */
  37
  38 #define IOMUX_CONFIG_GPIO (IOMUX_OCONFIG_GPIO | IOMUX_ICONFIG_GPIO)
  39 #define IOMUX_CONFIG_FUNC (IOMUX_OCONFIG_FUNC | IOMUX_ICONFIG_FUNC)
  40 #define IOMUX_CONFIG_ALT1 (IOMUX_OCONFIG_ALT1 | IOMUX_ICONFIG_ALT1)
  41 #define IOMUX_CONFIG_ALT2 (IOMUX_OCONFIG_ALT2 | IOMUX_ICONFIG_ALT2)
  42
  43 /*
  44  * setups a single pin:
  45  *      - reserves the pin so that it is not claimed by another driver
  46  *      - setups the iomux according to the configuration
  47  *      - if the pin is configured as a GPIO, we claim it through kernel gpiolib
  48  */
  49 int mxc_iomux_alloc_pin(const unsigned int pin_mode, const char *label);
  50 /*
  51  * setups mutliple pins
  52  * convenient way to call the above function with tables
  53  */
  54 int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count,
  55                 const char *label);
  56
  57 /*
  58  * releases a single pin:
  59  *      - make it available for a future use by another driver
  60  *      - frees the GPIO if the pin was configured as GPIO
  61  *      - DOES NOT reconfigure the IOMUX in its reset state
  62  */
  63 void mxc_iomux_release_pin(const unsigned int pin_mode);
  64 /*
  65  * releases multiple pins
  66  * convenvient way to call the above function with tables
  67  */
  68 void mxc_iomux_release_multiple_pins(unsigned int *pin_list, int count);
  69
  70 #define MUX_SIDE_AP             (0)
  71 #define MUX_SIDE_SP             (1)
  72
  73 #define MUX_SIDE_SHIFT          (26)
  74 #define MUX_SIDE_MASK           (0x1 << MUX_SIDE_SHIFT)
  75
  76 #define MUX_GPIO_PORT_SHIFT     (23)
  77 #define MUX_GPIO_PORT_MASK      (0x7 << MUX_GPIO_PORT_SHIFT)
  78
  79 #define MUX_GPIO_PIN_SHIFT      (20)
  80 #define MUX_GPIO_PIN_MASK       (0x1f << MUX_GPIO_PIN_SHIFT)
  81
  82 #define MUX_REG_SHIFT           (15)
  83 #define MUX_REG_MASK            (0x1f << MUX_REG_SHIFT)
  84
  85 #define MUX_FIELD_SHIFT         (13)
  86 #define MUX_FIELD_MASK          (0x3 << MUX_FIELD_SHIFT)
  87
  88 #define MUX_PADGRP_SHIFT        (8)
  89 #define MUX_PADGRP_MASK         (0x1f << MUX_PADGRP_SHIFT)
  90
  91 #define MUX_PIN_MASK            (0xffffff << 8)
  92
  93 #define GPIO_PORT_MAX           (3)
  94
  95 #define IOMUX_PIN(side, gport, gpin, ctlreg, ctlfield, padgrp) \
  96         (((side) << MUX_SIDE_SHIFT) |             \
  97          (gport << MUX_GPIO_PORT_SHIFT) |               \
  98          ((gpin) << MUX_GPIO_PIN_SHIFT) |               \
  99          ((ctlreg) << MUX_REG_SHIFT) |          \
 100          ((ctlfield) << MUX_FIELD_SHIFT) |              \
 101          ((padgrp) << MUX_PADGRP_SHIFT))
 102
 103 #define MUX_MODE_OUT_SHIFT      (4)
 104 #define MUX_MODE_IN_SHIFT       (0)
 105 #define MUX_MODE_SHIFT          (0)
 106 #define MUX_MODE_MASK           (0xff << MUX_MODE_SHIFT)
 107
 108 #define IOMUX_MODE(pin, mode) \
 109         (pin | (mode << MUX_MODE_SHIFT))
 110
 111 enum iomux_pins {
 112         /* AP Side pins */
 113         MXC91231_PIN_AP_CLE             = IOMUX_PIN(0, 0,  0,  0, 0, 24),
 114         MXC91231_PIN_AP_ALE             = IOMUX_PIN(0, 0,  1,  0, 1, 24),
 115         MXC91231_PIN_AP_CE_B            = IOMUX_PIN(0, 0,  2,  0, 2, 24),
 116         MXC91231_PIN_AP_RE_B            = IOMUX_PIN(0, 0,  3,  0, 3, 24),
 117         MXC91231_PIN_AP_WE_B            = IOMUX_PIN(0, 0,  4,  1, 0, 24),
 118         MXC91231_PIN_AP_WP_B            = IOMUX_PIN(0, 0,  5,  1, 1, 24),
 119         MXC91231_PIN_AP_BSY_B           = IOMUX_PIN(0, 0,  6,  1, 2, 24),
 120         MXC91231_PIN_AP_U1_TXD          = IOMUX_PIN(0, 0,  7,  1, 3, 28),
 121         MXC91231_PIN_AP_U1_RXD          = IOMUX_PIN(0, 0,  8,  2, 0, 28),
 122         MXC91231_PIN_AP_U1_RTS_B        = IOMUX_PIN(0, 0,  9,  2, 1, 28),
 123         MXC91231_PIN_AP_U1_CTS_B        = IOMUX_PIN(0, 0, 10,  2, 2, 28),
 124         MXC91231_PIN_AP_AD1_TXD         = IOMUX_PIN(0, 0, 11,  2, 3,  9),
 125         MXC91231_PIN_AP_AD1_RXD         = IOMUX_PIN(0, 0, 12,  3, 0,  9),
 126         MXC91231_PIN_AP_AD1_TXC         = IOMUX_PIN(0, 0, 13,  3, 1,  9),
 127         MXC91231_PIN_AP_AD1_TXFS        = IOMUX_PIN(0, 0, 14,  3, 2,  9),
 128         MXC91231_PIN_AP_AD2_TXD         = IOMUX_PIN(0, 0, 15,  3, 3,  9),
 129         MXC91231_PIN_AP_AD2_RXD         = IOMUX_PIN(0, 0, 16,  4, 0,  9),
 130         MXC91231_PIN_AP_AD2_TXC         = IOMUX_PIN(0, 0, 17,  4, 1,  9),
 131         MXC91231_PIN_AP_AD2_TXFS        = IOMUX_PIN(0, 0, 18,  4, 2,  9),
 132         MXC91231_PIN_AP_OWDAT           = IOMUX_PIN(0, 0, 19,  4, 3, 28),
 133         MXC91231_PIN_AP_IPU_LD17        = IOMUX_PIN(0, 0, 20,  5, 0, 28),
 134         MXC91231_PIN_AP_IPU_D3_VSYNC    = IOMUX_PIN(0, 0, 21,  5, 1, 28),
 135         MXC91231_PIN_AP_IPU_D3_HSYNC    = IOMUX_PIN(0, 0, 22,  5, 2, 28),
 136         MXC91231_PIN_AP_IPU_D3_CLK      = IOMUX_PIN(0, 0, 23,  5, 3, 28),
 137         MXC91231_PIN_AP_IPU_D3_DRDY     = IOMUX_PIN(0, 0, 24,  6, 0, 28),
 138         MXC91231_PIN_AP_IPU_D3_CONTR    = IOMUX_PIN(0, 0, 25,  6, 1, 28),
 139         MXC91231_PIN_AP_IPU_D0_CS       = IOMUX_PIN(0, 0, 26,  6, 2, 28),
 140         MXC91231_PIN_AP_IPU_LD16        = IOMUX_PIN(0, 0, 27,  6, 3, 28),
 141         MXC91231_PIN_AP_IPU_D2_CS       = IOMUX_PIN(0, 0, 28,  7, 0, 28),
 142         MXC91231_PIN_AP_IPU_PAR_RS      = IOMUX_PIN(0, 0, 29,  7, 1, 28),
 143         MXC91231_PIN_AP_IPU_D3_PS       = IOMUX_PIN(0, 0, 30,  7, 2, 28),
 144         MXC91231_PIN_AP_IPU_D3_CLS      = IOMUX_PIN(0, 0, 31,  7, 3, 28),
 145         MXC91231_PIN_AP_IPU_RD          = IOMUX_PIN(0, 1,  0,  8, 0, 28),
 146         MXC91231_PIN_AP_IPU_WR          = IOMUX_PIN(0, 1,  1,  8, 1, 28),
 147         MXC91231_PIN_AP_IPU_LD0         = IOMUX_PIN(0, 7,  0,  8, 2, 28),
 148         MXC91231_PIN_AP_IPU_LD1         = IOMUX_PIN(0, 7,  0,  8, 3, 28),
 149         MXC91231_PIN_AP_IPU_LD2         = IOMUX_PIN(0, 7,  0,  9, 0, 28),
 150         MXC91231_PIN_AP_IPU_LD3         = IOMUX_PIN(0, 1,  2,  9, 1, 28),
 151         MXC91231_PIN_AP_IPU_LD4         = IOMUX_PIN(0, 1,  3,  9, 2, 28),
 152         MXC91231_PIN_AP_IPU_LD5         = IOMUX_PIN(0, 1,  4,  9, 3, 28),
 153         MXC91231_PIN_AP_IPU_LD6         = IOMUX_PIN(0, 1,  5, 10, 0, 28),
 154         MXC91231_PIN_AP_IPU_LD7         = IOMUX_PIN(0, 1,  6, 10, 1, 28),
 155         MXC91231_PIN_AP_IPU_LD8         = IOMUX_PIN(0, 1,  7, 10, 2, 28),
 156         MXC91231_PIN_AP_IPU_LD9         = IOMUX_PIN(0, 1,  8, 10, 3, 28),
 157         MXC91231_PIN_AP_IPU_LD10        = IOMUX_PIN(0, 1,  9, 11, 0, 28),
 158         MXC91231_PIN_AP_IPU_LD11        = IOMUX_PIN(0, 1, 10, 11, 1, 28),
 159         MXC91231_PIN_AP_IPU_LD12        = IOMUX_PIN(0, 1, 11, 11, 2, 28),
 160         MXC91231_PIN_AP_IPU_LD13        = IOMUX_PIN(0, 1, 12, 11, 3, 28),
 161         MXC91231_PIN_AP_IPU_LD14        = IOMUX_PIN(0, 1, 13, 12, 0, 28),
 162         MXC91231_PIN_AP_IPU_LD15        = IOMUX_PIN(0, 1, 14, 12, 1, 28),
 163         MXC91231_PIN_AP_KPROW4          = IOMUX_PIN(0, 7,  0, 12, 2, 10),
 164         MXC91231_PIN_AP_KPROW5          = IOMUX_PIN(0, 1, 16, 12, 3, 10),
 165         MXC91231_PIN_AP_GPIO_AP_B17     = IOMUX_PIN(0, 1, 17, 13, 0, 10),
 166         MXC91231_PIN_AP_GPIO_AP_B18     = IOMUX_PIN(0, 1, 18, 13, 1, 10),
 167         MXC91231_PIN_AP_KPCOL3          = IOMUX_PIN(0, 1, 19, 13, 2, 11),
 168         MXC91231_PIN_AP_KPCOL4          = IOMUX_PIN(0, 1, 20, 13, 3, 11),
 169         MXC91231_PIN_AP_KPCOL5          = IOMUX_PIN(0, 1, 21, 14, 0, 11),
 170         MXC91231_PIN_AP_GPIO_AP_B22     = IOMUX_PIN(0, 1, 22, 14, 1, 11),
 171         MXC91231_PIN_AP_GPIO_AP_B23     = IOMUX_PIN(0, 1, 23, 14, 2, 11),
 172         MXC91231_PIN_AP_CSI_D0          = IOMUX_PIN(0, 1, 24, 14, 3, 21),
 173         MXC91231_PIN_AP_CSI_D1          = IOMUX_PIN(0, 1, 25, 15, 0, 21),
 174         MXC91231_PIN_AP_CSI_D2          = IOMUX_PIN(0, 1, 26, 15, 1, 21),
 175         MXC91231_PIN_AP_CSI_D3          = IOMUX_PIN(0, 1, 27, 15, 2, 21),
 176         MXC91231_PIN_AP_CSI_D4          = IOMUX_PIN(0, 1, 28, 15, 3, 21),
 177         MXC91231_PIN_AP_CSI_D5          = IOMUX_PIN(0, 1, 29, 16, 0, 21),
 178         MXC91231_PIN_AP_CSI_D6          = IOMUX_PIN(0, 1, 30, 16, 1, 21),
 179         MXC91231_PIN_AP_CSI_D7          = IOMUX_PIN(0, 1, 31, 16, 2, 21),
 180         MXC91231_PIN_AP_CSI_D8          = IOMUX_PIN(0, 2,  0, 16, 3, 21),
 181         MXC91231_PIN_AP_CSI_D9          = IOMUX_PIN(0, 2,  1, 17, 0, 21),
 182         MXC91231_PIN_AP_CSI_MCLK        = IOMUX_PIN(0, 2,  2, 17, 1, 21),
 183         MXC91231_PIN_AP_CSI_VSYNC       = IOMUX_PIN(0, 2,  3, 17, 2, 21),
 184         MXC91231_PIN_AP_CSI_HSYNC       = IOMUX_PIN(0, 2,  4, 17, 3, 21),
 185         MXC91231_PIN_AP_CSI_PIXCLK      = IOMUX_PIN(0, 2,  5, 18, 0, 21),
 186         MXC91231_PIN_AP_I2CLK           = IOMUX_PIN(0, 2,  6, 18, 1, 12),
 187         MXC91231_PIN_AP_I2DAT           = IOMUX_PIN(0, 2,  7, 18, 2, 12),
 188         MXC91231_PIN_AP_GPIO_AP_C8      = IOMUX_PIN(0, 2,  8, 18, 3,  9),
 189         MXC91231_PIN_AP_GPIO_AP_C9      = IOMUX_PIN(0, 2,  9, 19, 0,  9),
 190         MXC91231_PIN_AP_GPIO_AP_C10     = IOMUX_PIN(0, 2, 10, 19, 1,  9),
 191         MXC91231_PIN_AP_GPIO_AP_C11     = IOMUX_PIN(0, 2, 11, 19, 2,  9),
 192         MXC91231_PIN_AP_GPIO_AP_C12     = IOMUX_PIN(0, 2, 12, 19, 3,  9),
 193         MXC91231_PIN_AP_GPIO_AP_C13     = IOMUX_PIN(0, 2, 13, 20, 0, 28),
 194         MXC91231_PIN_AP_GPIO_AP_C14     = IOMUX_PIN(0, 2, 14, 20, 1, 28),
 195         MXC91231_PIN_AP_GPIO_AP_C15     = IOMUX_PIN(0, 2, 15, 20, 2,  9),
 196         MXC91231_PIN_AP_GPIO_AP_C16     = IOMUX_PIN(0, 2, 16, 20, 3,  9),
 197         MXC91231_PIN_AP_GPIO_AP_C17     = IOMUX_PIN(0, 2, 17, 21, 0,  9),
 198         MXC91231_PIN_AP_ED_INT0         = IOMUX_PIN(0, 2, 18, 21, 1, 22),
 199         MXC91231_PIN_AP_ED_INT1         = IOMUX_PIN(0, 2, 19, 21, 2, 22),
 200         MXC91231_PIN_AP_ED_INT2         = IOMUX_PIN(0, 2, 20, 21, 3, 22),
 201         MXC91231_PIN_AP_ED_INT3         = IOMUX_PIN(0, 2, 21, 22, 0, 22),
 202         MXC91231_PIN_AP_ED_INT4         = IOMUX_PIN(0, 2, 22, 22, 1, 23),
 203         MXC91231_PIN_AP_ED_INT5         = IOMUX_PIN(0, 2, 23, 22, 2, 23),
 204         MXC91231_PIN_AP_ED_INT6         = IOMUX_PIN(0, 2, 24, 22, 3, 23),
 205         MXC91231_PIN_AP_ED_INT7         = IOMUX_PIN(0, 2, 25, 23, 0, 23),
 206         MXC91231_PIN_AP_U2_DSR_B        = IOMUX_PIN(0, 2, 26, 23, 1, 28),
 207         MXC91231_PIN_AP_U2_RI_B         = IOMUX_PIN(0, 2, 27, 23, 2, 28),
 208         MXC91231_PIN_AP_U2_CTS_B        = IOMUX_PIN(0, 2, 28, 23, 3, 28),
 209         MXC91231_PIN_AP_U2_DTR_B        = IOMUX_PIN(0, 2, 29, 24, 0, 28),
 210         MXC91231_PIN_AP_KPROW0          = IOMUX_PIN(0, 7,  0, 24, 1, 10),
 211         MXC91231_PIN_AP_KPROW1          = IOMUX_PIN(0, 1, 15, 24, 2, 10),
 212         MXC91231_PIN_AP_KPROW2          = IOMUX_PIN(0, 7,  0, 24, 3, 10),
 213         MXC91231_PIN_AP_KPROW3          = IOMUX_PIN(0, 7,  0, 25, 0, 10),
 214         MXC91231_PIN_AP_KPCOL0          = IOMUX_PIN(0, 7,  0, 25, 1, 11),
 215         MXC91231_PIN_AP_KPCOL1          = IOMUX_PIN(0, 7,  0, 25, 2, 11),
 216         MXC91231_PIN_AP_KPCOL2          = IOMUX_PIN(0, 7,  0, 25, 3, 11),
 217
 218         /* Shared pins */
 219         MXC91231_PIN_SP_U3_TXD          = IOMUX_PIN(1, 3,  0,  0, 0, 28),
 220         MXC91231_PIN_SP_U3_RXD          = IOMUX_PIN(1, 3,  1,  0, 1, 28),
 221         MXC91231_PIN_SP_U3_RTS_B        = IOMUX_PIN(1, 3,  2,  0, 2, 28),
 222         MXC91231_PIN_SP_U3_CTS_B        = IOMUX_PIN(1, 3,  3,  0, 3, 28),
 223         MXC91231_PIN_SP_USB_TXOE_B      = IOMUX_PIN(1, 3,  4,  1, 0, 28),
 224         MXC91231_PIN_SP_USB_DAT_VP      = IOMUX_PIN(1, 3,  5,  1, 1, 28),
 225         MXC91231_PIN_SP_USB_SE0_VM      = IOMUX_PIN(1, 3,  6,  1, 2, 28),
 226         MXC91231_PIN_SP_USB_RXD         = IOMUX_PIN(1, 3,  7,  1, 3, 28),
 227         MXC91231_PIN_SP_UH2_TXOE_B      = IOMUX_PIN(1, 3,  8,  2, 0, 28),
 228         MXC91231_PIN_SP_UH2_SPEED       = IOMUX_PIN(1, 3,  9,  2, 1, 28),
 229         MXC91231_PIN_SP_UH2_SUSPEN      = IOMUX_PIN(1, 3, 10,  2, 2, 28),
 230         MXC91231_PIN_SP_UH2_TXDP        = IOMUX_PIN(1, 3, 11,  2, 3, 28),
 231         MXC91231_PIN_SP_UH2_RXDP        = IOMUX_PIN(1, 3, 12,  3, 0, 28),
 232         MXC91231_PIN_SP_UH2_RXDM        = IOMUX_PIN(1, 3, 13,  3, 1, 28),
 233         MXC91231_PIN_SP_UH2_OVR         = IOMUX_PIN(1, 3, 14,  3, 2, 28),
 234         MXC91231_PIN_SP_UH2_PWR         = IOMUX_PIN(1, 3, 15,  3, 3, 28),
 235         MXC91231_PIN_SP_SD1_DAT0        = IOMUX_PIN(1, 3, 16,  4, 0, 25),
 236         MXC91231_PIN_SP_SD1_DAT1        = IOMUX_PIN(1, 3, 17,  4, 1, 25),
 237         MXC91231_PIN_SP_SD1_DAT2        = IOMUX_PIN(1, 3, 18,  4, 2, 25),
 238         MXC91231_PIN_SP_SD1_DAT3        = IOMUX_PIN(1, 3, 19,  4, 3, 25),
 239         MXC91231_PIN_SP_SD1_CMD         = IOMUX_PIN(1, 3, 20,  5, 0, 25),
 240         MXC91231_PIN_SP_SD1_CLK         = IOMUX_PIN(1, 3, 21,  5, 1, 25),
 241         MXC91231_PIN_SP_SD2_DAT0        = IOMUX_PIN(1, 3, 22,  5, 2, 26),
 242         MXC91231_PIN_SP_SD2_DAT1        = IOMUX_PIN(1, 3, 23,  5, 3, 26),
 243         MXC91231_PIN_SP_SD2_DAT2        = IOMUX_PIN(1, 3, 24,  6, 0, 26),
 244         MXC91231_PIN_SP_SD2_DAT3        = IOMUX_PIN(1, 3, 25,  6, 1, 26),
 245         MXC91231_PIN_SP_GPIO_SP_A26     = IOMUX_PIN(1, 3, 26,  6, 2, 28),
 246         MXC91231_PIN_SP_SPI1_CLK        = IOMUX_PIN(1, 3, 27,  6, 3, 13),
 247         MXC91231_PIN_SP_SPI1_MOSI       = IOMUX_PIN(1, 3, 28,  7, 0, 13),
 248         MXC91231_PIN_SP_SPI1_MISO       = IOMUX_PIN(1, 3, 29,  7, 1, 13),
 249         MXC91231_PIN_SP_SPI1_SS0        = IOMUX_PIN(1, 3, 30,  7, 2, 13),
 250         MXC91231_PIN_SP_SPI1_SS1        = IOMUX_PIN(1, 3, 31,  7, 3, 13),
 251         MXC91231_PIN_SP_SD2_CMD         = IOMUX_PIN(1, 7,  0,  8, 0, 26),
 252         MXC91231_PIN_SP_SD2_CLK         = IOMUX_PIN(1, 7,  0,  8, 1, 26),
 253         MXC91231_PIN_SP_SIM1_RST_B      = IOMUX_PIN(1, 2, 30,  8, 2, 28),
 254         MXC91231_PIN_SP_SIM1_SVEN       = IOMUX_PIN(1, 7,  0,  8, 3, 28),
 255         MXC91231_PIN_SP_SIM1_CLK        = IOMUX_PIN(1, 7,  0,  9, 0, 28),
 256         MXC91231_PIN_SP_SIM1_TRXD       = IOMUX_PIN(1, 7,  0,  9, 1, 28),
 257         MXC91231_PIN_SP_SIM1_PD         = IOMUX_PIN(1, 2, 31,  9, 2, 28),
 258         MXC91231_PIN_SP_UH2_TXDM        = IOMUX_PIN(1, 7,  0,  9, 3, 28),
 259         MXC91231_PIN_SP_UH2_RXD         = IOMUX_PIN(1, 7,  0, 10, 0, 28),
 260 };
 261
 262 #define PIN_AP_MAX      (104)
 263 #define PIN_SP_MAX      (41)
 264
 265 #define PIN_MAX         (PIN_AP_MAX + PIN_SP_MAX)
 266
 267 /*
 268  * Convenience values for use with mxc_iomux_mode()
 269  *
 270  * Format here is MXC91231_PIN_(pin name)__(function)
 271  */
 272
 273 #define MXC91231_PIN_SP_USB_DAT_VP__USB_DAT_VP \
 274         IOMUX_MODE(MXC91231_PIN_SP_USB_DAT_VP, IOMUX_CONFIG_FUNC)
 275 #define MXC91231_PIN_SP_USB_SE0_VM__USB_SE0_VM \
 276         IOMUX_MODE(MXC91231_PIN_SP_USB_SE0_VM, IOMUX_CONFIG_FUNC)
 277 #define MXC91231_PIN_SP_USB_DAT_VP__RXD2 \
 278         IOMUX_MODE(MXC91231_PIN_SP_USB_DAT_VP, IOMUX_CONFIG_ALT1)
 279 #define MXC91231_PIN_SP_USB_SE0_VM__TXD2 \
 280         IOMUX_MODE(MXC91231_PIN_SP_USB_SE0_VM, IOMUX_CONFIG_ALT1)
 281
 282
 283 #endif /* __MACH_IOMUX_MXC91231_H__ */