arch/arm/plat-nomadik/include/plat/ste_dma40.h

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2007-2010
   3  * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
   4  * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
   5  * License terms: GNU General Public License (GPL) version 2
   6  */
   7
   8
   9 #ifndef STE_DMA40_H
  10 #define STE_DMA40_H
  11
  12 #include <linux/dmaengine.h>
  13 #include <linux/workqueue.h>
  14 #include <linux/interrupt.h>
  15
  16 /*
  17  * Maxium size for a single dma descriptor
  18  * Size is limited to 16 bits.
  19  * Size is in the units of addr-widths (1,2,4,8 bytes)
  20  * Larger transfers will be split up to multiple linked desc
  21  */
  22 #define STEDMA40_MAX_SEG_SIZE 0xFFFF
  23
  24 /* dev types for memcpy */
  25 #define STEDMA40_DEV_DST_MEMORY (-1)
  26 #define STEDMA40_DEV_SRC_MEMORY (-1)
  27
  28 enum stedma40_mode {
  29         STEDMA40_MODE_LOGICAL = 0,
  30         STEDMA40_MODE_PHYSICAL,
  31         STEDMA40_MODE_OPERATION,
  32 };
  33
  34 enum stedma40_mode_opt {
  35         STEDMA40_PCHAN_BASIC_MODE = 0,
  36         STEDMA40_LCHAN_SRC_LOG_DST_LOG = 0,
  37         STEDMA40_PCHAN_MODULO_MODE,
  38         STEDMA40_PCHAN_DOUBLE_DST_MODE,
  39         STEDMA40_LCHAN_SRC_PHY_DST_LOG,
  40         STEDMA40_LCHAN_SRC_LOG_DST_PHY,
  41 };
  42
  43 #define STEDMA40_ESIZE_8_BIT  0x0
  44 #define STEDMA40_ESIZE_16_BIT 0x1
  45 #define STEDMA40_ESIZE_32_BIT 0x2
  46 #define STEDMA40_ESIZE_64_BIT 0x3
  47
  48 /* The value 4 indicates that PEN-reg shall be set to 0 */
  49 #define STEDMA40_PSIZE_PHY_1  0x4
  50 #define STEDMA40_PSIZE_PHY_2  0x0
  51 #define STEDMA40_PSIZE_PHY_4  0x1
  52 #define STEDMA40_PSIZE_PHY_8  0x2
  53 #define STEDMA40_PSIZE_PHY_16 0x3
  54
  55 /*
  56  * The number of elements differ in logical and
  57  * physical mode
  58  */
  59 #define STEDMA40_PSIZE_LOG_1  STEDMA40_PSIZE_PHY_2
  60 #define STEDMA40_PSIZE_LOG_4  STEDMA40_PSIZE_PHY_4
  61 #define STEDMA40_PSIZE_LOG_8  STEDMA40_PSIZE_PHY_8
  62 #define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16
  63
  64 /* Maximum number of possible physical channels */
  65 #define STEDMA40_MAX_PHYS 32
  66
  67 enum stedma40_flow_ctrl {
  68         STEDMA40_NO_FLOW_CTRL,
  69         STEDMA40_FLOW_CTRL,
  70 };
  71
  72 enum stedma40_periph_data_width {
  73         STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT,
  74         STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT,
  75         STEDMA40_WORD_WIDTH = STEDMA40_ESIZE_32_BIT,
  76         STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT
  77 };
  78
  79 enum stedma40_xfer_dir {
  80         STEDMA40_MEM_TO_MEM = 1,
  81         STEDMA40_MEM_TO_PERIPH,
  82         STEDMA40_PERIPH_TO_MEM,
  83         STEDMA40_PERIPH_TO_PERIPH
  84 };
  85
  86
  87 /**
  88  * struct stedma40_chan_cfg - dst/src channel configuration
  89  *
  90  * @big_endian: true if the src/dst should be read as big endian
  91  * @data_width: Data width of the src/dst hardware
  92  * @p_size: Burst size
  93  * @flow_ctrl: Flow control on/off.
  94  */
  95 struct stedma40_half_channel_info {
  96         bool big_endian;
  97         enum stedma40_periph_data_width data_width;
  98         int psize;
  99         enum stedma40_flow_ctrl flow_ctrl;
 100 };
 101
 102 /**
 103  * struct stedma40_chan_cfg - Structure to be filled by client drivers.
 104  *
 105  * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH
 106  * @high_priority: true if high-priority
 107  * @mode: channel mode: physical, logical, or operation
 108  * @mode_opt: options for the chosen channel mode
 109  * @src_dev_type: Src device type
 110  * @dst_dev_type: Dst device type
 111  * @src_info: Parameters for dst half channel
 112  * @dst_info: Parameters for dst half channel
 113  *
 114  *
 115  * This structure has to be filled by the client drivers.
 116  * It is recommended to do all dma configurations for clients in the machine.
 117  *
 118  */
 119 struct stedma40_chan_cfg {
 120         enum stedma40_xfer_dir                   dir;
 121         bool                                     high_priority;
 122         enum stedma40_mode                       mode;
 123         enum stedma40_mode_opt                   mode_opt;
 124         int                                      src_dev_type;
 125         int                                      dst_dev_type;
 126         struct stedma40_half_channel_info        src_info;
 127         struct stedma40_half_channel_info        dst_info;
 128 };
 129
 130 /**
 131  * struct stedma40_platform_data - Configuration struct for the dma device.
 132  *
 133  * @dev_len: length of dev_tx and dev_rx
 134  * @dev_tx: mapping between destination event line and io address
 135  * @dev_rx: mapping between source event line and io address
 136  * @memcpy: list of memcpy event lines
 137  * @memcpy_len: length of memcpy
 138  * @memcpy_conf_phy: default configuration of physical channel memcpy
 139  * @memcpy_conf_log: default configuration of logical channel memcpy
 140  * @disabled_channels: A vector, ending with -1, that marks physical channels
 141  * that are for different reasons not available for the driver.
 142  */
 143 struct stedma40_platform_data {
 144         u32                              dev_len;
 145         const dma_addr_t                *dev_tx;
 146         const dma_addr_t                *dev_rx;
 147         int                             *memcpy;
 148         u32                              memcpy_len;
 149         struct stedma40_chan_cfg        *memcpy_conf_phy;
 150         struct stedma40_chan_cfg        *memcpy_conf_log;
 151         int                              disabled_channels[STEDMA40_MAX_PHYS];
 152 };
 153
 154 #ifdef CONFIG_STE_DMA40
 155
 156 /**
 157  * stedma40_filter() - Provides stedma40_chan_cfg to the
 158  * ste_dma40 dma driver via the dmaengine framework.
 159  * does some checking of what's provided.
 160  *
 161  * Never directly called by client. It used by dmaengine.
 162  * @chan: dmaengine handle.
 163  * @data: Must be of type: struct stedma40_chan_cfg and is
 164  * the configuration of the framework.
 165  *
 166  *
 167  */
 168
 169 bool stedma40_filter(struct dma_chan *chan, void *data);
 170
 171 /**
 172  * stedma40_memcpy_sg() - extension of the dma framework, memcpy to/from
 173  * scattergatter lists.
 174  *
 175  * @chan: dmaengine handle
 176  * @sgl_dst: Destination scatter list
 177  * @sgl_src: Source scatter list
 178  * @sgl_len: The length of each scatterlist. Both lists must be of equal length
 179  * and each element must match the corresponding element in the other scatter
 180  * list.
 181  * @flags: is actually enum dma_ctrl_flags. See dmaengine.h
 182  */
 183
 184 struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
 185                                                    struct scatterlist *sgl_dst,
 186                                                    struct scatterlist *sgl_src,
 187                                                    unsigned int sgl_len,
 188                                                    unsigned long flags);
 189
 190 /**
 191  * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave
 192  * (=device)
 193  *
 194  * @chan: dmaengine handle
 195  * @addr: source or destination physicall address.
 196  * @size: bytes to transfer
 197  * @direction: direction of transfer
 198  * @flags: is actually enum dma_ctrl_flags. See dmaengine.h
 199  */
 200
 201 static inline struct
 202 dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
 203                                             dma_addr_t addr,
 204                                             unsigned int size,
 205                                             enum dma_data_direction direction,
 206                                             unsigned long flags)
 207 {
 208         struct scatterlist sg;
 209         sg_init_table(&sg, 1);
 210         sg.dma_address = addr;
 211         sg.length = size;
 212
 213         return chan->device->device_prep_slave_sg(chan, &sg, 1,
 214                                                   direction, flags);
 215 }
 216
 217 #else
 218 static inline bool stedma40_filter(struct dma_chan *chan, void *data)
 219 {
 220         return false;
 221 }
 222
 223 static inline struct
 224 dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
 225                                             dma_addr_t addr,
 226                                             unsigned int size,
 227                                             enum dma_data_direction direction,
 228                                             unsigned long flags)
 229 {
 230         return NULL;
 231 }
 232 #endif
 233
 234 #endif