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Merge branch 'v6v7' into devel
[linux/fpc-iii.git] / arch / sh / boards / mach-ecovec24 / setup.c
blob701667acfd89e919f15202ef2161f445e15e0c93
1 /*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11 #include <linux/init.h>
12 #include <linux/device.h>
13 #include <linux/platform_device.h>
14 #include <linux/mfd/sh_mobile_sdhi.h>
15 #include <linux/mmc/host.h>
16 #include <linux/mmc/sh_mmcif.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/gpio.h>
19 #include <linux/interrupt.h>
20 #include <linux/io.h>
21 #include <linux/delay.h>
22 #include <linux/usb/r8a66597.h>
23 #include <linux/i2c.h>
24 #include <linux/i2c/tsc2007.h>
25 #include <linux/spi/spi.h>
26 #include <linux/spi/sh_msiof.h>
27 #include <linux/spi/mmc_spi.h>
28 #include <linux/input.h>
29 #include <linux/input/sh_keysc.h>
30 #include <video/sh_mobile_lcdc.h>
31 #include <sound/sh_fsi.h>
32 #include <media/sh_mobile_ceu.h>
33 #include <media/tw9910.h>
34 #include <media/mt9t112.h>
35 #include <asm/heartbeat.h>
36 #include <asm/sh_eth.h>
37 #include <asm/clock.h>
38 #include <asm/suspend.h>
39 #include <cpu/sh7724.h>
40
41 /*
42 * Address Interface BusWidth
43 *-----------------------------------------
44 * 0x0000_0000 uboot 16bit
45 * 0x0004_0000 Linux romImage 16bit
46 * 0x0014_0000 MTD for Linux 16bit
47 * 0x0400_0000 Internal I/O 16/32bit
48 * 0x0800_0000 DRAM 32bit
49 * 0x1800_0000 MFI 16bit
50 */
51
52 /* SWITCH
53 *------------------------------
54 * DS2[1] = FlashROM write protect ON : write protect
55 * OFF : No write protect
56 * DS2[2] = RMII / TS, SCIF ON : RMII
57 * OFF : TS, SCIF3
58 * DS2[3] = Camera / Video ON : Camera
59 * OFF : NTSC/PAL (IN)
60 * DS2[5] = NTSC_OUT Clock ON : On board OSC
61 * OFF : SH7724 DV_CLK
62 * DS2[6-7] = MMC / SD ON-OFF : SD
63 * OFF-ON : MMC
64 */
65
66 /* Heartbeat */
67 static unsigned char led_pos[] = { 0, 1, 2, 3 };
68
69 static struct heartbeat_data heartbeat_data = {
70 .nr_bits = 4,
71 .bit_pos = led_pos,
72 };
73
74 static struct resource heartbeat_resource = {
75 .start = 0xA405012C, /* PTG */
76 .end = 0xA405012E - 1,
77 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
78 };
79
80 static struct platform_device heartbeat_device = {
81 .name = "heartbeat",
82 .id = -1,
83 .dev = {
84 .platform_data = &heartbeat_data,
85 },
86 .num_resources = 1,
87 .resource = &heartbeat_resource,
88 };
89
90 /* MTD */
91 static struct mtd_partition nor_flash_partitions[] = {
92 {
93 .name = "boot loader",
94 .offset = 0,
95 .size = (5 * 1024 * 1024),
96 .mask_flags = MTD_WRITEABLE, /* force read-only */
97 }, {
98 .name = "free-area",
99 .offset = MTDPART_OFS_APPEND,
100 .size = MTDPART_SIZ_FULL,
101 },
102 };
103
104 static struct physmap_flash_data nor_flash_data = {
105 .width = 2,
106 .parts = nor_flash_partitions,
107 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
108 };
109
110 static struct resource nor_flash_resources[] = {
111 [0] = {
112 .name = "NOR Flash",
113 .start = 0x00000000,
114 .end = 0x03ffffff,
115 .flags = IORESOURCE_MEM,
116 }
117 };
118
119 static struct platform_device nor_flash_device = {
120 .name = "physmap-flash",
121 .resource = nor_flash_resources,
122 .num_resources = ARRAY_SIZE(nor_flash_resources),
123 .dev = {
124 .platform_data = &nor_flash_data,
125 },
126 };
127
128 /* SH Eth */
129 #define SH_ETH_ADDR (0xA4600000)
130 static struct resource sh_eth_resources[] = {
131 [0] = {
132 .start = SH_ETH_ADDR,
133 .end = SH_ETH_ADDR + 0x1FC,
134 .flags = IORESOURCE_MEM,
135 },
136 [1] = {
137 .start = 91,
138 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
139 },
140 };
141
142 static struct sh_eth_plat_data sh_eth_plat = {
143 .phy = 0x1f, /* SMSC LAN8700 */
144 .edmac_endian = EDMAC_LITTLE_ENDIAN,
145 .ether_link_active_low = 1
146 };
147
148 static struct platform_device sh_eth_device = {
149 .name = "sh-eth",
150 .id = 0,
151 .dev = {
152 .platform_data = &sh_eth_plat,
153 },
154 .num_resources = ARRAY_SIZE(sh_eth_resources),
155 .resource = sh_eth_resources,
156 .archdata = {
157 .hwblk_id = HWBLK_ETHER,
158 },
159 };
160
161 /* USB0 host */
162 static void usb0_port_power(int port, int power)
163 {
164 gpio_set_value(GPIO_PTB4, power);
165 }
166
167 static struct r8a66597_platdata usb0_host_data = {
168 .on_chip = 1,
169 .port_power = usb0_port_power,
170 };
171
172 static struct resource usb0_host_resources[] = {
173 [0] = {
174 .start = 0xa4d80000,
175 .end = 0xa4d80124 - 1,
176 .flags = IORESOURCE_MEM,
177 },
178 [1] = {
179 .start = 65,
180 .end = 65,
181 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
182 },
183 };
184
185 static struct platform_device usb0_host_device = {
186 .name = "r8a66597_hcd",
187 .id = 0,
188 .dev = {
189 .dma_mask = NULL, /* not use dma */
190 .coherent_dma_mask = 0xffffffff,
191 .platform_data = &usb0_host_data,
192 },
193 .num_resources = ARRAY_SIZE(usb0_host_resources),
194 .resource = usb0_host_resources,
195 };
196
197 /* USB1 host/function */
198 static void usb1_port_power(int port, int power)
199 {
200 gpio_set_value(GPIO_PTB5, power);
201 }
202
203 static struct r8a66597_platdata usb1_common_data = {
204 .on_chip = 1,
205 .port_power = usb1_port_power,
206 };
207
208 static struct resource usb1_common_resources[] = {
209 [0] = {
210 .start = 0xa4d90000,
211 .end = 0xa4d90124 - 1,
212 .flags = IORESOURCE_MEM,
213 },
214 [1] = {
215 .start = 66,
216 .end = 66,
217 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
218 },
219 };
220
221 static struct platform_device usb1_common_device = {
222 /* .name will be added in arch_setup */
223 .id = 1,
224 .dev = {
225 .dma_mask = NULL, /* not use dma */
226 .coherent_dma_mask = 0xffffffff,
227 .platform_data = &usb1_common_data,
228 },
229 .num_resources = ARRAY_SIZE(usb1_common_resources),
230 .resource = usb1_common_resources,
231 };
232
233 /* LCDC */
234 const static struct fb_videomode ecovec_lcd_modes[] = {
235 {
236 .name = "Panel",
237 .xres = 800,
238 .yres = 480,
239 .left_margin = 220,
240 .right_margin = 110,
241 .hsync_len = 70,
242 .upper_margin = 20,
243 .lower_margin = 5,
244 .vsync_len = 5,
245 .sync = 0, /* hsync and vsync are active low */
246 },
247 };
248
249 const static struct fb_videomode ecovec_dvi_modes[] = {
250 {
251 .name = "DVI",
252 .xres = 1280,
253 .yres = 720,
254 .left_margin = 220,
255 .right_margin = 110,
256 .hsync_len = 40,
257 .upper_margin = 20,
258 .lower_margin = 5,
259 .vsync_len = 5,
260 .sync = 0, /* hsync and vsync are active low */
261 },
262 };
263
264 static struct sh_mobile_lcdc_info lcdc_info = {
265 .ch[0] = {
266 .interface_type = RGB18,
267 .chan = LCDC_CHAN_MAINLCD,
268 .bpp = 16,
269 .lcd_size_cfg = { /* 7.0 inch */
270 .width = 152,
271 .height = 91,
272 },
273 .board_cfg = {
274 },
275 }
276 };
277
278 static struct resource lcdc_resources[] = {
279 [0] = {
280 .name = "LCDC",
281 .start = 0xfe940000,
282 .end = 0xfe942fff,
283 .flags = IORESOURCE_MEM,
284 },
285 [1] = {
286 .start = 106,
287 .flags = IORESOURCE_IRQ,
288 },
289 };
290
291 static struct platform_device lcdc_device = {
292 .name = "sh_mobile_lcdc_fb",
293 .num_resources = ARRAY_SIZE(lcdc_resources),
294 .resource = lcdc_resources,
295 .dev = {
296 .platform_data = &lcdc_info,
297 },
298 .archdata = {
299 .hwblk_id = HWBLK_LCDC,
300 },
301 };
302
303 /* CEU0 */
304 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
305 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
306 };
307
308 static struct resource ceu0_resources[] = {
309 [0] = {
310 .name = "CEU0",
311 .start = 0xfe910000,
312 .end = 0xfe91009f,
313 .flags = IORESOURCE_MEM,
314 },
315 [1] = {
316 .start = 52,
317 .flags = IORESOURCE_IRQ,
318 },
319 [2] = {
320 /* place holder for contiguous memory */
321 },
322 };
323
324 static struct platform_device ceu0_device = {
325 .name = "sh_mobile_ceu",
326 .id = 0, /* "ceu0" clock */
327 .num_resources = ARRAY_SIZE(ceu0_resources),
328 .resource = ceu0_resources,
329 .dev = {
330 .platform_data = &sh_mobile_ceu0_info,
331 },
332 .archdata = {
333 .hwblk_id = HWBLK_CEU0,
334 },
335 };
336
337 /* CEU1 */
338 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
339 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
340 };
341
342 static struct resource ceu1_resources[] = {
343 [0] = {
344 .name = "CEU1",
345 .start = 0xfe914000,
346 .end = 0xfe91409f,
347 .flags = IORESOURCE_MEM,
348 },
349 [1] = {
350 .start = 63,
351 .flags = IORESOURCE_IRQ,
352 },
353 [2] = {
354 /* place holder for contiguous memory */
355 },
356 };
357
358 static struct platform_device ceu1_device = {
359 .name = "sh_mobile_ceu",
360 .id = 1, /* "ceu1" clock */
361 .num_resources = ARRAY_SIZE(ceu1_resources),
362 .resource = ceu1_resources,
363 .dev = {
364 .platform_data = &sh_mobile_ceu1_info,
365 },
366 .archdata = {
367 .hwblk_id = HWBLK_CEU1,
368 },
369 };
370
371 /* I2C device */
372 static struct i2c_board_info i2c0_devices[] = {
373 {
374 I2C_BOARD_INFO("da7210", 0x1a),
375 },
376 };
377
378 static struct i2c_board_info i2c1_devices[] = {
379 {
380 I2C_BOARD_INFO("r2025sd", 0x32),
381 },
382 {
383 I2C_BOARD_INFO("lis3lv02d", 0x1c),
384 .irq = 33,
385 }
386 };
387
388 /* KEYSC */
389 static struct sh_keysc_info keysc_info = {
390 .mode = SH_KEYSC_MODE_1,
391 .scan_timing = 3,
392 .delay = 50,
393 .kycr2_delay = 100,
394 .keycodes = { KEY_1, 0, 0, 0, 0,
395 KEY_2, 0, 0, 0, 0,
396 KEY_3, 0, 0, 0, 0,
397 KEY_4, 0, 0, 0, 0,
398 KEY_5, 0, 0, 0, 0,
399 KEY_6, 0, 0, 0, 0, },
400 };
401
402 static struct resource keysc_resources[] = {
403 [0] = {
404 .name = "KEYSC",
405 .start = 0x044b0000,
406 .end = 0x044b000f,
407 .flags = IORESOURCE_MEM,
408 },
409 [1] = {
410 .start = 79,
411 .flags = IORESOURCE_IRQ,
412 },
413 };
414
415 static struct platform_device keysc_device = {
416 .name = "sh_keysc",
417 .id = 0, /* keysc0 clock */
418 .num_resources = ARRAY_SIZE(keysc_resources),
419 .resource = keysc_resources,
420 .dev = {
421 .platform_data = &keysc_info,
422 },
423 .archdata = {
424 .hwblk_id = HWBLK_KEYSC,
425 },
426 };
427
428 /* TouchScreen */
429 #define IRQ0 32
430 static int ts_get_pendown_state(void)
431 {
432 int val = 0;
433 gpio_free(GPIO_FN_INTC_IRQ0);
434 gpio_request(GPIO_PTZ0, NULL);
435 gpio_direction_input(GPIO_PTZ0);
436
437 val = gpio_get_value(GPIO_PTZ0);
438
439 gpio_free(GPIO_PTZ0);
440 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
441
442 return val ? 0 : 1;
443 }
444
445 static int ts_init(void)
446 {
447 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
448 return 0;
449 }
450
451 static struct tsc2007_platform_data tsc2007_info = {
452 .model = 2007,
453 .x_plate_ohms = 180,
454 .get_pendown_state = ts_get_pendown_state,
455 .init_platform_hw = ts_init,
456 };
457
458 static struct i2c_board_info ts_i2c_clients = {
459 I2C_BOARD_INFO("tsc2007", 0x48),
460 .type = "tsc2007",
461 .platform_data = &tsc2007_info,
462 .irq = IRQ0,
463 };
464
465 #ifdef CONFIG_MFD_SH_MOBILE_SDHI
466 /* SDHI0 */
467 static void sdhi0_set_pwr(struct platform_device *pdev, int state)
468 {
469 gpio_set_value(GPIO_PTB6, state);
470 }
471
472 static struct sh_mobile_sdhi_info sdhi0_info = {
473 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
474 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
475 .set_pwr = sdhi0_set_pwr,
476 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
477 };
478
479 static struct resource sdhi0_resources[] = {
480 [0] = {
481 .name = "SDHI0",
482 .start = 0x04ce0000,
483 .end = 0x04ce01ff,
484 .flags = IORESOURCE_MEM,
485 },
486 [1] = {
487 .start = 100,
488 .flags = IORESOURCE_IRQ,
489 },
490 };
491
492 static struct platform_device sdhi0_device = {
493 .name = "sh_mobile_sdhi",
494 .num_resources = ARRAY_SIZE(sdhi0_resources),
495 .resource = sdhi0_resources,
496 .id = 0,
497 .dev = {
498 .platform_data = &sdhi0_info,
499 },
500 .archdata = {
501 .hwblk_id = HWBLK_SDHI0,
502 },
503 };
504
505 #if !defined(CONFIG_MMC_SH_MMCIF)
506 /* SDHI1 */
507 static void sdhi1_set_pwr(struct platform_device *pdev, int state)
508 {
509 gpio_set_value(GPIO_PTB7, state);
510 }
511
512 static struct sh_mobile_sdhi_info sdhi1_info = {
513 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
514 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
515 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
516 .set_pwr = sdhi1_set_pwr,
517 };
518
519 static struct resource sdhi1_resources[] = {
520 [0] = {
521 .name = "SDHI1",
522 .start = 0x04cf0000,
523 .end = 0x04cf01ff,
524 .flags = IORESOURCE_MEM,
525 },
526 [1] = {
527 .start = 23,
528 .flags = IORESOURCE_IRQ,
529 },
530 };
531
532 static struct platform_device sdhi1_device = {
533 .name = "sh_mobile_sdhi",
534 .num_resources = ARRAY_SIZE(sdhi1_resources),
535 .resource = sdhi1_resources,
536 .id = 1,
537 .dev = {
538 .platform_data = &sdhi1_info,
539 },
540 .archdata = {
541 .hwblk_id = HWBLK_SDHI1,
542 },
543 };
544 #endif /* CONFIG_MMC_SH_MMCIF */
545
546 #else
547
548 /* MMC SPI */
549 static int mmc_spi_get_ro(struct device *dev)
550 {
551 return gpio_get_value(GPIO_PTY6);
552 }
553
554 static int mmc_spi_get_cd(struct device *dev)
555 {
556 return !gpio_get_value(GPIO_PTY7);
557 }
558
559 static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
560 {
561 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
562 }
563
564 static struct mmc_spi_platform_data mmc_spi_info = {
565 .get_ro = mmc_spi_get_ro,
566 .get_cd = mmc_spi_get_cd,
567 .caps = MMC_CAP_NEEDS_POLL,
568 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
569 .setpower = mmc_spi_setpower,
570 };
571
572 static struct spi_board_info spi_bus[] = {
573 {
574 .modalias = "mmc_spi",
575 .platform_data = &mmc_spi_info,
576 .max_speed_hz = 5000000,
577 .mode = SPI_MODE_0,
578 .controller_data = (void *) GPIO_PTM4,
579 },
580 };
581
582 /* MSIOF0 */
583 static struct sh_msiof_spi_info msiof0_data = {
584 .num_chipselect = 1,
585 };
586
587 static struct resource msiof0_resources[] = {
588 [0] = {
589 .name = "MSIOF0",
590 .start = 0xa4c40000,
591 .end = 0xa4c40063,
592 .flags = IORESOURCE_MEM,
593 },
594 [1] = {
595 .start = 84,
596 .flags = IORESOURCE_IRQ,
597 },
598 };
599
600 static struct platform_device msiof0_device = {
601 .name = "spi_sh_msiof",
602 .id = 0, /* MSIOF0 */
603 .dev = {
604 .platform_data = &msiof0_data,
605 },
606 .num_resources = ARRAY_SIZE(msiof0_resources),
607 .resource = msiof0_resources,
608 .archdata = {
609 .hwblk_id = HWBLK_MSIOF0,
610 },
611 };
612
613 #endif
614
615 /* I2C Video/Camera */
616 static struct i2c_board_info i2c_camera[] = {
617 {
618 I2C_BOARD_INFO("tw9910", 0x45),
619 },
620 {
621 /* 1st camera */
622 I2C_BOARD_INFO("mt9t112", 0x3c),
623 },
624 {
625 /* 2nd camera */
626 I2C_BOARD_INFO("mt9t112", 0x3c),
627 },
628 };
629
630 /* tw9910 */
631 static int tw9910_power(struct device *dev, int mode)
632 {
633 int val = mode ? 0 : 1;
634
635 gpio_set_value(GPIO_PTU2, val);
636 if (mode)
637 mdelay(100);
638
639 return 0;
640 }
641
642 static struct tw9910_video_info tw9910_info = {
643 .buswidth = SOCAM_DATAWIDTH_8,
644 .mpout = TW9910_MPO_FIELD,
645 };
646
647 static struct soc_camera_link tw9910_link = {
648 .i2c_adapter_id = 0,
649 .bus_id = 1,
650 .power = tw9910_power,
651 .board_info = &i2c_camera[0],
652 .priv = &tw9910_info,
653 };
654
655 /* mt9t112 */
656 static int mt9t112_power1(struct device *dev, int mode)
657 {
658 gpio_set_value(GPIO_PTA3, mode);
659 if (mode)
660 mdelay(100);
661
662 return 0;
663 }
664
665 static struct mt9t112_camera_info mt9t112_info1 = {
666 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
667 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
668 };
669
670 static struct soc_camera_link mt9t112_link1 = {
671 .i2c_adapter_id = 0,
672 .power = mt9t112_power1,
673 .bus_id = 0,
674 .board_info = &i2c_camera[1],
675 .priv = &mt9t112_info1,
676 };
677
678 static int mt9t112_power2(struct device *dev, int mode)
679 {
680 gpio_set_value(GPIO_PTA4, mode);
681 if (mode)
682 mdelay(100);
683
684 return 0;
685 }
686
687 static struct mt9t112_camera_info mt9t112_info2 = {
688 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
689 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
690 };
691
692 static struct soc_camera_link mt9t112_link2 = {
693 .i2c_adapter_id = 1,
694 .power = mt9t112_power2,
695 .bus_id = 1,
696 .board_info = &i2c_camera[2],
697 .priv = &mt9t112_info2,
698 };
699
700 static struct platform_device camera_devices[] = {
701 {
702 .name = "soc-camera-pdrv",
703 .id = 0,
704 .dev = {
705 .platform_data = &tw9910_link,
706 },
707 },
708 {
709 .name = "soc-camera-pdrv",
710 .id = 1,
711 .dev = {
712 .platform_data = &mt9t112_link1,
713 },
714 },
715 {
716 .name = "soc-camera-pdrv",
717 .id = 2,
718 .dev = {
719 .platform_data = &mt9t112_link2,
720 },
721 },
722 };
723
724 /* FSI */
725 static struct sh_fsi_platform_info fsi_info = {
726 .portb_flags = SH_FSI_BRS_INV |
727 SH_FSI_OUT_SLAVE_MODE |
728 SH_FSI_IN_SLAVE_MODE |
729 SH_FSI_OFMT(I2S) |
730 SH_FSI_IFMT(I2S),
731 };
732
733 static struct resource fsi_resources[] = {
734 [0] = {
735 .name = "FSI",
736 .start = 0xFE3C0000,
737 .end = 0xFE3C021d,
738 .flags = IORESOURCE_MEM,
739 },
740 [1] = {
741 .start = 108,
742 .flags = IORESOURCE_IRQ,
743 },
744 };
745
746 static struct platform_device fsi_device = {
747 .name = "sh_fsi",
748 .id = 0,
749 .num_resources = ARRAY_SIZE(fsi_resources),
750 .resource = fsi_resources,
751 .dev = {
752 .platform_data = &fsi_info,
753 },
754 .archdata = {
755 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
756 },
757 };
758
759 /* IrDA */
760 static struct resource irda_resources[] = {
761 [0] = {
762 .name = "IrDA",
763 .start = 0xA45D0000,
764 .end = 0xA45D0049,
765 .flags = IORESOURCE_MEM,
766 },
767 [1] = {
768 .start = 20,
769 .flags = IORESOURCE_IRQ,
770 },
771 };
772
773 static struct platform_device irda_device = {
774 .name = "sh_sir",
775 .num_resources = ARRAY_SIZE(irda_resources),
776 .resource = irda_resources,
777 };
778
779 #include <media/ak881x.h>
780 #include <media/sh_vou.h>
781
782 static struct ak881x_pdata ak881x_pdata = {
783 .flags = AK881X_IF_MODE_SLAVE,
784 };
785
786 static struct i2c_board_info ak8813 = {
787 I2C_BOARD_INFO("ak8813", 0x20),
788 .platform_data = &ak881x_pdata,
789 };
790
791 static struct sh_vou_pdata sh_vou_pdata = {
792 .bus_fmt = SH_VOU_BUS_8BIT,
793 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
794 .board_info = &ak8813,
795 .i2c_adap = 0,
796 };
797
798 static struct resource sh_vou_resources[] = {
799 [0] = {
800 .start = 0xfe960000,
801 .end = 0xfe962043,
802 .flags = IORESOURCE_MEM,
803 },
804 [1] = {
805 .start = 55,
806 .flags = IORESOURCE_IRQ,
807 },
808 };
809
810 static struct platform_device vou_device = {
811 .name = "sh-vou",
812 .id = -1,
813 .num_resources = ARRAY_SIZE(sh_vou_resources),
814 .resource = sh_vou_resources,
815 .dev = {
816 .platform_data = &sh_vou_pdata,
817 },
818 .archdata = {
819 .hwblk_id = HWBLK_VOU,
820 },
821 };
822
823 #if defined(CONFIG_MMC_SH_MMCIF)
824 /* SH_MMCIF */
825 static void mmcif_set_pwr(struct platform_device *pdev, int state)
826 {
827 gpio_set_value(GPIO_PTB7, state);
828 }
829
830 static void mmcif_down_pwr(struct platform_device *pdev)
831 {
832 gpio_set_value(GPIO_PTB7, 0);
833 }
834
835 static struct resource sh_mmcif_resources[] = {
836 [0] = {
837 .name = "SH_MMCIF",
838 .start = 0xA4CA0000,
839 .end = 0xA4CA00FF,
840 .flags = IORESOURCE_MEM,
841 },
842 [1] = {
843 /* MMC2I */
844 .start = 29,
845 .flags = IORESOURCE_IRQ,
846 },
847 [2] = {
848 /* MMC3I */
849 .start = 30,
850 .flags = IORESOURCE_IRQ,
851 },
852 };
853
854 static struct sh_mmcif_plat_data sh_mmcif_plat = {
855 .set_pwr = mmcif_set_pwr,
856 .down_pwr = mmcif_down_pwr,
857 .sup_pclk = 0, /* SH7724: Max Pclk/2 */
858 .caps = MMC_CAP_4_BIT_DATA |
859 MMC_CAP_8_BIT_DATA |
860 MMC_CAP_NEEDS_POLL,
861 .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
862 };
863
864 static struct platform_device sh_mmcif_device = {
865 .name = "sh_mmcif",
866 .id = 0,
867 .dev = {
868 .platform_data = &sh_mmcif_plat,
869 },
870 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
871 .resource = sh_mmcif_resources,
872 };
873 #endif
874
875 static struct platform_device *ecovec_devices[] __initdata = {
876 &heartbeat_device,
877 &nor_flash_device,
878 &sh_eth_device,
879 &usb0_host_device,
880 &usb1_common_device,
881 &lcdc_device,
882 &ceu0_device,
883 &ceu1_device,
884 &keysc_device,
885 #ifdef CONFIG_MFD_SH_MOBILE_SDHI
886 &sdhi0_device,
887 #if !defined(CONFIG_MMC_SH_MMCIF)
888 &sdhi1_device,
889 #endif
890 #else
891 &msiof0_device,
892 #endif
893 &camera_devices[0],
894 &camera_devices[1],
895 &camera_devices[2],
896 &fsi_device,
897 &irda_device,
898 &vou_device,
899 #if defined(CONFIG_MMC_SH_MMCIF)
900 &sh_mmcif_device,
901 #endif
902 };
903
904 #ifdef CONFIG_I2C
905 #define EEPROM_ADDR 0x50
906 static u8 mac_read(struct i2c_adapter *a, u8 command)
907 {
908 struct i2c_msg msg[2];
909 u8 buf;
910 int ret;
911
912 msg[0].addr = EEPROM_ADDR;
913 msg[0].flags = 0;
914 msg[0].len = 1;
915 msg[0].buf = &command;
916
917 msg[1].addr = EEPROM_ADDR;
918 msg[1].flags = I2C_M_RD;
919 msg[1].len = 1;
920 msg[1].buf = &buf;
921
922 ret = i2c_transfer(a, msg, 2);
923 if (ret < 0) {
924 printk(KERN_ERR "error %d\n", ret);
925 buf = 0xff;
926 }
927
928 return buf;
929 }
930
931 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
932 {
933 struct i2c_adapter *a = i2c_get_adapter(1);
934 int i;
935
936 if (!a) {
937 pr_err("can not get I2C 1\n");
938 return;
939 }
940
941 /* read MAC address frome EEPROM */
942 for (i = 0; i < sizeof(pd->mac_addr); i++) {
943 pd->mac_addr[i] = mac_read(a, 0x10 + i);
944 msleep(10);
945 }
946
947 i2c_put_adapter(a);
948 }
949 #else
950 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
951 {
952 pr_err("unable to read sh_eth MAC address\n");
953 }
954 #endif
955
956 #define PORT_HIZA 0xA4050158
957 #define IODRIVEA 0xA405018A
958
959 extern char ecovec24_sdram_enter_start;
960 extern char ecovec24_sdram_enter_end;
961 extern char ecovec24_sdram_leave_start;
962 extern char ecovec24_sdram_leave_end;
963
964 static int __init arch_setup(void)
965 {
966 struct clk *clk;
967
968 /* register board specific self-refresh code */
969 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
970 SUSP_SH_RSTANDBY,
971 &ecovec24_sdram_enter_start,
972 &ecovec24_sdram_enter_end,
973 &ecovec24_sdram_leave_start,
974 &ecovec24_sdram_leave_end);
975
976 /* enable STATUS0, STATUS2 and PDSTATUS */
977 gpio_request(GPIO_FN_STATUS0, NULL);
978 gpio_request(GPIO_FN_STATUS2, NULL);
979 gpio_request(GPIO_FN_PDSTATUS, NULL);
980
981 /* enable SCIFA0 */
982 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
983 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
984
985 /* enable debug LED */
986 gpio_request(GPIO_PTG0, NULL);
987 gpio_request(GPIO_PTG1, NULL);
988 gpio_request(GPIO_PTG2, NULL);
989 gpio_request(GPIO_PTG3, NULL);
990 gpio_direction_output(GPIO_PTG0, 0);
991 gpio_direction_output(GPIO_PTG1, 0);
992 gpio_direction_output(GPIO_PTG2, 0);
993 gpio_direction_output(GPIO_PTG3, 0);
994 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
995
996 /* enable SH-Eth */
997 gpio_request(GPIO_PTA1, NULL);
998 gpio_direction_output(GPIO_PTA1, 1);
999 mdelay(20);
1000
1001 gpio_request(GPIO_FN_RMII_RXD0, NULL);
1002 gpio_request(GPIO_FN_RMII_RXD1, NULL);
1003 gpio_request(GPIO_FN_RMII_TXD0, NULL);
1004 gpio_request(GPIO_FN_RMII_TXD1, NULL);
1005 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
1006 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
1007 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
1008 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
1009 gpio_request(GPIO_FN_MDIO, NULL);
1010 gpio_request(GPIO_FN_MDC, NULL);
1011 gpio_request(GPIO_FN_LNKSTA, NULL);
1012
1013 /* enable USB */
1014 __raw_writew(0x0000, 0xA4D80000);
1015 __raw_writew(0x0000, 0xA4D90000);
1016 gpio_request(GPIO_PTB3, NULL);
1017 gpio_request(GPIO_PTB4, NULL);
1018 gpio_request(GPIO_PTB5, NULL);
1019 gpio_direction_input(GPIO_PTB3);
1020 gpio_direction_output(GPIO_PTB4, 0);
1021 gpio_direction_output(GPIO_PTB5, 0);
1022 __raw_writew(0x0600, 0xa40501d4);
1023 __raw_writew(0x0600, 0xa4050192);
1024
1025 if (gpio_get_value(GPIO_PTB3)) {
1026 printk(KERN_INFO "USB1 function is selected\n");
1027 usb1_common_device.name = "r8a66597_udc";
1028 } else {
1029 printk(KERN_INFO "USB1 host is selected\n");
1030 usb1_common_device.name = "r8a66597_hcd";
1031 }
1032
1033 /* enable LCDC */
1034 gpio_request(GPIO_FN_LCDD23, NULL);
1035 gpio_request(GPIO_FN_LCDD22, NULL);
1036 gpio_request(GPIO_FN_LCDD21, NULL);
1037 gpio_request(GPIO_FN_LCDD20, NULL);
1038 gpio_request(GPIO_FN_LCDD19, NULL);
1039 gpio_request(GPIO_FN_LCDD18, NULL);
1040 gpio_request(GPIO_FN_LCDD17, NULL);
1041 gpio_request(GPIO_FN_LCDD16, NULL);
1042 gpio_request(GPIO_FN_LCDD15, NULL);
1043 gpio_request(GPIO_FN_LCDD14, NULL);
1044 gpio_request(GPIO_FN_LCDD13, NULL);
1045 gpio_request(GPIO_FN_LCDD12, NULL);
1046 gpio_request(GPIO_FN_LCDD11, NULL);
1047 gpio_request(GPIO_FN_LCDD10, NULL);
1048 gpio_request(GPIO_FN_LCDD9, NULL);
1049 gpio_request(GPIO_FN_LCDD8, NULL);
1050 gpio_request(GPIO_FN_LCDD7, NULL);
1051 gpio_request(GPIO_FN_LCDD6, NULL);
1052 gpio_request(GPIO_FN_LCDD5, NULL);
1053 gpio_request(GPIO_FN_LCDD4, NULL);
1054 gpio_request(GPIO_FN_LCDD3, NULL);
1055 gpio_request(GPIO_FN_LCDD2, NULL);
1056 gpio_request(GPIO_FN_LCDD1, NULL);
1057 gpio_request(GPIO_FN_LCDD0, NULL);
1058 gpio_request(GPIO_FN_LCDDISP, NULL);
1059 gpio_request(GPIO_FN_LCDHSYN, NULL);
1060 gpio_request(GPIO_FN_LCDDCK, NULL);
1061 gpio_request(GPIO_FN_LCDVSYN, NULL);
1062 gpio_request(GPIO_FN_LCDDON, NULL);
1063 gpio_request(GPIO_FN_LCDLCLK, NULL);
1064 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
1065
1066 gpio_request(GPIO_PTE6, NULL);
1067 gpio_request(GPIO_PTU1, NULL);
1068 gpio_request(GPIO_PTR1, NULL);
1069 gpio_request(GPIO_PTA2, NULL);
1070 gpio_direction_input(GPIO_PTE6);
1071 gpio_direction_output(GPIO_PTU1, 0);
1072 gpio_direction_output(GPIO_PTR1, 0);
1073 gpio_direction_output(GPIO_PTA2, 0);
1074
1075 /* I/O buffer drive ability is high */
1076 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
1077
1078 if (gpio_get_value(GPIO_PTE6)) {
1079 /* DVI */
1080 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
1081 lcdc_info.ch[0].clock_divider = 1;
1082 lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes;
1083 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes);
1084
1085 gpio_set_value(GPIO_PTA2, 1);
1086 gpio_set_value(GPIO_PTU1, 1);
1087 } else {
1088 /* Panel */
1089 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
1090 lcdc_info.ch[0].clock_divider = 2;
1091 lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes;
1092 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes);
1093
1094 gpio_set_value(GPIO_PTR1, 1);
1095
1096 /* FIXME
1097 *
1098 * LCDDON control is needed for Panel,
1099 * but current sh_mobile_lcdc driver doesn't control it.
1100 * It is temporary correspondence
1101 */
1102 gpio_request(GPIO_PTF4, NULL);
1103 gpio_direction_output(GPIO_PTF4, 1);
1104
1105 /* enable TouchScreen */
1106 i2c_register_board_info(0, &ts_i2c_clients, 1);
1107 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
1108 }
1109
1110 /* enable CEU0 */
1111 gpio_request(GPIO_FN_VIO0_D15, NULL);
1112 gpio_request(GPIO_FN_VIO0_D14, NULL);
1113 gpio_request(GPIO_FN_VIO0_D13, NULL);
1114 gpio_request(GPIO_FN_VIO0_D12, NULL);
1115 gpio_request(GPIO_FN_VIO0_D11, NULL);
1116 gpio_request(GPIO_FN_VIO0_D10, NULL);
1117 gpio_request(GPIO_FN_VIO0_D9, NULL);
1118 gpio_request(GPIO_FN_VIO0_D8, NULL);
1119 gpio_request(GPIO_FN_VIO0_D7, NULL);
1120 gpio_request(GPIO_FN_VIO0_D6, NULL);
1121 gpio_request(GPIO_FN_VIO0_D5, NULL);
1122 gpio_request(GPIO_FN_VIO0_D4, NULL);
1123 gpio_request(GPIO_FN_VIO0_D3, NULL);
1124 gpio_request(GPIO_FN_VIO0_D2, NULL);
1125 gpio_request(GPIO_FN_VIO0_D1, NULL);
1126 gpio_request(GPIO_FN_VIO0_D0, NULL);
1127 gpio_request(GPIO_FN_VIO0_VD, NULL);
1128 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1129 gpio_request(GPIO_FN_VIO0_FLD, NULL);
1130 gpio_request(GPIO_FN_VIO0_HD, NULL);
1131 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1132
1133 /* enable CEU1 */
1134 gpio_request(GPIO_FN_VIO1_D7, NULL);
1135 gpio_request(GPIO_FN_VIO1_D6, NULL);
1136 gpio_request(GPIO_FN_VIO1_D5, NULL);
1137 gpio_request(GPIO_FN_VIO1_D4, NULL);
1138 gpio_request(GPIO_FN_VIO1_D3, NULL);
1139 gpio_request(GPIO_FN_VIO1_D2, NULL);
1140 gpio_request(GPIO_FN_VIO1_D1, NULL);
1141 gpio_request(GPIO_FN_VIO1_D0, NULL);
1142 gpio_request(GPIO_FN_VIO1_FLD, NULL);
1143 gpio_request(GPIO_FN_VIO1_HD, NULL);
1144 gpio_request(GPIO_FN_VIO1_VD, NULL);
1145 gpio_request(GPIO_FN_VIO1_CLK, NULL);
1146 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1147
1148 /* enable KEYSC */
1149 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1150 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1151 gpio_request(GPIO_FN_KEYOUT3, NULL);
1152 gpio_request(GPIO_FN_KEYOUT2, NULL);
1153 gpio_request(GPIO_FN_KEYOUT1, NULL);
1154 gpio_request(GPIO_FN_KEYOUT0, NULL);
1155 gpio_request(GPIO_FN_KEYIN0, NULL);
1156
1157 /* enable user debug switch */
1158 gpio_request(GPIO_PTR0, NULL);
1159 gpio_request(GPIO_PTR4, NULL);
1160 gpio_request(GPIO_PTR5, NULL);
1161 gpio_request(GPIO_PTR6, NULL);
1162 gpio_direction_input(GPIO_PTR0);
1163 gpio_direction_input(GPIO_PTR4);
1164 gpio_direction_input(GPIO_PTR5);
1165 gpio_direction_input(GPIO_PTR6);
1166
1167 #ifdef CONFIG_MFD_SH_MOBILE_SDHI
1168 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
1169 gpio_request(GPIO_FN_SDHI0CD, NULL);
1170 gpio_request(GPIO_FN_SDHI0WP, NULL);
1171 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1172 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1173 gpio_request(GPIO_FN_SDHI0D3, NULL);
1174 gpio_request(GPIO_FN_SDHI0D2, NULL);
1175 gpio_request(GPIO_FN_SDHI0D1, NULL);
1176 gpio_request(GPIO_FN_SDHI0D0, NULL);
1177 gpio_request(GPIO_PTB6, NULL);
1178 gpio_direction_output(GPIO_PTB6, 0);
1179
1180 #if !defined(CONFIG_MMC_SH_MMCIF)
1181 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1182 gpio_request(GPIO_FN_SDHI1CD, NULL);
1183 gpio_request(GPIO_FN_SDHI1WP, NULL);
1184 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1185 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1186 gpio_request(GPIO_FN_SDHI1D3, NULL);
1187 gpio_request(GPIO_FN_SDHI1D2, NULL);
1188 gpio_request(GPIO_FN_SDHI1D1, NULL);
1189 gpio_request(GPIO_FN_SDHI1D0, NULL);
1190 gpio_request(GPIO_PTB7, NULL);
1191 gpio_direction_output(GPIO_PTB7, 0);
1192
1193 /* I/O buffer drive ability is high for SDHI1 */
1194 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1195 #endif /* CONFIG_MMC_SH_MMCIF */
1196 #else
1197 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1198 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1199 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1200 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1201 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1202 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1203 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1204 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1205 gpio_request(GPIO_PTY6, NULL); /* write protect */
1206 gpio_direction_input(GPIO_PTY6);
1207 gpio_request(GPIO_PTY7, NULL); /* card detect */
1208 gpio_direction_input(GPIO_PTY7);
1209
1210 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1211 #endif
1212
1213 /* enable Video */
1214 gpio_request(GPIO_PTU2, NULL);
1215 gpio_direction_output(GPIO_PTU2, 1);
1216
1217 /* enable Camera */
1218 gpio_request(GPIO_PTA3, NULL);
1219 gpio_request(GPIO_PTA4, NULL);
1220 gpio_direction_output(GPIO_PTA3, 0);
1221 gpio_direction_output(GPIO_PTA4, 0);
1222
1223 /* enable FSI */
1224 gpio_request(GPIO_FN_FSIMCKB, NULL);
1225 gpio_request(GPIO_FN_FSIIBSD, NULL);
1226 gpio_request(GPIO_FN_FSIOBSD, NULL);
1227 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1228 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1229 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1230 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1231 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1232
1233 /* set SPU2 clock to 83.4 MHz */
1234 clk = clk_get(NULL, "spu_clk");
1235 if (!IS_ERR(clk)) {
1236 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1237 clk_put(clk);
1238 }
1239
1240 /* change parent of FSI B */
1241 clk = clk_get(NULL, "fsib_clk");
1242 if (!IS_ERR(clk)) {
1243 /* 48kHz dummy clock was used to make sure 1/1 divide */
1244 clk_set_rate(&sh7724_fsimckb_clk, 48000);
1245 clk_set_parent(clk, &sh7724_fsimckb_clk);
1246 clk_set_rate(clk, 48000);
1247 clk_put(clk);
1248 }
1249
1250 gpio_request(GPIO_PTU0, NULL);
1251 gpio_direction_output(GPIO_PTU0, 0);
1252 mdelay(20);
1253
1254 /* enable motion sensor */
1255 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1256 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1257
1258 /* set VPU clock to 166 MHz */
1259 clk = clk_get(NULL, "vpu_clk");
1260 if (!IS_ERR(clk)) {
1261 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1262 clk_put(clk);
1263 }
1264
1265 /* enable IrDA */
1266 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1267 gpio_request(GPIO_FN_IRDA_IN, NULL);
1268 gpio_request(GPIO_PTU5, NULL);
1269 gpio_direction_output(GPIO_PTU5, 0);
1270
1271 #if defined(CONFIG_MMC_SH_MMCIF)
1272 /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
1273 gpio_request(GPIO_FN_MMC_D7, NULL);
1274 gpio_request(GPIO_FN_MMC_D6, NULL);
1275 gpio_request(GPIO_FN_MMC_D5, NULL);
1276 gpio_request(GPIO_FN_MMC_D4, NULL);
1277 gpio_request(GPIO_FN_MMC_D3, NULL);
1278 gpio_request(GPIO_FN_MMC_D2, NULL);
1279 gpio_request(GPIO_FN_MMC_D1, NULL);
1280 gpio_request(GPIO_FN_MMC_D0, NULL);
1281 gpio_request(GPIO_FN_MMC_CLK, NULL);
1282 gpio_request(GPIO_FN_MMC_CMD, NULL);
1283 gpio_request(GPIO_PTB7, NULL);
1284 gpio_direction_output(GPIO_PTB7, 0);
1285
1286 /* I/O buffer drive ability is high for MMCIF */
1287 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1288 #endif
1289
1290 /* enable I2C device */
1291 i2c_register_board_info(0, i2c0_devices,
1292 ARRAY_SIZE(i2c0_devices));
1293
1294 i2c_register_board_info(1, i2c1_devices,
1295 ARRAY_SIZE(i2c1_devices));
1296
1297 #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
1298 /* VOU */
1299 gpio_request(GPIO_FN_DV_D15, NULL);
1300 gpio_request(GPIO_FN_DV_D14, NULL);
1301 gpio_request(GPIO_FN_DV_D13, NULL);
1302 gpio_request(GPIO_FN_DV_D12, NULL);
1303 gpio_request(GPIO_FN_DV_D11, NULL);
1304 gpio_request(GPIO_FN_DV_D10, NULL);
1305 gpio_request(GPIO_FN_DV_D9, NULL);
1306 gpio_request(GPIO_FN_DV_D8, NULL);
1307 gpio_request(GPIO_FN_DV_CLKI, NULL);
1308 gpio_request(GPIO_FN_DV_CLK, NULL);
1309 gpio_request(GPIO_FN_DV_VSYNC, NULL);
1310 gpio_request(GPIO_FN_DV_HSYNC, NULL);
1311
1312 /* AK8813 power / reset sequence */
1313 gpio_request(GPIO_PTG4, NULL);
1314 gpio_request(GPIO_PTU3, NULL);
1315 /* Reset */
1316 gpio_direction_output(GPIO_PTG4, 0);
1317 /* Power down */
1318 gpio_direction_output(GPIO_PTU3, 1);
1319
1320 udelay(10);
1321
1322 /* Power up, reset */
1323 gpio_set_value(GPIO_PTU3, 0);
1324
1325 udelay(10);
1326
1327 /* Remove reset */
1328 gpio_set_value(GPIO_PTG4, 1);
1329 #endif
1330
1331 return platform_add_devices(ecovec_devices,
1332 ARRAY_SIZE(ecovec_devices));
1333 }
1334 arch_initcall(arch_setup);
1335
1336 static int __init devices_setup(void)
1337 {
1338 sh_eth_init(&sh_eth_plat);
1339 return 0;
1340 }
1341 device_initcall(devices_setup);
1342
1343 static struct sh_machine_vector mv_ecovec __initmv = {
1344 .mv_name = "R0P7724 (EcoVec)",
1345 };
Linux with added FPC-III support