2 * SPCA508 chip based cameras subdriver
4 * Copyright (C) 2009 Jean-Francois Moine <http://moinejf.free.fr>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #define MODULE_NAME "spca508"
25 MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
26 MODULE_DESCRIPTION("GSPCA/SPCA508 USB Camera Driver");
27 MODULE_LICENSE("GPL");
29 /* specific webcam descriptor */
31 struct gspca_dev gspca_dev
; /* !! must be the first item */
36 #define CreativeVista 0
37 #define HamaUSBSightcam 1
38 #define HamaUSBSightcam2 2
39 #define IntelEasyPCCamera 3
40 #define MicroInnovationIC200 4
41 #define ViewQuestVQ110 5
44 /* V4L2 controls supported by the driver */
45 static int sd_setbrightness(struct gspca_dev
*gspca_dev
, __s32 val
);
46 static int sd_getbrightness(struct gspca_dev
*gspca_dev
, __s32
*val
);
48 static const struct ctrl sd_ctrls
[] = {
51 .id
= V4L2_CID_BRIGHTNESS
,
52 .type
= V4L2_CTRL_TYPE_INTEGER
,
57 #define BRIGHTNESS_DEF 128
58 .default_value
= BRIGHTNESS_DEF
,
60 .set
= sd_setbrightness
,
61 .get
= sd_getbrightness
,
65 static const struct v4l2_pix_format sif_mode
[] = {
66 {160, 120, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
68 .sizeimage
= 160 * 120 * 3 / 2,
69 .colorspace
= V4L2_COLORSPACE_SRGB
,
71 {176, 144, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
73 .sizeimage
= 176 * 144 * 3 / 2,
74 .colorspace
= V4L2_COLORSPACE_SRGB
,
76 {320, 240, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
78 .sizeimage
= 320 * 240 * 3 / 2,
79 .colorspace
= V4L2_COLORSPACE_SRGB
,
81 {352, 288, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
83 .sizeimage
= 352 * 288 * 3 / 2,
84 .colorspace
= V4L2_COLORSPACE_SRGB
,
88 /* Frame packet header offsets for the spca508 */
89 #define SPCA508_OFFSET_DATA 37
92 * Initialization data: this is the first set-up data written to the
93 * device (before the open data).
95 static const u16 spca508_init_data
[][2] = {
98 {0x0020, 0x8112}, /* Video drop enable, ISO streaming disable */
99 {0x0003, 0x8111}, /* Reset compression & memory */
100 {0x0000, 0x8110}, /* Disable all outputs */
101 /* READ {0x0000, 0x8114} -> 0000: 00 */
102 {0x0000, 0x8114}, /* SW GPIO data */
103 {0x0008, 0x8110}, /* Enable charge pump output */
104 {0x0002, 0x8116}, /* 200 kHz pump clock */
105 /* UNKNOWN DIRECTION (URB_FUNCTION_SELECT_INTERFACE:) */
106 {0x0003, 0x8111}, /* Reset compression & memory */
107 {0x0000, 0x8111}, /* Normal mode (not reset) */
109 /* Enable charge pump output, sync.serial,external 2x clock */
110 {0x000d, 0x8114}, /* SW GPIO data */
111 {0x0002, 0x8116}, /* 200 kHz pump clock */
112 {0x0020, 0x8112}, /* Video drop enable, ISO streaming disable */
113 /* --------------------------------------- */
114 {0x000f, 0x8402}, /* memory bank */
115 {0x0000, 0x8403}, /* ... address */
116 /* --------------------------------------- */
117 /* 0x88__ is Synchronous Serial Interface. */
118 /* TBD: This table could be expressed more compactly */
119 /* using spca508_write_i2c_vector(). */
120 /* TBD: Should see if the values in spca50x_i2c_data */
121 /* would work with the VQ110 instead of the values */
123 {0x00c0, 0x8804}, /* SSI slave addr */
124 {0x0008, 0x8802}, /* 375 Khz SSI clock */
125 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
126 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
127 {0x0008, 0x8802}, /* 375 Khz SSI clock */
128 {0x0012, 0x8801}, /* SSI reg addr */
129 {0x0080, 0x8800}, /* SSI data to write */
130 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
131 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
132 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
133 {0x0008, 0x8802}, /* 375 Khz SSI clock */
134 {0x0012, 0x8801}, /* SSI reg addr */
135 {0x0000, 0x8800}, /* SSI data to write */
136 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
137 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
138 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
139 {0x0008, 0x8802}, /* 375 Khz SSI clock */
140 {0x0011, 0x8801}, /* SSI reg addr */
141 {0x0040, 0x8800}, /* SSI data to write */
142 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
143 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
144 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
148 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
149 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
150 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
154 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
155 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
156 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
160 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
161 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
162 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
166 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
167 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
168 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
172 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
173 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
174 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
178 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
179 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
180 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
184 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
185 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
186 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
190 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
191 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
192 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
196 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
197 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
198 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
202 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
203 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
204 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
208 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
209 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
210 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
214 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
215 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
216 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
220 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
221 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
222 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
226 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
227 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
228 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
232 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
233 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
234 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
238 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
239 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
240 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
244 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
245 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
246 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
250 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
251 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
252 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
256 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
257 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
258 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
262 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
263 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
264 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
268 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
269 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
270 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
274 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
275 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
276 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
280 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
281 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
282 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
286 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
287 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
288 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
292 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
293 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
294 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
298 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
299 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
300 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
304 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
305 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
306 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
310 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
311 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
312 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
316 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
317 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
318 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
322 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
323 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
324 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
328 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
329 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
330 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
334 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
335 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
336 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
340 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
341 /* --------------------------------------- */
342 {0x0012, 0x8700}, /* Clock speed 48Mhz/(2+2)/2= 6 Mhz */
343 {0x0000, 0x8701}, /* CKx1 clock delay adj */
344 {0x0000, 0x8701}, /* CKx1 clock delay adj */
345 {0x0001, 0x870c}, /* CKOx2 output */
346 /* --------------------------------------- */
347 {0x0080, 0x8600}, /* Line memory read counter (L) */
348 {0x0001, 0x8606}, /* reserved */
349 {0x0064, 0x8607}, /* Line memory read counter (H) 0x6480=25,728 */
350 {0x002a, 0x8601}, /* CDSP sharp interpolation mode,
351 * line sel for color sep, edge enhance enab */
352 {0x0000, 0x8602}, /* optical black level for user settng = 0 */
353 {0x0080, 0x8600}, /* Line memory read counter (L) */
354 {0x000a, 0x8603}, /* optical black level calc mode:
355 * auto; optical black offset = 10 */
356 {0x00df, 0x865b}, /* Horiz offset for valid pixels (L)=0xdf */
357 {0x0012, 0x865c}, /* Vert offset for valid lines (L)=0x12 */
359 /* The following two lines seem to be the "wrong" resolution. */
360 /* But perhaps these indicate the actual size of the sensor */
361 /* rather than the size of the current video mode. */
362 {0x0058, 0x865d}, /* Horiz valid pixels (*4) (L) = 352 */
363 {0x0048, 0x865e}, /* Vert valid lines (*4) (L) = 288 */
365 {0x0015, 0x8608}, /* A11 Coef ... */
374 {0x0001, 0x8611}, /* R offset for white balance ... */
378 {0x005b, 0x8651}, /* R gain for white balance ... */
383 {0x0001, 0x863f}, /* Fixed gamma correction enable, USB control,
384 * lum filter disable, lum noise clip disable */
385 {0x00a1, 0x8656}, /* Window1 size 256x256, Windows2 size 64x64,
386 * gamma look-up disable,
387 * new edge enhancement enable */
388 {0x0018, 0x8657}, /* Edge gain high thresh */
389 {0x0020, 0x8658}, /* Edge gain low thresh */
390 {0x000a, 0x8659}, /* Edge bandwidth high threshold */
391 {0x0005, 0x865a}, /* Edge bandwidth low threshold */
392 /* -------------------------------- */
393 {0x0030, 0x8112}, /* Video drop enable, ISO streaming enable */
394 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
395 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
397 {0x0034, 0x8801}, /* SSI reg addr */
399 /* SSI data to write */
400 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
401 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
402 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
406 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
408 /* ----- Read back coefs we wrote earlier. */
409 /* READ { 0x0000, 0x8608 } -> 0000: 15 */
410 /* READ { 0x0000, 0x8609 } -> 0000: 30 */
411 /* READ { 0x0000, 0x860a } -> 0000: fb */
412 /* READ { 0x0000, 0x860b } -> 0000: 3e */
413 /* READ { 0x0000, 0x860c } -> 0000: ce */
414 /* READ { 0x0000, 0x860d } -> 0000: f4 */
415 /* READ { 0x0000, 0x860e } -> 0000: eb */
416 /* READ { 0x0000, 0x860f } -> 0000: dc */
417 /* READ { 0x0000, 0x8610 } -> 0000: 39 */
418 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
419 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
423 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
426 /* This chunk is seemingly redundant with */
427 /* earlier commands (A11 Coef...), but if I disable it, */
428 /* the image appears too dark. Maybe there was some kind of */
429 /* reset since the earlier commands, so this is necessary again. */
441 {0x0000, 0x8508}, /* Disable compression. */
442 /* Previous line was:
443 {0x0021, 0x8508}, * Enable compression. */
444 {0x0032, 0x850b}, /* compression stuff */
445 {0x0003, 0x8509}, /* compression stuff */
446 {0x0011, 0x850a}, /* compression stuff */
447 {0x0021, 0x850d}, /* compression stuff */
448 {0x0010, 0x850c}, /* compression stuff */
449 {0x0003, 0x8500}, /* *** Video mode: 160x120 */
450 {0x0001, 0x8501}, /* Hardware-dominated snap control */
451 {0x0061, 0x8656}, /* Window1 size 128x128, Windows2 size 128x128,
452 * gamma look-up disable,
453 * new edge enhancement enable */
454 {0x0018, 0x8617}, /* Window1 start X (*2) */
455 {0x0008, 0x8618}, /* Window1 start Y (*2) */
456 {0x0061, 0x8656}, /* Window1 size 128x128, Windows2 size 128x128,
457 * gamma look-up disable,
458 * new edge enhancement enable */
459 {0x0058, 0x8619}, /* Window2 start X (*2) */
460 {0x0008, 0x861a}, /* Window2 start Y (*2) */
461 {0x00ff, 0x8615}, /* High lum thresh for white balance */
462 {0x0000, 0x8616}, /* Low lum thresh for white balance */
463 {0x0012, 0x8700}, /* Clock speed 48Mhz/(2+2)/2= 6 Mhz */
464 {0x0012, 0x8700}, /* Clock speed 48Mhz/(2+2)/2= 6 Mhz */
465 /* READ { 0x0000, 0x8656 } -> 0000: 61 */
466 {0x0028, 0x8802}, /* 375 Khz SSI clock, SSI r/w sync with VSYNC */
467 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
468 /* READ { 0x0001, 0x8802 } -> 0000: 28 */
469 {0x1f28, 0x8802}, /* 375 Khz SSI clock, SSI r/w sync with VSYNC */
470 {0x0010, 0x8801}, /* SSI reg addr */
471 {0x003e, 0x8800}, /* SSI data to write */
472 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
474 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
475 /* READ { 0x0001, 0x8802 } -> 0000: 28 */
479 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
480 {0x0001, 0x8602}, /* optical black level for user settning = 1 */
483 {0x0023, 0x8700}, /* Clock speed 48Mhz/(3+2)/4= 2.4 Mhz */
484 {0x000f, 0x8602}, /* optical black level for user settning = 15 */
487 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
488 /* READ { 0x0001, 0x8802 } -> 0000: 28 */
492 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
493 {0x002f, 0x8651}, /* R gain for white balance ... */
495 /* READ { 0x0000, 0x8655 } -> 0000: 00 */
498 {0x0030, 0x8112}, /* Video drop enable, ISO streaming enable */
499 {0x0020, 0x8112}, /* Video drop enable, ISO streaming disable */
500 /* UNKNOWN DIRECTION (URB_FUNCTION_SELECT_INTERFACE: (ALT=0) ) */
505 * Initialization data for Intel EasyPC Camera CS110
507 static const u16 spca508cs110_init_data
[][2] = {
508 {0x0000, 0x870b}, /* Reset CTL3 */
509 {0x0003, 0x8111}, /* Soft Reset compression, memory, TG & CDSP */
510 {0x0000, 0x8111}, /* Normal operation on reset */
512 /* External Clock 2x & Synchronous Serial Interface Output */
513 {0x0020, 0x8112}, /* Video Drop packet enable */
514 {0x0000, 0x8114}, /* Software GPIO output data */
520 /* Initial sequence Synchronous Serial Interface */
521 {0x000f, 0x8402}, /* Memory bank Address */
522 {0x0000, 0x8403}, /* Memory bank Address */
523 {0x00ba, 0x8804}, /* SSI Slave address */
524 {0x0010, 0x8802}, /* 93.75kHz SSI Clock Two DataByte */
525 {0x0010, 0x8802}, /* 93.75kHz SSI Clock two DataByte */
528 {0x000a, 0x8805}, /* a - NWG: Dunno what this is about */
562 {0x0002, 0x8704}, /* External input CKIx1 */
563 {0x0001, 0x8606}, /* 1 Line memory Read Counter (H) Result: (d)410 */
564 {0x009a, 0x8600}, /* Line memory Read Counter (L) */
565 {0x0001, 0x865b}, /* 1 Horizontal Offset for Valid Pixel(L) */
566 {0x0003, 0x865c}, /* 3 Vertical Offset for Valid Lines(L) */
567 {0x0058, 0x865d}, /* 58 Horizontal Valid Pixel Window(L) */
569 {0x0006, 0x8660}, /* Nibble data + input order */
571 {0x000a, 0x8602}, /* Optical black level set to 0x0a */
572 {0x0000, 0x8603}, /* Optical black level Offset */
574 /* {0x0000, 0x8611}, * 0 R Offset for white Balance */
575 /* {0x0000, 0x8612}, * 1 Gr Offset for white Balance */
576 /* {0x0000, 0x8613}, * 1f B Offset for white Balance */
577 /* {0x0000, 0x8614}, * f0 Gb Offset for white Balance */
579 {0x0040, 0x8651}, /* 2b BLUE gain for white balance good at all 60 */
580 {0x0030, 0x8652}, /* 41 Gr Gain for white Balance (L) */
581 {0x0035, 0x8653}, /* 26 RED gain for white balance */
582 {0x0035, 0x8654}, /* 40Gb Gain for white Balance (L) */
584 /* Fixed Gamma correction enabled (makes colours look better) */
587 /* High bits for white balance*****brightness control*** */
591 static const u16 spca508_sightcam_init_data
[][2] = {
592 /* This line seems to setup the frame/canvas */
595 /* Theese 6 lines are needed to startup the webcam */
603 /* This part seems to make the pictures darker? (autobrightness?) */
618 /* This section is just needed, it probably
619 * does something like the previous section,
620 * but the cam won't start if it's not included.
633 /* Makes the picture darker - and the
634 * cam won't start if not included
643 /* seems to place the colors ontop of each other #1 */
649 /* if not included the pictures becomes _very_ dark */
654 /* seems to place the colors ontop of each other #2 */
660 /* webcam won't start if not included */
666 /* adjusts the colors */
674 static const u16 spca508_sightcam2_init_data
[][2] = {
1011 /* This line starts it all, it is not needed here */
1012 /* since it has been build into the driver */
1013 /* jfm: don't start now */
1014 /* {0x0030, 0x8112}, */
1019 * Initialization data for Creative Webcam Vista
1021 static const u16 spca508_vista_init_data
[][2] = {
1022 {0x0008, 0x8200}, /* Clear register */
1023 {0x0000, 0x870b}, /* Reset CTL3 */
1024 {0x0020, 0x8112}, /* Video Drop packet enable */
1025 {0x0003, 0x8111}, /* Soft Reset compression, memory, TG & CDSP */
1026 {0x0000, 0x8110}, /* Disable everything */
1027 {0x0000, 0x8114}, /* Software GPIO output data */
1032 {0x0090, 0x8110}, /* Enable: SSI output, External 2X clock output */
1040 {0x000f, 0x8402}, /* Memory bank Address */
1041 {0x0000, 0x8403}, /* Memory bank Address */
1042 {0x00ba, 0x8804}, /* SSI Slave address */
1043 {0x0010, 0x8802}, /* 93.75kHz SSI Clock Two DataByte */
1045 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1046 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1047 {0x0010, 0x8802}, /* Will write 2 bytes (DATA1+DATA2) */
1048 {0x0020, 0x8801}, /* Register address for SSI read/write */
1049 {0x0044, 0x8805}, /* DATA2 */
1050 {0x0004, 0x8800}, /* DATA1 -> write triggered */
1051 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1053 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1054 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1059 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1061 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1062 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1067 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1069 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1070 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1075 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1077 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1078 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1083 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1085 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1086 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1091 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1093 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1094 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1099 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1101 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1102 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1107 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1109 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1110 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1115 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1117 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1118 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1123 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1125 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1126 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1131 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1133 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1134 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1139 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1141 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1142 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1147 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1149 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1150 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1155 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1157 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1158 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1163 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1165 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1166 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1171 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1174 {0x0002, 0x8704}, /* External input CKIx1 */
1175 {0x0001, 0x870c}, /* Select CKOx2 output */
1176 {0x009a, 0x8600}, /* Line memory Read Counter (L) */
1177 {0x0001, 0x8606}, /* 1 Line memory Read Counter (H) Result: (d)410 */
1182 {0x0001, 0x865b}, /* 1 Horizontal Offset for Valid Pixel(L) */
1183 {0x0003, 0x865c}, /* Vertical offset for valid lines (L) */
1184 {0x0058, 0x865d}, /* Horizontal valid pixels window (L) */
1185 {0x0048, 0x865e}, /* Vertical valid lines window (L) */
1189 /* Enable nibble data input, select nibble input order */
1191 {0x0013, 0x8608}, /* A11 Coeficients for color correction */
1193 /* Note: these values are confirmed at the end of array */
1194 {0x0005, 0x860a}, /* ... */
1200 {0x0025, 0x8610}, /* A33 Coef. */
1201 {0x00fc, 0x8611}, /* White balance offset: R */
1202 {0x0001, 0x8612}, /* White balance offset: Gr */
1203 {0x00fe, 0x8613}, /* White balance offset: B */
1204 {0x0000, 0x8614}, /* White balance offset: Gb */
1206 {0x0064, 0x8651}, /* R gain for white balance (L) */
1207 {0x0040, 0x8652}, /* Gr gain for white balance (L) */
1208 {0x0066, 0x8653}, /* B gain for white balance (L) */
1209 {0x0040, 0x8654}, /* Gb gain for white balance (L) */
1210 {0x0001, 0x863f}, /* Enable fixed gamma correction */
1212 {0x00a1, 0x8656}, /* Size - Window1: 256x256, Window2: 128x128,
1213 * UV division: UV no change,
1214 * Enable New edge enhancement */
1215 {0x0018, 0x8657}, /* Edge gain high threshold */
1216 {0x0020, 0x8658}, /* Edge gain low threshold */
1217 {0x000a, 0x8659}, /* Edge bandwidth high threshold */
1218 {0x0005, 0x865a}, /* Edge bandwidth low threshold */
1219 {0x0064, 0x8607}, /* UV filter enable */
1222 {0x0000, 0x86b0}, /* Bad pixels compensation address */
1223 {0x00dc, 0x86b1}, /* X coord for bad pixels compensation (L) */
1225 {0x0009, 0x86b3}, /* Y coord for bad pixels compensation (L) */
1253 /* READ { 0x0000, 0x8608 } -> 0000: 13 */
1254 /* READ { 0x0000, 0x8609 } -> 0000: 28 */
1255 /* READ { 0x0000, 0x8610 } -> 0000: 05 */
1256 /* READ { 0x0000, 0x8611 } -> 0000: 25 */
1257 /* READ { 0x0000, 0x8612 } -> 0000: e1 */
1258 /* READ { 0x0000, 0x8613 } -> 0000: fa */
1259 /* READ { 0x0000, 0x8614 } -> 0000: f4 */
1260 /* READ { 0x0000, 0x8615 } -> 0000: e8 */
1261 /* READ { 0x0000, 0x8616 } -> 0000: 25 */
1265 static int reg_write(struct usb_device
*dev
,
1266 u16 index
, u16 value
)
1270 ret
= usb_control_msg(dev
,
1271 usb_sndctrlpipe(dev
, 0),
1273 USB_TYPE_VENDOR
| USB_RECIP_DEVICE
,
1274 value
, index
, NULL
, 0, 500);
1275 PDEBUG(D_USBO
, "reg write i:0x%04x = 0x%02x",
1278 err("reg write: error %d", ret
);
1283 /* returns: negative is error, pos or zero is data */
1284 static int reg_read(struct gspca_dev
*gspca_dev
,
1285 u16 index
) /* wIndex */
1289 ret
= usb_control_msg(gspca_dev
->dev
,
1290 usb_rcvctrlpipe(gspca_dev
->dev
, 0),
1292 USB_DIR_IN
| USB_TYPE_VENDOR
| USB_RECIP_DEVICE
,
1295 gspca_dev
->usb_buf
, 1,
1297 PDEBUG(D_USBI
, "reg read i:%04x --> %02x",
1298 index
, gspca_dev
->usb_buf
[0]);
1300 err("reg_read err %d", ret
);
1303 return gspca_dev
->usb_buf
[0];
1306 /* send 1 or 2 bytes to the sensor via the Synchronous Serial Interface */
1307 static int ssi_w(struct gspca_dev
*gspca_dev
,
1310 struct usb_device
*dev
= gspca_dev
->dev
;
1313 ret
= reg_write(dev
, 0x8802, reg
>> 8);
1316 ret
= reg_write(dev
, 0x8801, reg
& 0x00ff);
1319 if ((reg
& 0xff00) == 0x1000) { /* if 2 bytes */
1320 ret
= reg_write(dev
, 0x8805, val
& 0x00ff);
1325 ret
= reg_write(dev
, 0x8800, val
);
1329 /* poll until not busy */
1332 ret
= reg_read(gspca_dev
, 0x8803);
1335 if (gspca_dev
->usb_buf
[0] == 0)
1338 PDEBUG(D_ERR
, "ssi_w busy %02x",
1339 gspca_dev
->usb_buf
[0]);
1350 static int write_vector(struct gspca_dev
*gspca_dev
,
1351 const u16 (*data
)[2])
1353 struct usb_device
*dev
= gspca_dev
->dev
;
1356 while ((*data
)[1] != 0) {
1357 if ((*data
)[1] & 0x8000) {
1358 if ((*data
)[1] == 0xdd00) /* delay */
1361 ret
= reg_write(dev
, (*data
)[1], (*data
)[0]);
1363 ret
= ssi_w(gspca_dev
, (*data
)[1], (*data
)[0]);
1372 /* this function is called at probe time */
1373 static int sd_config(struct gspca_dev
*gspca_dev
,
1374 const struct usb_device_id
*id
)
1376 struct sd
*sd
= (struct sd
*) gspca_dev
;
1379 const u16 (*init_data
)[2];
1380 static const u16 (*(init_data_tb
[]))[2] = {
1381 spca508_vista_init_data
, /* CreativeVista 0 */
1382 spca508_sightcam_init_data
, /* HamaUSBSightcam 1 */
1383 spca508_sightcam2_init_data
, /* HamaUSBSightcam2 2 */
1384 spca508cs110_init_data
, /* IntelEasyPCCamera 3 */
1385 spca508cs110_init_data
, /* MicroInnovationIC200 4 */
1386 spca508_init_data
, /* ViewQuestVQ110 5 */
1389 /* Read from global register the USB product and vendor IDs, just to
1390 * prove that we can communicate with the device. This works, which
1391 * confirms at we are communicating properly and that the device
1393 data1
= reg_read(gspca_dev
, 0x8104);
1394 data2
= reg_read(gspca_dev
, 0x8105);
1395 PDEBUG(D_PROBE
, "Webcam Vendor ID: 0x%02x%02x", data2
, data1
);
1397 data1
= reg_read(gspca_dev
, 0x8106);
1398 data2
= reg_read(gspca_dev
, 0x8107);
1399 PDEBUG(D_PROBE
, "Webcam Product ID: 0x%02x%02x", data2
, data1
);
1401 data1
= reg_read(gspca_dev
, 0x8621);
1402 PDEBUG(D_PROBE
, "Window 1 average luminance: %d", data1
);
1404 cam
= &gspca_dev
->cam
;
1405 cam
->cam_mode
= sif_mode
;
1406 cam
->nmodes
= ARRAY_SIZE(sif_mode
);
1408 sd
->subtype
= id
->driver_info
;
1409 sd
->brightness
= BRIGHTNESS_DEF
;
1411 init_data
= init_data_tb
[sd
->subtype
];
1412 return write_vector(gspca_dev
, init_data
);
1415 /* this function is called at probe and resume time */
1416 static int sd_init(struct gspca_dev
*gspca_dev
)
1421 static int sd_start(struct gspca_dev
*gspca_dev
)
1425 mode
= gspca_dev
->cam
.cam_mode
[gspca_dev
->curr_mode
].priv
;
1426 reg_write(gspca_dev
->dev
, 0x8500, mode
);
1430 reg_write(gspca_dev
->dev
, 0x8700, 0x28); /* clock */
1435 reg_write(gspca_dev
->dev
, 0x8700, 0x23); /* clock */
1438 reg_write(gspca_dev
->dev
, 0x8112, 0x10 | 0x20);
1442 static void sd_stopN(struct gspca_dev
*gspca_dev
)
1444 /* Video ISO disable, Video Drop Packet enable: */
1445 reg_write(gspca_dev
->dev
, 0x8112, 0x20);
1448 static void sd_pkt_scan(struct gspca_dev
*gspca_dev
,
1449 u8
*data
, /* isoc packet */
1450 int len
) /* iso packet length */
1453 case 0: /* start of frame */
1454 gspca_frame_add(gspca_dev
, LAST_PACKET
, NULL
, 0);
1455 data
+= SPCA508_OFFSET_DATA
;
1456 len
-= SPCA508_OFFSET_DATA
;
1457 gspca_frame_add(gspca_dev
, FIRST_PACKET
, data
, len
);
1459 case 0xff: /* drop */
1464 gspca_frame_add(gspca_dev
, INTER_PACKET
, data
, len
);
1469 static void setbrightness(struct gspca_dev
*gspca_dev
)
1471 struct sd
*sd
= (struct sd
*) gspca_dev
;
1472 u8 brightness
= sd
->brightness
;
1474 /* MX seem contrast */
1475 reg_write(gspca_dev
->dev
, 0x8651, brightness
);
1476 reg_write(gspca_dev
->dev
, 0x8652, brightness
);
1477 reg_write(gspca_dev
->dev
, 0x8653, brightness
);
1478 reg_write(gspca_dev
->dev
, 0x8654, brightness
);
1481 static int sd_setbrightness(struct gspca_dev
*gspca_dev
, __s32 val
)
1483 struct sd
*sd
= (struct sd
*) gspca_dev
;
1485 sd
->brightness
= val
;
1486 if (gspca_dev
->streaming
)
1487 setbrightness(gspca_dev
);
1491 static int sd_getbrightness(struct gspca_dev
*gspca_dev
, __s32
*val
)
1493 struct sd
*sd
= (struct sd
*) gspca_dev
;
1495 *val
= sd
->brightness
;
1499 /* sub-driver description */
1500 static const struct sd_desc sd_desc
= {
1501 .name
= MODULE_NAME
,
1503 .nctrls
= ARRAY_SIZE(sd_ctrls
),
1504 .config
= sd_config
,
1508 .pkt_scan
= sd_pkt_scan
,
1511 /* -- module initialisation -- */
1512 static const struct usb_device_id device_table
[] = {
1513 {USB_DEVICE(0x0130, 0x0130), .driver_info
= HamaUSBSightcam
},
1514 {USB_DEVICE(0x041e, 0x4018), .driver_info
= CreativeVista
},
1515 {USB_DEVICE(0x0733, 0x0110), .driver_info
= ViewQuestVQ110
},
1516 {USB_DEVICE(0x0af9, 0x0010), .driver_info
= HamaUSBSightcam
},
1517 {USB_DEVICE(0x0af9, 0x0011), .driver_info
= HamaUSBSightcam2
},
1518 {USB_DEVICE(0x8086, 0x0110), .driver_info
= IntelEasyPCCamera
},
1521 MODULE_DEVICE_TABLE(usb
, device_table
);
1523 /* -- device connect -- */
1524 static int sd_probe(struct usb_interface
*intf
,
1525 const struct usb_device_id
*id
)
1527 return gspca_dev_probe(intf
, id
, &sd_desc
, sizeof(struct sd
),
1531 static struct usb_driver sd_driver
= {
1532 .name
= MODULE_NAME
,
1533 .id_table
= device_table
,
1535 .disconnect
= gspca_disconnect
,
1537 .suspend
= gspca_suspend
,
1538 .resume
= gspca_resume
,
1542 /* -- module insert / remove -- */
1543 static int __init
sd_mod_init(void)
1545 return usb_register(&sd_driver
);
1547 static void __exit
sd_mod_exit(void)
1549 usb_deregister(&sd_driver
);
1552 module_init(sd_mod_init
);
1553 module_exit(sd_mod_exit
);