1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2001-2002 by David Brownell
6 /* this file is part of ehci-hcd.c */
8 #ifdef CONFIG_DYNAMIC_DEBUG
11 * check the values in the HCSPARAMS register
12 * (host controller _Structural_ parameters)
13 * see EHCI spec, Table 2-4 for each value
15 static void dbg_hcs_params(struct ehci_hcd
*ehci
, char *label
)
17 u32 params
= ehci_readl(ehci
, &ehci
->caps
->hcs_params
);
20 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
22 HCS_DEBUG_PORT(params
),
23 HCS_INDICATOR(params
) ? " ind" : "",
26 HCS_PORTROUTED(params
) ? "" : " ordered",
27 HCS_PPC(params
) ? "" : " !ppc",
29 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
30 if (HCS_PORTROUTED(params
)) {
32 char buf
[46], tmp
[7], byte
;
35 for (i
= 0; i
< HCS_N_PORTS(params
); i
++) {
36 /* FIXME MIPS won't readb() ... */
37 byte
= readb(&ehci
->caps
->portroute
[(i
>> 1)]);
39 (i
& 0x1) ? byte
& 0xf : (byte
>> 4) & 0xf);
42 ehci_dbg(ehci
, "%s portroute %s\n", label
, buf
);
47 * check the values in the HCCPARAMS register
48 * (host controller _Capability_ parameters)
49 * see EHCI Spec, Table 2-5 for each value
51 static void dbg_hcc_params(struct ehci_hcd
*ehci
, char *label
)
53 u32 params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
55 if (HCC_ISOC_CACHE(params
)) {
57 "%s hcc_params %04x caching frame %s%s%s\n",
59 HCC_PGM_FRAMELISTLEN(params
) ? "256/512/1024" : "1024",
60 HCC_CANPARK(params
) ? " park" : "",
61 HCC_64BIT_ADDR(params
) ? " 64 bit addr" : "");
64 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
67 HCC_ISOC_THRES(params
),
68 HCC_PGM_FRAMELISTLEN(params
) ? "256/512/1024" : "1024",
69 HCC_CANPARK(params
) ? " park" : "",
70 HCC_64BIT_ADDR(params
) ? " 64 bit addr" : "",
71 HCC_LPM(params
) ? " LPM" : "",
72 HCC_PER_PORT_CHANGE_EVENT(params
) ? " ppce" : "",
73 HCC_HW_PREFETCH(params
) ? " hw prefetch" : "",
74 HCC_32FRAME_PERIODIC_LIST(params
) ?
75 " 32 periodic list" : "");
79 static void __maybe_unused
80 dbg_qtd(const char *label
, struct ehci_hcd
*ehci
, struct ehci_qtd
*qtd
)
82 ehci_dbg(ehci
, "%s td %p n%08x %08x t%08x p0=%08x\n", label
, qtd
,
83 hc32_to_cpup(ehci
, &qtd
->hw_next
),
84 hc32_to_cpup(ehci
, &qtd
->hw_alt_next
),
85 hc32_to_cpup(ehci
, &qtd
->hw_token
),
86 hc32_to_cpup(ehci
, &qtd
->hw_buf
[0]));
88 ehci_dbg(ehci
, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
89 hc32_to_cpup(ehci
, &qtd
->hw_buf
[1]),
90 hc32_to_cpup(ehci
, &qtd
->hw_buf
[2]),
91 hc32_to_cpup(ehci
, &qtd
->hw_buf
[3]),
92 hc32_to_cpup(ehci
, &qtd
->hw_buf
[4]));
95 static void __maybe_unused
96 dbg_qh(const char *label
, struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
98 struct ehci_qh_hw
*hw
= qh
->hw
;
100 ehci_dbg(ehci
, "%s qh %p n%08x info %x %x qtd %x\n", label
,
101 qh
, hw
->hw_next
, hw
->hw_info1
, hw
->hw_info2
, hw
->hw_current
);
102 dbg_qtd("overlay", ehci
, (struct ehci_qtd
*) &hw
->hw_qtd_next
);
105 static void __maybe_unused
106 dbg_itd(const char *label
, struct ehci_hcd
*ehci
, struct ehci_itd
*itd
)
108 ehci_dbg(ehci
, "%s [%d] itd %p, next %08x, urb %p\n",
109 label
, itd
->frame
, itd
, hc32_to_cpu(ehci
, itd
->hw_next
),
112 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
113 hc32_to_cpu(ehci
, itd
->hw_transaction
[0]),
114 hc32_to_cpu(ehci
, itd
->hw_transaction
[1]),
115 hc32_to_cpu(ehci
, itd
->hw_transaction
[2]),
116 hc32_to_cpu(ehci
, itd
->hw_transaction
[3]),
117 hc32_to_cpu(ehci
, itd
->hw_transaction
[4]),
118 hc32_to_cpu(ehci
, itd
->hw_transaction
[5]),
119 hc32_to_cpu(ehci
, itd
->hw_transaction
[6]),
120 hc32_to_cpu(ehci
, itd
->hw_transaction
[7]));
122 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
123 hc32_to_cpu(ehci
, itd
->hw_bufp
[0]),
124 hc32_to_cpu(ehci
, itd
->hw_bufp
[1]),
125 hc32_to_cpu(ehci
, itd
->hw_bufp
[2]),
126 hc32_to_cpu(ehci
, itd
->hw_bufp
[3]),
127 hc32_to_cpu(ehci
, itd
->hw_bufp
[4]),
128 hc32_to_cpu(ehci
, itd
->hw_bufp
[5]),
129 hc32_to_cpu(ehci
, itd
->hw_bufp
[6]));
130 ehci_dbg(ehci
, " index: %d %d %d %d %d %d %d %d\n",
131 itd
->index
[0], itd
->index
[1], itd
->index
[2],
132 itd
->index
[3], itd
->index
[4], itd
->index
[5],
133 itd
->index
[6], itd
->index
[7]);
136 static void __maybe_unused
137 dbg_sitd(const char *label
, struct ehci_hcd
*ehci
, struct ehci_sitd
*sitd
)
139 ehci_dbg(ehci
, "%s [%d] sitd %p, next %08x, urb %p\n",
140 label
, sitd
->frame
, sitd
, hc32_to_cpu(ehci
, sitd
->hw_next
),
143 " addr %08x sched %04x result %08x buf %08x %08x\n",
144 hc32_to_cpu(ehci
, sitd
->hw_fullspeed_ep
),
145 hc32_to_cpu(ehci
, sitd
->hw_uframe
),
146 hc32_to_cpu(ehci
, sitd
->hw_results
),
147 hc32_to_cpu(ehci
, sitd
->hw_buf
[0]),
148 hc32_to_cpu(ehci
, sitd
->hw_buf
[1]));
151 static int __maybe_unused
152 dbg_status_buf(char *buf
, unsigned len
, const char *label
, u32 status
)
154 return scnprintf(buf
, len
,
155 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
156 label
, label
[0] ? " " : "", status
,
157 (status
& STS_PPCE_MASK
) ? " PPCE" : "",
158 (status
& STS_ASS
) ? " Async" : "",
159 (status
& STS_PSS
) ? " Periodic" : "",
160 (status
& STS_RECL
) ? " Recl" : "",
161 (status
& STS_HALT
) ? " Halt" : "",
162 (status
& STS_IAA
) ? " IAA" : "",
163 (status
& STS_FATAL
) ? " FATAL" : "",
164 (status
& STS_FLR
) ? " FLR" : "",
165 (status
& STS_PCD
) ? " PCD" : "",
166 (status
& STS_ERR
) ? " ERR" : "",
167 (status
& STS_INT
) ? " INT" : "");
170 static int __maybe_unused
171 dbg_intr_buf(char *buf
, unsigned len
, const char *label
, u32 enable
)
173 return scnprintf(buf
, len
,
174 "%s%sintrenable %02x%s%s%s%s%s%s%s",
175 label
, label
[0] ? " " : "", enable
,
176 (enable
& STS_PPCE_MASK
) ? " PPCE" : "",
177 (enable
& STS_IAA
) ? " IAA" : "",
178 (enable
& STS_FATAL
) ? " FATAL" : "",
179 (enable
& STS_FLR
) ? " FLR" : "",
180 (enable
& STS_PCD
) ? " PCD" : "",
181 (enable
& STS_ERR
) ? " ERR" : "",
182 (enable
& STS_INT
) ? " INT" : "");
185 static const char *const fls_strings
[] = { "1024", "512", "256", "??" };
188 dbg_command_buf(char *buf
, unsigned len
, const char *label
, u32 command
)
190 return scnprintf(buf
, len
,
191 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
193 label
, label
[0] ? " " : "", command
,
194 (command
& CMD_HIRD
) ? " HIRD" : "",
195 (command
& CMD_PPCEE
) ? " PPCEE" : "",
196 (command
& CMD_FSP
) ? " FSP" : "",
197 (command
& CMD_ASPE
) ? " ASPE" : "",
198 (command
& CMD_PSPE
) ? " PSPE" : "",
199 (command
& CMD_PARK
) ? " park" : "(park)",
200 CMD_PARK_CNT(command
),
201 (command
>> 16) & 0x3f,
202 (command
& CMD_LRESET
) ? " LReset" : "",
203 (command
& CMD_IAAD
) ? " IAAD" : "",
204 (command
& CMD_ASE
) ? " Async" : "",
205 (command
& CMD_PSE
) ? " Periodic" : "",
206 fls_strings
[(command
>> 2) & 0x3],
207 (command
& CMD_RESET
) ? " Reset" : "",
208 (command
& CMD_RUN
) ? "RUN" : "HALT");
212 dbg_port_buf(char *buf
, unsigned len
, const char *label
, int port
, u32 status
)
216 /* signaling state */
217 switch (status
& (3 << 10)) {
221 case 1 << 10: /* low speed */
232 return scnprintf(buf
, len
,
233 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
234 "sig=%s%s%s%s%s%s%s%s%s%s%s",
235 label
, label
[0] ? " " : "", port
, status
,
236 status
>> 25, /*device address */
237 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_ACK
?
239 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_NYET
?
241 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_STALL
?
243 (status
& PORT_SSTS
) >> 23 == PORTSC_SUSPEND_STS_ERR
?
245 (status
& PORT_POWER
) ? " POWER" : "",
246 (status
& PORT_OWNER
) ? " OWNER" : "",
248 (status
& PORT_LPM
) ? " LPM" : "",
249 (status
& PORT_RESET
) ? " RESET" : "",
250 (status
& PORT_SUSPEND
) ? " SUSPEND" : "",
251 (status
& PORT_RESUME
) ? " RESUME" : "",
252 (status
& PORT_OCC
) ? " OCC" : "",
253 (status
& PORT_OC
) ? " OC" : "",
254 (status
& PORT_PEC
) ? " PEC" : "",
255 (status
& PORT_PE
) ? " PE" : "",
256 (status
& PORT_CSC
) ? " CSC" : "",
257 (status
& PORT_CONNECT
) ? " CONNECT" : "");
261 dbg_status(struct ehci_hcd
*ehci
, const char *label
, u32 status
)
265 dbg_status_buf(buf
, sizeof(buf
), label
, status
);
266 ehci_dbg(ehci
, "%s\n", buf
);
270 dbg_cmd(struct ehci_hcd
*ehci
, const char *label
, u32 command
)
274 dbg_command_buf(buf
, sizeof(buf
), label
, command
);
275 ehci_dbg(ehci
, "%s\n", buf
);
279 dbg_port(struct ehci_hcd
*ehci
, const char *label
, int port
, u32 status
)
283 dbg_port_buf(buf
, sizeof(buf
), label
, port
, status
);
284 ehci_dbg(ehci
, "%s\n", buf
);
287 /*-------------------------------------------------------------------------*/
289 /* troubleshooting help: expose state in debugfs */
291 static int debug_async_open(struct inode
*, struct file
*);
292 static int debug_bandwidth_open(struct inode
*, struct file
*);
293 static int debug_periodic_open(struct inode
*, struct file
*);
294 static int debug_registers_open(struct inode
*, struct file
*);
296 static ssize_t
debug_output(struct file
*, char __user
*, size_t, loff_t
*);
297 static int debug_close(struct inode
*, struct file
*);
299 static const struct file_operations debug_async_fops
= {
300 .owner
= THIS_MODULE
,
301 .open
= debug_async_open
,
302 .read
= debug_output
,
303 .release
= debug_close
,
304 .llseek
= default_llseek
,
307 static const struct file_operations debug_bandwidth_fops
= {
308 .owner
= THIS_MODULE
,
309 .open
= debug_bandwidth_open
,
310 .read
= debug_output
,
311 .release
= debug_close
,
312 .llseek
= default_llseek
,
315 static const struct file_operations debug_periodic_fops
= {
316 .owner
= THIS_MODULE
,
317 .open
= debug_periodic_open
,
318 .read
= debug_output
,
319 .release
= debug_close
,
320 .llseek
= default_llseek
,
323 static const struct file_operations debug_registers_fops
= {
324 .owner
= THIS_MODULE
,
325 .open
= debug_registers_open
,
326 .read
= debug_output
,
327 .release
= debug_close
,
328 .llseek
= default_llseek
,
331 static struct dentry
*ehci_debug_root
;
333 struct debug_buffer
{
334 ssize_t (*fill_func
)(struct debug_buffer
*); /* fill method */
336 struct mutex mutex
; /* protect filling of buffer */
337 size_t count
; /* number of characters filled into buffer */
342 static inline char speed_char(u32 info1
)
344 switch (info1
& (3 << 12)) {
356 static inline char token_mark(struct ehci_hcd
*ehci
, __hc32 token
)
358 __u32 v
= hc32_to_cpu(ehci
, token
);
360 if (v
& QTD_STS_ACTIVE
)
362 if (v
& QTD_STS_HALT
)
364 if (!IS_SHORT_READ(v
))
366 /* tries to advance through hw_alt_next */
370 static void qh_lines(struct ehci_hcd
*ehci
, struct ehci_qh
*qh
,
371 char **nextp
, unsigned *sizep
)
375 struct list_head
*entry
;
378 unsigned size
= *sizep
;
381 __le32 list_end
= EHCI_LIST_END(ehci
);
382 struct ehci_qh_hw
*hw
= qh
->hw
;
384 if (hw
->hw_qtd_next
== list_end
) /* NEC does this */
387 mark
= token_mark(ehci
, hw
->hw_token
);
388 if (mark
== '/') { /* qh_alt_next controls qh advance? */
389 if ((hw
->hw_alt_next
& QTD_MASK(ehci
))
390 == ehci
->async
->hw
->hw_alt_next
)
391 mark
= '#'; /* blocked */
392 else if (hw
->hw_alt_next
== list_end
)
393 mark
= '.'; /* use hw_qtd_next */
394 /* else alt_next points to some other qtd */
396 scratch
= hc32_to_cpup(ehci
, &hw
->hw_info1
);
397 hw_curr
= (mark
== '*') ? hc32_to_cpup(ehci
, &hw
->hw_current
) : 0;
398 temp
= scnprintf(next
, size
,
399 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)"
400 " [cur %08x next %08x buf[0] %08x]",
401 qh
, scratch
& 0x007f,
402 speed_char (scratch
),
403 (scratch
>> 8) & 0x000f,
404 scratch
, hc32_to_cpup(ehci
, &hw
->hw_info2
),
405 hc32_to_cpup(ehci
, &hw
->hw_token
), mark
,
406 (cpu_to_hc32(ehci
, QTD_TOGGLE
) & hw
->hw_token
)
408 (hc32_to_cpup(ehci
, &hw
->hw_alt_next
) >> 1) & 0x0f,
409 hc32_to_cpup(ehci
, &hw
->hw_current
),
410 hc32_to_cpup(ehci
, &hw
->hw_qtd_next
),
411 hc32_to_cpup(ehci
, &hw
->hw_buf
[0]));
415 /* hc may be modifying the list as we read it ... */
416 list_for_each(entry
, &qh
->qtd_list
) {
419 td
= list_entry(entry
, struct ehci_qtd
, qtd_list
);
420 scratch
= hc32_to_cpup(ehci
, &td
->hw_token
);
422 if (hw_curr
== td
->qtd_dma
) {
424 } else if (hw
->hw_qtd_next
== cpu_to_hc32(ehci
, td
->qtd_dma
)) {
426 } else if (QTD_LENGTH(scratch
)) {
427 if (td
->hw_alt_next
== ehci
->async
->hw
->hw_alt_next
)
429 else if (td
->hw_alt_next
!= list_end
)
432 switch ((scratch
>> 8) & 0x03) {
446 temp
= scnprintf(next
, size
,
447 "\n\t%p%c%s len=%d %08x urb %p"
448 " [td %08x buf[0] %08x]",
450 (scratch
>> 16) & 0x7fff,
454 hc32_to_cpup(ehci
, &td
->hw_buf
[0]));
461 temp
= scnprintf(next
, size
, "\n");
470 static ssize_t
fill_async_buffer(struct debug_buffer
*buf
)
473 struct ehci_hcd
*ehci
;
479 hcd
= bus_to_hcd(buf
->bus
);
480 ehci
= hcd_to_ehci(hcd
);
481 next
= buf
->output_buf
;
482 size
= buf
->alloc_size
;
487 * dumps a snapshot of the async schedule.
488 * usually empty except for long-term bulk reads, or head.
489 * one QH per line, and TDs we know about
491 spin_lock_irqsave(&ehci
->lock
, flags
);
492 for (qh
= ehci
->async
->qh_next
.qh
; size
> 0 && qh
; qh
= qh
->qh_next
.qh
)
493 qh_lines(ehci
, qh
, &next
, &size
);
494 if (!list_empty(&ehci
->async_unlink
) && size
> 0) {
495 temp
= scnprintf(next
, size
, "\nunlink =\n");
499 list_for_each_entry(qh
, &ehci
->async_unlink
, unlink_node
) {
502 qh_lines(ehci
, qh
, &next
, &size
);
505 spin_unlock_irqrestore(&ehci
->lock
, flags
);
507 return strlen(buf
->output_buf
);
510 static ssize_t
fill_bandwidth_buffer(struct debug_buffer
*buf
)
512 struct ehci_hcd
*ehci
;
514 struct ehci_per_sched
*ps
;
520 u8 budget
[EHCI_BANDWIDTH_SIZE
];
522 ehci
= hcd_to_ehci(bus_to_hcd(buf
->bus
));
523 next
= buf
->output_buf
;
524 size
= buf
->alloc_size
;
528 spin_lock_irq(&ehci
->lock
);
530 /* Dump the HS bandwidth table */
531 temp
= scnprintf(next
, size
,
532 "HS bandwidth allocation (us per microframe)\n");
535 for (i
= 0; i
< EHCI_BANDWIDTH_SIZE
; i
+= 8) {
536 bw
= &ehci
->bandwidth
[i
];
537 temp
= scnprintf(next
, size
,
538 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
539 i
, bw
[0], bw
[1], bw
[2], bw
[3],
540 bw
[4], bw
[5], bw
[6], bw
[7]);
545 /* Dump all the FS/LS tables */
546 list_for_each_entry(tt
, &ehci
->tt_list
, tt_list
) {
547 temp
= scnprintf(next
, size
,
548 "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n",
549 dev_name(&tt
->usb_tt
->hub
->dev
),
550 tt
->tt_port
+ !!tt
->usb_tt
->multi
);
555 temp
= scnprintf(next
, size
,
556 " %5u%5u%5u%5u%5u%5u%5u%5u\n",
557 bf
[0], bf
[1], bf
[2], bf
[3],
558 bf
[4], bf
[5], bf
[6], bf
[7]);
562 temp
= scnprintf(next
, size
,
563 "FS/LS budget (us per microframe)\n");
566 compute_tt_budget(budget
, tt
);
567 for (i
= 0; i
< EHCI_BANDWIDTH_SIZE
; i
+= 8) {
569 temp
= scnprintf(next
, size
,
570 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
571 i
, bw
[0], bw
[1], bw
[2], bw
[3],
572 bw
[4], bw
[5], bw
[6], bw
[7]);
576 list_for_each_entry(ps
, &tt
->ps_list
, ps_list
) {
577 temp
= scnprintf(next
, size
,
578 "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n",
579 dev_name(&ps
->udev
->dev
),
580 ps
->ep
->desc
.bEndpointAddress
,
582 ps
->bw_phase
, ps
->phase_uf
,
583 ps
->bw_period
, ps
->cs_mask
);
588 spin_unlock_irq(&ehci
->lock
);
590 return next
- buf
->output_buf
;
593 static unsigned output_buf_tds_dir(char *buf
, struct ehci_hcd
*ehci
,
594 struct ehci_qh_hw
*hw
, struct ehci_qh
*qh
, unsigned size
)
596 u32 scratch
= hc32_to_cpup(ehci
, &hw
->hw_info1
);
597 struct ehci_qtd
*qtd
;
601 /* count tds, get ep direction */
602 list_for_each_entry(qtd
, &qh
->qtd_list
, qtd_list
) {
604 switch ((hc32_to_cpu(ehci
, qtd
->hw_token
) >> 8) & 0x03) {
614 return scnprintf(buf
, size
, " (%c%d ep%d%s [%d/%d] q%d p%d)",
615 speed_char(scratch
), scratch
& 0x007f,
616 (scratch
>> 8) & 0x000f, type
, qh
->ps
.usecs
,
617 qh
->ps
.c_usecs
, temp
, 0x7ff & (scratch
>> 16));
620 #define DBG_SCHED_LIMIT 64
621 static ssize_t
fill_periodic_buffer(struct debug_buffer
*buf
)
624 struct ehci_hcd
*ehci
;
626 union ehci_shadow p
, *seen
;
627 unsigned temp
, size
, seen_count
;
632 seen
= kmalloc_array(DBG_SCHED_LIMIT
, sizeof(*seen
), GFP_ATOMIC
);
637 hcd
= bus_to_hcd(buf
->bus
);
638 ehci
= hcd_to_ehci(hcd
);
639 next
= buf
->output_buf
;
640 size
= buf
->alloc_size
;
642 temp
= scnprintf(next
, size
, "size = %d\n", ehci
->periodic_size
);
647 * dump a snapshot of the periodic schedule.
648 * iso changes, interrupt usually doesn't.
650 spin_lock_irqsave(&ehci
->lock
, flags
);
651 for (i
= 0; i
< ehci
->periodic_size
; i
++) {
652 p
= ehci
->pshadow
[i
];
655 tag
= Q_NEXT_TYPE(ehci
, ehci
->periodic
[i
]);
657 temp
= scnprintf(next
, size
, "%4d: ", i
);
662 struct ehci_qh_hw
*hw
;
664 switch (hc32_to_cpu(ehci
, tag
)) {
667 temp
= scnprintf(next
, size
, " qh%d-%04x/%p",
672 & (QH_CMASK
| QH_SMASK
),
676 /* don't repeat what follows this qh */
677 for (temp
= 0; temp
< seen_count
; temp
++) {
678 if (seen
[temp
].ptr
!= p
.ptr
)
680 if (p
.qh
->qh_next
.ptr
) {
681 temp
= scnprintf(next
, size
,
688 /* show more info the first time around */
689 if (temp
== seen_count
) {
690 temp
= output_buf_tds_dir(next
, ehci
,
693 if (seen_count
< DBG_SCHED_LIMIT
)
694 seen
[seen_count
++].qh
= p
.qh
;
698 tag
= Q_NEXT_TYPE(ehci
, hw
->hw_next
);
702 temp
= scnprintf(next
, size
,
703 " fstn-%8x/%p", p
.fstn
->hw_prev
,
705 tag
= Q_NEXT_TYPE(ehci
, p
.fstn
->hw_next
);
706 p
= p
.fstn
->fstn_next
;
709 temp
= scnprintf(next
, size
,
711 tag
= Q_NEXT_TYPE(ehci
, p
.itd
->hw_next
);
715 temp
= scnprintf(next
, size
,
717 p
.sitd
->stream
->ps
.period
,
718 hc32_to_cpup(ehci
, &p
.sitd
->hw_uframe
)
721 tag
= Q_NEXT_TYPE(ehci
, p
.sitd
->hw_next
);
722 p
= p
.sitd
->sitd_next
;
729 temp
= scnprintf(next
, size
, "\n");
733 spin_unlock_irqrestore(&ehci
->lock
, flags
);
736 return buf
->alloc_size
- size
;
738 #undef DBG_SCHED_LIMIT
740 static const char *rh_state_string(struct ehci_hcd
*ehci
)
742 switch (ehci
->rh_state
) {
745 case EHCI_RH_SUSPENDED
:
747 case EHCI_RH_RUNNING
:
749 case EHCI_RH_STOPPING
:
755 static ssize_t
fill_registers_buffer(struct debug_buffer
*buf
)
758 struct ehci_hcd
*ehci
;
760 unsigned temp
, size
, i
;
761 char *next
, scratch
[80];
762 static char fmt
[] = "%*s\n";
763 static char label
[] = "";
765 hcd
= bus_to_hcd(buf
->bus
);
766 ehci
= hcd_to_ehci(hcd
);
767 next
= buf
->output_buf
;
768 size
= buf
->alloc_size
;
770 spin_lock_irqsave(&ehci
->lock
, flags
);
772 if (!HCD_HW_ACCESSIBLE(hcd
)) {
773 size
= scnprintf(next
, size
,
774 "bus %s, device %s\n"
776 "SUSPENDED (no register access)\n",
777 hcd
->self
.controller
->bus
->name
,
778 dev_name(hcd
->self
.controller
),
783 /* Capability Registers */
784 i
= HC_VERSION(ehci
, ehci_readl(ehci
, &ehci
->caps
->hc_capbase
));
785 temp
= scnprintf(next
, size
,
786 "bus %s, device %s\n"
788 "EHCI %x.%02x, rh state %s\n",
789 hcd
->self
.controller
->bus
->name
,
790 dev_name(hcd
->self
.controller
),
792 i
>> 8, i
& 0x0ff, rh_state_string(ehci
));
796 #ifdef CONFIG_USB_PCI
797 /* EHCI 0.96 and later may have "extended capabilities" */
798 if (dev_is_pci(hcd
->self
.controller
)) {
799 struct pci_dev
*pdev
;
800 u32 offset
, cap
, cap2
;
801 unsigned count
= 256 / 4;
803 pdev
= to_pci_dev(ehci_to_hcd(ehci
)->self
.controller
);
804 offset
= HCC_EXT_CAPS(ehci_readl(ehci
,
805 &ehci
->caps
->hcc_params
));
806 while (offset
&& count
--) {
807 pci_read_config_dword(pdev
, offset
, &cap
);
808 switch (cap
& 0xff) {
810 temp
= scnprintf(next
, size
,
811 "ownership %08x%s%s\n", cap
,
812 (cap
& (1 << 24)) ? " linux" : "",
813 (cap
& (1 << 16)) ? " firmware" : "");
818 pci_read_config_dword(pdev
, offset
, &cap2
);
819 temp
= scnprintf(next
, size
,
820 "SMI sts/enable 0x%08x\n", cap2
);
824 case 0: /* illegal reserved capability */
827 default: /* unknown */
830 offset
= (cap
>> 8) & 0xff;
835 /* FIXME interpret both types of params */
836 i
= ehci_readl(ehci
, &ehci
->caps
->hcs_params
);
837 temp
= scnprintf(next
, size
, "structural params 0x%08x\n", i
);
841 i
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
842 temp
= scnprintf(next
, size
, "capability params 0x%08x\n", i
);
846 /* Operational Registers */
847 temp
= dbg_status_buf(scratch
, sizeof(scratch
), label
,
848 ehci_readl(ehci
, &ehci
->regs
->status
));
849 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
853 temp
= dbg_command_buf(scratch
, sizeof(scratch
), label
,
854 ehci_readl(ehci
, &ehci
->regs
->command
));
855 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
859 temp
= dbg_intr_buf(scratch
, sizeof(scratch
), label
,
860 ehci_readl(ehci
, &ehci
->regs
->intr_enable
));
861 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
865 temp
= scnprintf(next
, size
, "uframe %04x\n",
866 ehci_read_frame_index(ehci
));
870 for (i
= 1; i
<= HCS_N_PORTS(ehci
->hcs_params
); i
++) {
871 temp
= dbg_port_buf(scratch
, sizeof(scratch
), label
, i
,
873 &ehci
->regs
->port_status
[i
- 1]));
874 temp
= scnprintf(next
, size
, fmt
, temp
, scratch
);
877 if (i
== HCS_DEBUG_PORT(ehci
->hcs_params
) && ehci
->debug
) {
878 temp
= scnprintf(next
, size
,
879 " debug control %08x\n",
881 &ehci
->debug
->control
));
887 if (!list_empty(&ehci
->async_unlink
)) {
888 temp
= scnprintf(next
, size
, "async unlink qh %p\n",
889 list_first_entry(&ehci
->async_unlink
,
890 struct ehci_qh
, unlink_node
));
896 temp
= scnprintf(next
, size
,
897 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
898 ehci
->stats
.normal
, ehci
->stats
.error
, ehci
->stats
.iaa
,
899 ehci
->stats
.lost_iaa
);
903 temp
= scnprintf(next
, size
, "complete %ld unlink %ld\n",
904 ehci
->stats
.complete
, ehci
->stats
.unlink
);
910 spin_unlock_irqrestore(&ehci
->lock
, flags
);
912 return buf
->alloc_size
- size
;
915 static struct debug_buffer
*alloc_buffer(struct usb_bus
*bus
,
916 ssize_t (*fill_func
)(struct debug_buffer
*))
918 struct debug_buffer
*buf
;
920 buf
= kzalloc(sizeof(*buf
), GFP_KERNEL
);
924 buf
->fill_func
= fill_func
;
925 mutex_init(&buf
->mutex
);
926 buf
->alloc_size
= PAGE_SIZE
;
932 static int fill_buffer(struct debug_buffer
*buf
)
936 if (!buf
->output_buf
)
937 buf
->output_buf
= vmalloc(buf
->alloc_size
);
939 if (!buf
->output_buf
) {
944 ret
= buf
->fill_func(buf
);
955 static ssize_t
debug_output(struct file
*file
, char __user
*user_buf
,
956 size_t len
, loff_t
*offset
)
958 struct debug_buffer
*buf
= file
->private_data
;
961 mutex_lock(&buf
->mutex
);
962 if (buf
->count
== 0) {
963 ret
= fill_buffer(buf
);
965 mutex_unlock(&buf
->mutex
);
969 mutex_unlock(&buf
->mutex
);
971 ret
= simple_read_from_buffer(user_buf
, len
, offset
,
972 buf
->output_buf
, buf
->count
);
978 static int debug_close(struct inode
*inode
, struct file
*file
)
980 struct debug_buffer
*buf
= file
->private_data
;
983 vfree(buf
->output_buf
);
990 static int debug_async_open(struct inode
*inode
, struct file
*file
)
992 file
->private_data
= alloc_buffer(inode
->i_private
, fill_async_buffer
);
994 return file
->private_data
? 0 : -ENOMEM
;
997 static int debug_bandwidth_open(struct inode
*inode
, struct file
*file
)
999 file
->private_data
= alloc_buffer(inode
->i_private
,
1000 fill_bandwidth_buffer
);
1002 return file
->private_data
? 0 : -ENOMEM
;
1005 static int debug_periodic_open(struct inode
*inode
, struct file
*file
)
1007 struct debug_buffer
*buf
;
1009 buf
= alloc_buffer(inode
->i_private
, fill_periodic_buffer
);
1013 buf
->alloc_size
= (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE
;
1014 file
->private_data
= buf
;
1018 static int debug_registers_open(struct inode
*inode
, struct file
*file
)
1020 file
->private_data
= alloc_buffer(inode
->i_private
,
1021 fill_registers_buffer
);
1023 return file
->private_data
? 0 : -ENOMEM
;
1026 static inline void create_debug_files(struct ehci_hcd
*ehci
)
1028 struct usb_bus
*bus
= &ehci_to_hcd(ehci
)->self
;
1030 ehci
->debug_dir
= debugfs_create_dir(bus
->bus_name
, ehci_debug_root
);
1032 debugfs_create_file("async", S_IRUGO
, ehci
->debug_dir
, bus
,
1034 debugfs_create_file("bandwidth", S_IRUGO
, ehci
->debug_dir
, bus
,
1035 &debug_bandwidth_fops
);
1036 debugfs_create_file("periodic", S_IRUGO
, ehci
->debug_dir
, bus
,
1037 &debug_periodic_fops
);
1038 debugfs_create_file("registers", S_IRUGO
, ehci
->debug_dir
, bus
,
1039 &debug_registers_fops
);
1042 static inline void remove_debug_files(struct ehci_hcd
*ehci
)
1044 debugfs_remove_recursive(ehci
->debug_dir
);
1047 #else /* CONFIG_DYNAMIC_DEBUG */
1049 static inline void dbg_hcs_params(struct ehci_hcd
*ehci
, char *label
) { }
1050 static inline void dbg_hcc_params(struct ehci_hcd
*ehci
, char *label
) { }
1052 static inline void __maybe_unused
dbg_qh(const char *label
,
1053 struct ehci_hcd
*ehci
, struct ehci_qh
*qh
) { }
1055 static inline int __maybe_unused
dbg_status_buf(const char *buf
,
1056 unsigned int len
, const char *label
, u32 status
)
1059 static inline int __maybe_unused
dbg_command_buf(const char *buf
,
1060 unsigned int len
, const char *label
, u32 command
)
1063 static inline int __maybe_unused
dbg_intr_buf(const char *buf
,
1064 unsigned int len
, const char *label
, u32 enable
)
1067 static inline int __maybe_unused
dbg_port_buf(char *buf
,
1068 unsigned int len
, const char *label
, int port
, u32 status
)
1071 static inline void dbg_status(struct ehci_hcd
*ehci
, const char *label
,
1073 static inline void dbg_cmd(struct ehci_hcd
*ehci
, const char *label
,
1075 static inline void dbg_port(struct ehci_hcd
*ehci
, const char *label
,
1076 int port
, u32 status
) { }
1078 static inline void create_debug_files(struct ehci_hcd
*bus
) { }
1079 static inline void remove_debug_files(struct ehci_hcd
*bus
) { }
1081 #endif /* CONFIG_DYNAMIC_DEBUG */