| blob | e64eb47770c8bb0f2b2c89d4abf9d6e3abf85140 |
1 // SPDX-License-Identifier: GPL-2.0+
2 /* Faraday FOTG210 EHCI-like driver
3 *
4 * Copyright (c) 2013 Faraday Technology Corporation
5 *
6 * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
7 * Feng-Hsin Chiang <john453@faraday-tech.com>
8 * Po-Yu Chuang <ratbert.chuang@gmail.com>
9 *
10 * Most of code borrowed from the Linux-3.7 EHCI driver
11 */
12 #include <linux/module.h>
13 #include <linux/device.h>
14 #include <linux/dmapool.h>
15 #include <linux/kernel.h>
16 #include <linux/delay.h>
17 #include <linux/ioport.h>
18 #include <linux/sched.h>
19 #include <linux/vmalloc.h>
20 #include <linux/errno.h>
21 #include <linux/init.h>
22 #include <linux/hrtimer.h>
23 #include <linux/list.h>
24 #include <linux/interrupt.h>
25 #include <linux/usb.h>
26 #include <linux/usb/hcd.h>
27 #include <linux/moduleparam.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/debugfs.h>
30 #include <linux/slab.h>
31 #include <linux/uaccess.h>
32 #include <linux/platform_device.h>
33 #include <linux/io.h>
35 #include <asm/byteorder.h>
36 #include <asm/irq.h>
37 #include <asm/unaligned.h>
43 #undef FOTG210_URB_TRACE
44 #define FOTG210_STATS
46 /* magic numbers that can affect system performance */
49 #define FOTG210_TUNE_RL_TT 0
51 #define FOTG210_TUNE_MULT_TT 1
53 /* Some drivers think it's safe to schedule isochronous transfers more than 256
54 * ms into the future (partly as a result of an old bug in the scheduling
55 * code). In an attempt to avoid trouble, we will use a minimum scheduling
56 * length of 512 frames instead of 256.
57 */
60 /* Initial IRQ latency: faster than hw default */
65 /* initial park setting: slower than hw default */
70 /* for link power management(LPM) feature */
75 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
79 #define fotg210_dbg(fotg210, fmt, args...) \
80 dev_dbg(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
81 #define fotg210_err(fotg210, fmt, args...) \
82 dev_err(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
83 #define fotg210_info(fotg210, fmt, args...) \
84 dev_info(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
85 #define fotg210_warn(fotg210, fmt, args...) \
86 dev_warn(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
88 /* check the values in the HCSPARAMS register (host controller _Structural_
89 * parameters) see EHCI spec, Table 2-4 for each value
90 */
92 {
97 }
99 /* check the values in the HCCPARAMS register (host controller _Capability_
100 * parameters) see EHCI Spec, Table 2-5 for each value
101 */
103 {
107 params,
110 }
112 static void __maybe_unused
114 {
126 }
128 static void __maybe_unused
130 {
138 }
140 static void __maybe_unused
142 {
172 }
174 static int __maybe_unused
176 {
189 }
191 static int __maybe_unused
193 {
202 }
207 u32 command)
208 {
221 }
224 u32 status)
225 {
228 /* signaling state */
242 }
247 sig,
257 }
259 /* functions have the "wrong" filename when they're output... */
260 #define dbg_status(fotg210, label, status) { \
261 char _buf[80]; \
262 dbg_status_buf(_buf, sizeof(_buf), label, status); \
264 }
266 #define dbg_cmd(fotg210, label, command) { \
267 char _buf[80]; \
268 dbg_command_buf(_buf, sizeof(_buf), label, command); \
270 }
272 #define dbg_port(fotg210, label, port, status) { \
273 char _buf[80]; \
275 dbg_port_buf(_buf, sizeof(_buf), label, port, status));\
276 }
278 /* troubleshooting help: expose state in debugfs */
293 };
300 };
307 };
318 };
321 {
334 }
335 }
338 {
347 /* tries to advance through hw_alt_next */
349 }
353 {
354 u32 scratch;
355 u32 hw_curr;
366 else
374 /* else alt_next points to some other qtd */
375 }
391 /* hc may be modifying the list as we read it ... */
404 }
423 scratch,
431 }
440 done:
443 }
446 {
461 /* dumps a snapshot of the async schedule.
462 * usually empty except for long-term bulk reads, or head.
463 * one QH per line, and TDs we know about
464 */
477 }
481 }
483 /* count tds, get ep direction */
486 {
492 /* count tds, get ep direction */
494 temp++;
502 }
503 }
509 }
511 #define DBG_SCHED_LIMIT 64
513 {
521 __hc32 tag;
538 /* dump a snapshot of the periodic schedule.
539 * iso changes, interrupt usually doesn't.
540 */
563 /* uframe masks */
568 /* don't repeat what follows this qh */
577 }
579 }
580 /* show more info the first time around */
606 }
614 }
619 }
620 #undef DBG_SCHED_LIMIT
623 {
633 }
635 }
638 {
663 }
665 /* Capability Registers */
679 /* FIXME interpret both types of params */
690 /* Operational Registers */
719 }
721 #ifdef FOTG210_STATS
733 #endif
735 done:
739 }
741 static struct debug_buffer
743 {
753 }
756 }
759 {
768 }
775 }
777 out:
779 }
783 {
793 }
794 }
800 out:
803 }
806 {
812 }
815 }
817 {
821 }
824 {
834 }
837 {
839 fill_registers_buffer);
842 }
845 {
857 }
860 {
862 }
864 /* handshake - spin reading hc until handshake completes or fails
865 * @ptr: address of hc register to be read
866 * @mask: bits to look at in result of read
867 * @done: value of those bits when handshake succeeds
868 * @usec: timeout in microseconds
869 *
870 * Returns negative errno, or zero on success
871 *
872 * Success happens when the "mask" bits have the specified value (hardware
873 * handshake done). There are two failure modes: "usec" have passed (major
874 * hardware flakeout), or the register reads as all-ones (hardware removed).
875 *
876 * That last failure should_only happen in cases like physical cardbus eject
877 * before driver shutdown. But it also seems to be caused by bugs in cardbus
878 * bridge shutdown: shutting down the bridge before the devices using it.
879 */
882 {
883 u32 result;
893 usec--;
896 }
898 /* Force HC to halt state from unknown (EHCI spec section 2.3).
899 * Must be called with interrupts enabled and the lock not held.
900 */
902 {
903 u32 temp;
907 /* disable any irqs left enabled by previous code */
910 /*
911 * This routine gets called during probe before fotg210->command
912 * has been initialized, so we can't rely on its value.
913 */
924 }
926 /* Reset a non-running (STS_HALT == 1) controller.
927 * Must be called with interrupts enabled and the lock not held.
928 */
930 {
934 /* If the EHCI debug controller is active, special care must be
935 * taken before and after a host controller reset
936 */
957 }
959 /* Idle the controller (turn off the schedules).
960 * Must be called with interrupts enabled and the lock not held.
961 */
963 {
964 u32 temp;
969 /* wait for any schedule enables/disables to take effect */
974 /* then disable anything that's still active */
980 /* hardware can take 16 microframes to turn off ... */
983 }
992 /* Set a bit in the USBCMD register */
994 {
998 /* unblock posted write */
1000 }
1002 /* Clear a bit in the USBCMD register */
1004 {
1008 /* unblock posted write */
1010 }
1012 /* EHCI timer support... Now using hrtimers.
1013 *
1014 * Lots of different events are triggered from fotg210->hrtimer. Whenever
1015 * the timer routine runs, it checks each possible event; events that are
1016 * currently enabled and whose expiration time has passed get handled.
1017 * The set of enabled events is stored as a collection of bitflags in
1018 * fotg210->enabled_hrtimer_events, and they are numbered in order of
1019 * increasing delay values (ranging between 1 ms and 100 ms).
1020 *
1021 * Rather than implementing a sorted list or tree of all pending events,
1022 * we keep track only of the lowest-numbered pending event, in
1023 * fotg210->next_hrtimer_event. Whenever fotg210->hrtimer gets restarted, its
1024 * expiration time is set to the timeout value for this event.
1025 *
1026 * As a result, events might not get handled right away; the actual delay
1027 * could be anywhere up to twice the requested delay. This doesn't
1028 * matter, because none of the events are especially time-critical. The
1029 * ones that matter most all have a delay of 1 ms, so they will be
1030 * handled after 2 ms at most, which is okay. In addition to this, we
1031 * allow for an expiration range of 1 ms.
1032 */
1034 /* Delay lengths for the hrtimer event types.
1035 * Keep this list sorted by delay length, in the same order as
1036 * the event types indexed by enum fotg210_hrtimer_event in fotg210.h.
1037 */
1049 };
1051 /* Enable a pending hrtimer event */
1054 {
1061 /* Track only the lowest-numbered pending event */
1066 }
1067 }
1070 /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
1072 {
1075 /* Don't enable anything if the controller isn't running (e.g., died) */
1084 /* Poll again later, but give up after about 20 ms */
1089 }
1092 }
1095 /* The status is up-to-date; restart or stop the schedule as needed */
1103 /* Turn off the schedule after a while */
1105 FOTG210_HRTIMER_DISABLE_ASYNC,
1107 }
1108 }
1109 }
1111 /* Turn off the async schedule after a brief delay */
1113 {
1115 }
1118 /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
1120 {
1123 /* Don't do anything if the controller isn't running (e.g., died) */
1132 /* Poll again later, but give up after about 20 ms */
1137 }
1140 }
1143 /* The status is up-to-date; restart or stop the schedule as needed */
1151 /* Turn off the schedule after a while */
1153 FOTG210_HRTIMER_DISABLE_PERIODIC,
1155 }
1156 }
1157 }
1159 /* Turn off the periodic schedule after a brief delay */
1161 {
1163 }
1166 /* Poll the STS_HALT status bit; see when a dead controller stops */
1168 {
1171 /* Give up after a few milliseconds */
1173 /* Try again later */
1177 }
1179 }
1181 /* Clean up the mess */
1187 /* Not in process context, so don't try to reset the controller */
1188 }
1191 /* Handle unlinked interrupt QHs once they are gone from the hardware */
1193 {
1196 /*
1197 * Process all the QHs on the intr_unlink list that were added
1198 * before the current unlink cycle began. The list is in
1199 * temporal order, so stop when we reach the first entry in the
1200 * current cycle. But if the root hub isn't running then
1201 * process all the QHs on the list.
1202 */
1212 }
1214 /* Handle remaining entries later */
1219 }
1221 }
1224 /* Start another free-iTDs/siTDs cycle */
1226 {
1233 }
1234 }
1236 /* Wait for controller to stop using old iTDs and siTDs */
1238 {
1249 }
1253 }
1256 /* Handle lost (or very late) IAA interrupts */
1258 {
1262 /*
1263 * Lost IAA irqs wedge things badly; seen first with a vt8235.
1264 * So we need this watchdog, but must protect it against both
1265 * (a) SMP races against real IAA firing and retriggering, and
1266 * (b) clean HC shutdown, when IAA watchdog was pending.
1267 */
1271 /* If we get here, IAA is *REALLY* late. It's barely
1272 * conceivable that the system is so busy that CMD_IAAD
1273 * is still legitimately set, so let's be sure it's
1274 * clear before we read STS_IAA. (The HC should clear
1275 * CMD_IAAD when it sets STS_IAA.)
1276 */
1279 /*
1280 * If IAA is set here it either legitimately triggered
1281 * after the watchdog timer expired (_way_ late, so we'll
1282 * still count it as lost) ... or a silicon erratum:
1283 * - VIA seems to set IAA without triggering the IRQ;
1284 * - IAAD potentially cleared without setting IAA.
1285 */
1291 }
1296 }
1297 }
1300 /* Enable the I/O watchdog, if appropriate */
1302 {
1303 /* Not needed if the controller isn't running or it's already enabled */
1309 /*
1310 * Isochronous transfers always need the watchdog.
1311 * For other sorts we use it only if the flag is set.
1312 */
1317 }
1320 /* Handler functions for the hrtimer event types.
1321 * Keep this array in the same order as the event types indexed by
1322 * enum fotg210_hrtimer_event in fotg210.h.
1323 */
1335 };
1338 {
1341 ktime_t now;
1352 /*
1353 * Check each pending event. If its time has expired, handle
1354 * the event; otherwise re-enable it.
1355 */
1360 else
1362 }
1366 }
1368 #define fotg210_bus_suspend NULL
1369 #define fotg210_bus_resume NULL
1373 {
1377 /* if reset finished and it's still not enabled -- handoff */
1379 /* with integrated TT, there's nobody to hand it to! */
1382 else
1387 }
1390 /* build "status change" packet (one or two bytes) from HC registers */
1393 {
1396 u32 mask;
1400 /* init status to no-changes */
1403 /* Inform the core about resumes-in-progress by returning
1404 * a non-zero value even if there are no status changes.
1405 */
1409 /* PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND */
1411 /* no hub change reports (bit 0) for now (power, ...) */
1413 /* port N changes (bit N)? */
1418 /*
1419 * Return status information even for ports with OWNER set.
1420 * Otherwise hub_wq wouldn't see the disconnect event when a
1421 * high-speed device is switched over to the companion
1422 * controller by the user.
1423 */
1430 }
1431 /* FIXME autosuspend idle root hubs */
1434 }
1438 {
1440 u16 temp;
1450 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1457 }
1461 {
1470 /*
1471 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1472 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1473 * (track current state ourselves) ... blink for diagnostics,
1474 * power, "this is the one", etc. EHCI spec supports this.
1475 */
1483 /* no hub-wide feature/status flags */
1487 }
1492 wIndex--;
1496 /*
1497 * Even if OWNER is set, so the port is owned by the
1498 * companion controller, hub_wq needs to be able to clear
1499 * the port-change status bits (especially
1500 * USB_PORT_STAT_C_CONNECTION).
1501 */
1518 /* resume signaling for 20 msec */
1534 /* GetPortStatus clears reset */
1538 }
1543 buf);
1546 /* no hub-wide feature/status flags */
1548 /*cpu_to_le32s ((u32 *) buf); */
1553 wIndex--;
1557 /* wPortChange bits */
1567 /* whoever resumes must GetPortStatus to complete it!! */
1570 /* Remote Wakeup received? */
1572 /* resume signaling for 20 msec */
1575 /* check the port again */
1578 }
1580 /* resume completed? */
1587 /* stop resume signaling */
1591 status_reg);
1600 }
1602 }
1603 }
1605 /* whoever resets must GetPortStatus to complete it!! */
1612 /* force reset to complete */
1615 status_reg);
1616 /* REVISIT: some hardware needs 550+ usec to clear
1617 * this bit; seems too long to spin routinely...
1618 */
1625 }
1627 /* see what we found out */
1630 }
1635 }
1637 /* transfer dedicated ports to the companion hc */
1645 }
1647 /*
1648 * Even if OWNER is set, there's no harm letting hub_wq
1649 * see the wPortStatus values (they should all be 0 except
1650 * for PORT_POWER anyway).
1651 */
1656 }
1660 /* maybe the port was unsuspended without our knowledge */
1669 }
1687 /* no hub-wide feature/status flags */
1691 }
1699 wIndex--;
1708 /* After above check the port must be connected.
1709 * Set appropriate bit thus could put phy into low power
1710 * mode if we have hostpc feature
1711 */
1713 status_reg);
1719 /* line status bits may report this as low speed,
1720 * which can be fine if this root hub has a
1721 * transaction translator built in.
1722 */
1727 /*
1728 * caller must wait, then call GetPortStatus
1729 * usb 2.0 spec says 50 ms resets on root
1730 */
1736 /* For downstream facing ports (these): one hub port is put
1737 * into test mode according to USB2 11.24.2.13, then the hub
1738 * must be reset (which for root hub now means rmmod+modprobe,
1739 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
1740 * about the EHCI-specific stuff.
1741 */
1749 /* Put all enabled ports into suspend */
1754 status_reg);
1767 }
1772 error:
1773 /* "stall" on error */
1775 }
1778 }
1782 {
1784 }
1788 {
1790 }
1792 /* There's basically three types of memory:
1793 * - data used only by the HCD ... kmalloc is fine
1794 * - async and periodic schedules, shared by HC and HCD ... these
1795 * need to use dma_pool or dma_alloc_coherent
1796 * - driver buffers, read/written by HC ... single shot DMA mapped
1797 *
1798 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
1799 * No memory seen by this driver is pageable.
1800 */
1802 /* Allocate the key transfer structures from the previously allocated pool */
1805 {
1812 }
1815 gfp_t flags)
1816 {
1818 dma_addr_t dma;
1825 }
1829 {
1831 }
1835 {
1836 /* clean qtds first, and know this is not linked */
1840 }
1845 }
1848 gfp_t flags)
1849 {
1851 dma_addr_t dma;
1862 /* dummy td enables safe urb queuing */
1867 }
1868 done:
1870 fail1:
1872 fail:
1875 }
1877 /* The queue heads and transfer descriptors are managed from pools tied
1878 * to each of the "per device" structures.
1879 * This is the initialisation and cleanup code.
1880 */
1883 {
1892 /* DMA consistent memory and pools */
1908 /* shadow periodic table */
1911 }
1913 /* remember to add cleanup code (above) if you add anything here */
1915 {
1918 /* QTDs for control/bulk/intr transfers */
1927 /* QHs for control/bulk/intr transfers */
1940 /* ITD for high speed ISO transfers */
1949 /* Hardware periodic table */
1960 /* software shadow of hardware table */
1962 flags);
1966 fail:
1970 }
1971 /* EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
1972 *
1973 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
1974 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
1975 * buffers needed for the larger number). We use one QH per endpoint, queue
1976 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
1977 *
1978 * ISO traffic uses "ISO TD" (itd) records, and (along with
1979 * interrupts) needs careful scheduling. Performance improvements can be
1980 * an ongoing challenge. That's in "ehci-sched.c".
1981 *
1982 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
1983 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
1984 * (b) special fields in qh entries or (c) split iso entries. TTs will
1985 * buffer low/full speed data so the host collects it at high speed.
1986 */
1988 /* fill a qtd, returning how much of the buffer we were able to queue up */
1991 {
1995 /* one buffer entry per 4K ... first might be short or unaligned */
2005 /* per-qtd limit: from 16K to 20K (best alignment) */
2014 else
2016 }
2018 /* short packets may only terminate transfers */
2021 }
2026 }
2030 {
2033 /* writes to an active overlay are unsafe */
2039 /* Except for control endpoints, we make hardware maintain data
2040 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
2041 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
2042 * ever clear it.
2043 */
2052 }
2053 }
2056 }
2058 /* if it weren't for a common silicon quirk (writing the dummy into the qh
2059 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
2060 * recovery (including urb dequeue) would need software changes to a QH...
2061 */
2063 {
2071 /*
2072 * first qtd may already be partially processed.
2073 * If we come here during unlink, the QH overlay region
2074 * might have reference to the just unlinked qtd. The
2075 * qtd is updated in qh_completions(). Update the QH
2076 * overlay here.
2077 */
2081 }
2082 }
2086 }
2092 {
2103 }
2107 {
2109 /* If an async split transaction gets an error or is unlinked,
2110 * the TT buffer may be left in an indeterminate state. We
2111 * have to clear the TT buffer.
2112 *
2113 * Note: this routine is never called for Isochronous transfers.
2114 */
2127 }
2128 }
2129 }
2133 {
2136 /* count IN/OUT bytes, not SETUP (even short packets) */
2140 /* don't modify error codes */
2144 /* force cleanup after short read; not always an error */
2148 /* serious "can't proceed" faults reported by the hardware */
2151 /* FIXME "must" disable babbling device's port too */
2153 /* CERR nonzero + halt --> stall */
2157 /* In theory, more than one of the following bits can be set
2158 * since they are sticky and the transaction is retried.
2159 * Which to test first is rather arbitrary.
2160 */
2162 /* fs/ls interrupt xfer missed the complete-split */
2169 /* timeout, bad CRC, wrong PID, etc */
2177 }
2185 }
2188 }
2194 {
2198 /* S-mask in a QH means it's an interrupt urb */
2201 /* ... update hc-wide periodic stats (for usbfs) */
2203 }
2204 }
2209 /* report non-error and short read status as zero */
2213 }
2215 #ifdef FOTG210_URB_TRACE
2221 status,
2223 #endif
2225 /* complete() can reenter this HCD */
2230 }
2234 /* Process and free completed qtds for a qh, returning URBs to drivers.
2235 * Chases up to qh->hw_current. Returns number of completions called,
2236 * indicating how much "real" work we did.
2237 */
2240 {
2246 u8 state;
2252 /* completions (or tasks on other cpus) must never clobber HALT
2253 * till we've gone through and cleaned everything up, even when
2254 * they add urbs to this qh's queue or mark them for unlinking.
2255 *
2256 * NOTE: unlinking expects to be done in queue order.
2257 *
2258 * It's a bug for qh->qh_state to be anything other than
2259 * QH_STATE_IDLE, unless our caller is scan_async() or
2260 * scan_intr().
2261 */
2266 rescan:
2271 /* remove de-activated QTDs from front of queue.
2272 * after faults (including short reads), cleanup this urb
2273 * then let the queue advance.
2274 * if queue is stopped, handles unlinks.
2275 */
2282 /* clean up any state from previous QTD ...*/
2286 last_status);
2287 count++;
2289 }
2292 }
2294 /* ignore urbs submitted during completions we reported */
2298 /* hardware copies qtd out of qh overlay */
2302 /* always clean up qtds the hc de-activated */
2303 retry_xacterr:
2306 /* Report Data Buffer Error: non-fatal but useful */
2315 /* on STALL, error, and short reads this urb must
2316 * complete and all its qtds must be recycled.
2317 */
2320 /* retry transaction errors until we
2321 * reach the software xacterr limit
2322 */
2333 /* reset the token in the qtd and the
2334 * qh overlay (which still contains
2335 * the qtd) so that we pick up from
2336 * where we left off
2337 */
2342 token);
2345 token);
2347 }
2350 /* magic dummy for some short reads; qh won't advance.
2351 * that silicon quirk can kick in with this dummy too.
2352 *
2353 * other short reads won't stop the queue, including
2354 * control transfers (status stage handles that) or
2355 * most other single-qtd reads ... the queue stops if
2356 * URB_SHORT_NOT_OK was set so the driver submitting
2357 * the urbs could clean it up.
2358 */
2363 }
2365 /* stop scanning when we reach qtds the hc is using */
2370 /* scan the whole queue for unlinks whenever it stops */
2374 /* cancel everything if we halt, suspend, etc */
2378 /* this qtd is active; skip it unless a previous qtd
2379 * for its urb faulted, or its urb was canceled.
2380 */
2384 /* qh unlinked; token in overlay may be most current */
2390 /* An unlink may leave an incomplete
2391 * async transaction in the TT buffer.
2392 * We have to clear it.
2393 */
2395 token);
2396 }
2397 }
2399 /* unless we already know the urb's status, collect qtd status
2400 * and update count of bytes transferred. in common short read
2401 * cases with only one data qtd (including control transfers),
2402 * queue processing won't halt. but with two or more qtds (for
2403 * example, with a 32 KB transfer), when the first qtd gets a
2404 * short read the second must be removed by hand.
2405 */
2414 /* As part of low/full-speed endpoint-halt processing
2415 * we must clear the TT buffer (11.17.5).
2416 */
2419 /* The TT's in some hubs malfunction when they
2420 * receive this request following a STALL (they
2421 * stop sending isochronous packets). Since a
2422 * STALL can't leave the TT buffer in a busy
2423 * state (if you believe Figures 11-48 - 11-51
2424 * in the USB 2.0 spec), we won't clear the TT
2425 * buffer in this case. Strictly speaking this
2426 * is a violation of the spec.
2427 */
2431 }
2432 }
2434 /* if we're removing something not at the queue head,
2435 * patch the hardware queue pointer.
2436 */
2441 }
2443 /* remove qtd; it's recycled after possible urb completion */
2447 /* reinit the xacterr counter for the next qtd */
2449 }
2451 /* last urb's completion might still need calling */
2454 count++;
2456 }
2458 /* Do we need to rescan for URBs dequeued during a giveback? */
2460 /* If the QH is already unlinked, do the rescan now. */
2464 /* Otherwise we have to wait until the QH is fully unlinked.
2465 * Our caller will start an unlink if qh->needs_rescan is
2466 * set. But if an unlink has already started, nothing needs
2467 * to be done.
2468 */
2471 }
2473 /* restore original state; caller must unlink or relink */
2476 /* be sure the hardware's done with the qh before refreshing
2477 * it after fault cleanup, or recovering from silicon wrongly
2478 * overlaying the dummy qtd (which reduces DMA chatter).
2479 */
2486 /* We won't refresh a QH that's linked (after the HC
2487 * stopped the queue). That avoids a race:
2488 * - HC reads first part of QH;
2489 * - CPU updates that first part and the token;
2490 * - HC reads rest of that QH, including token
2491 * Result: HC gets an inconsistent image, and then
2492 * DMAs to/from the wrong memory (corrupting it).
2493 *
2494 * That should be rare for interrupt transfers,
2495 * except maybe high bandwidth ...
2496 */
2498 /* Tell the caller to start an unlink */
2501 /* otherwise, unlink already started */
2502 }
2503 }
2506 }
2508 /* high bandwidth multiplier, as encoded in highspeed endpoint descriptors */
2509 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
2510 /* ... and packet size, for any kind of endpoint descriptor */
2511 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
2513 /* reverse of qh_urb_transaction: free a list of TDs.
2514 * used for cleanup after errors, before HC sees an URB's TDs.
2515 */
2518 {
2524 }
2525 }
2527 /* create a list of filled qtds for this URB; won't link into qh.
2528 */
2531 {
2533 dma_addr_t buf;
2536 u32 token;
2540 /*
2541 * URBs map to sequences of QTDs: one logical transaction
2542 */
2551 /* for split transactions, SplitXState initialized to zero */
2556 /* SETUP pid */
2561 /* ... and always at least one more pid */
2571 /* for zero length DATA stages, STATUS is always IN */
2574 }
2576 /*
2577 * data transfer stage: buffer setup
2578 */
2584 /* urb->transfer_buffer_length may be smaller than the
2585 * size of the scatterlist (or vice versa)
2586 */
2592 }
2596 /* else it's already initted to "out" pid (0 << 8) */
2600 /*
2601 * buffer gets wrapped in one or more qtds;
2602 * last one may be "short" (including zero len)
2603 * and may serve as a control status ack
2604 */
2609 maxpacket);
2614 /*
2615 * short reads advance to a "magic" dummy instead of the next
2616 * qtd ... that forces the queue to stop, for manual cleanup.
2617 * (this will usually be overridden later.)
2618 */
2622 /* qh makes control packets use qtd toggle; maybe switch it */
2632 }
2641 }
2643 /*
2644 * unless the caller requires manual cleanup after short reads,
2645 * have the alt_next mechanism keep the queue running after the
2646 * last data qtd (the only one, for control and most other cases).
2647 */
2652 /*
2653 * control requests may need a terminating data "status" ack;
2654 * other OUT ones may need a terminating short packet
2655 * (zero length).
2656 */
2668 }
2678 /* never any data in such packets */
2680 }
2681 }
2683 /* by default, enable interrupt on urb completion */
2688 cleanup:
2691 }
2693 /* Would be best to create all qh's from config descriptors,
2694 * when each interface/altsetting is established. Unlink
2695 * any previous qh and cancel its urbs first; endpoints are
2696 * implicitly reset then (data toggle too).
2697 * That'd mean updating how usbcore talks to HCDs. (2.7?)
2698 */
2701 /* Each QH holds a qtd list; a QH is used for everything except iso.
2702 *
2703 * For interrupt urbs, the scheduler must set the microframe scheduling
2704 * mask(s) each time the QH gets scheduled. For highspeed, that's
2705 * just one microframe in the s-mask. For split interrupt transactions
2706 * there are additional complications: c-mask, maybe FSTNs.
2707 */
2709 gfp_t flags)
2710 {
2721 /*
2722 * init endpoint/device data for this QH
2723 */
2731 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
2732 * acts like up to 3KB, but is built from smaller packets.
2733 */
2738 }
2740 /* Compute interrupt scheduling parameters just once, and save.
2741 * - allowing for high bandwidth, how many nsec/uframe are used?
2742 * - split transactions need a second CSPLIT uframe; same question
2743 * - splits also need a schedule gap (for full/low speed I/O)
2744 * - qh has a polling interval
2745 *
2746 * For control/bulk requests, the HC or TT handles these.
2747 */
2760 /* NOTE interval 2 or 4 uframes could work.
2761 * But interval 1 scheduling is simpler, and
2762 * includes high bandwidth.
2763 */
2768 }
2772 /* gap is f(FS/LS transfer times) */
2776 /* FIXME this just approximates SPLIT/CSPLIT times */
2783 }
2793 }
2794 }
2795 }
2797 /* support for tt scheduling, and access to toggles */
2800 /* using TT? */
2804 /* FALL THROUGH */
2807 /* EPS 0 means "full" */
2813 }
2818 /* Some Freescale processors have an erratum in which the
2819 * port number in the queue head was 0..N-1 instead of 1..N.
2820 */
2823 else
2826 /* set the address of the TT; for TDI's integrated
2827 * root hub tt, leave it zeroed.
2828 */
2832 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
2845 /* The USB spec says that high speed bulk endpoints
2846 * always use 512 byte maxpacket. But some device
2847 * vendors decided to ignore that, and MSFT is happy
2848 * to help them do so. So now people expect to use
2849 * such nonconformant devices with Linux too; sigh.
2850 */
2856 }
2861 done:
2864 }
2866 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
2868 /* init as live, toggle clear, advance to dummy */
2877 }
2880 {
2884 /* Stop waiting to turn off the async schedule */
2887 /* Don't start the schedule until ASS is 0 */
2890 }
2893 {
2897 /* The async schedule and async_unlink list are supposed to be empty */
2900 /* Don't turn off the schedule until ASS is 1 */
2902 }
2904 /* move qh (and its qtds) onto async queue; maybe enable queue. */
2907 {
2911 /* Don't link a QH if there's a Clear-TT-Buffer pending */
2917 /* clear halt and/or toggle; and maybe recover from silicon quirk */
2920 /* splice right after start */
2931 /* qtd completions reported later by interrupt */
2934 }
2936 /* For control/bulk/interrupt, return QH with these TDs appended.
2937 * Allocates and initializes the QH if necessary.
2938 * Returns null if it can't allocate a QH it needs to.
2939 * If the QH has TDs (urbs) already, that's great.
2940 */
2944 {
2950 /* can't sleep here, we have fotg210->lock... */
2953 }
2959 else
2961 qtd_list);
2963 /* control qh may need patching ... */
2965 /* usb_reset_device() briefly reverts to address 0 */
2968 }
2970 /* just one way to queue requests: swap with the dummy qtd.
2971 * only hc or qh_refresh() ever modify the overlay.
2972 */
2975 dma_addr_t dma;
2976 __hc32 token;
2978 /* to avoid racing the HC, use the dummy td instead of
2979 * the first td of our list (becomes new dummy). both
2980 * tds stay deactivated until we're done, when the
2981 * HC is allowed to fetch the old dummy (4.10.2).
2982 */
2999 /* hc must see the new dummy at list end */
3005 /* let the hc process these next qtds */
3010 }
3011 }
3013 }
3017 {
3025 #ifdef FOTG210_URB_TRACE
3026 {
3037 }
3038 #endif
3044 }
3054 }
3056 /* Control/bulk operations through TTs don't need scheduling,
3057 * the HC and TT handle it when the TT has a buffer ready.
3058 */
3061 done:
3066 }
3070 {
3073 /* Add to the end of the list of QHs waiting for the next IAAD */
3077 else
3081 /* Unlink it from the schedule */
3090 }
3093 {
3094 /*
3095 * Do nothing if an IAA cycle is already running or
3096 * if one will be started shortly.
3097 */
3101 /* Do all the waiting QHs at once */
3105 /* If the controller isn't running, we don't have to wait for it */
3110 /* Otherwise start a new IAA cycle */
3112 /* Make sure the unlinks are all visible to the hardware */
3120 }
3121 }
3123 /* the async qh for the qtds being unlinked are now gone from the HC */
3126 {
3129 /* Process the idle QHs */
3130 restart:
3145 }
3148 /* Start a new IAA cycle if any QHs are waiting for it */
3153 }
3154 }
3157 {
3162 /* Unlink all the async QHs that have been empty for a timer cycle */
3173 else
3175 }
3176 }
3178 /* Start a new IAA cycle if any QHs are waiting for it */
3182 /* QHs that haven't been empty for long enough will be handled later */
3187 }
3188 }
3190 /* makes sure the async qh will become idle */
3191 /* caller must own fotg210->lock */
3195 {
3196 /*
3197 * If the QH isn't linked then there's nothing we can do
3198 * unless we were called during a giveback, in which case
3199 * qh_completions() has to deal with it.
3200 */
3205 }
3209 }
3212 {
3220 rescan:
3221 /* clean any finished work for this qh */
3225 /*
3226 * Unlinks could happen here; completion reporting
3227 * drops the lock. That's why fotg210->qh_scan_next
3228 * always holds the next qh to scan; if the next qh
3229 * gets unlinked then fotg210->qh_scan_next is adjusted
3230 * in single_unlink_async().
3231 */
3241 }
3242 }
3244 /*
3245 * Unlink empty entries, reducing DMA usage as well
3246 * as HCD schedule-scanning costs. Delay for any qh
3247 * we just scanned, there's a not-unusual case that it
3248 * doesn't stay idle for long.
3249 */
3256 }
3257 }
3258 /* EHCI scheduled transaction support: interrupt, iso, split iso
3259 * These are called "periodic" transactions in the EHCI spec.
3260 *
3261 * Note that for interrupt transfers, the QH/QTD manipulation is shared
3262 * with the "asynchronous" transaction support (control/bulk transfers).
3263 * The only real difference is in how interrupt transfers are scheduled.
3264 *
3265 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
3266 * It keeps track of every ITD (or SITD) that's linked, and holds enough
3267 * pre-calculated schedule data to make appending to the queue be quick.
3268 */
3271 /* periodic_next_shadow - return "next" pointer on shadow list
3272 * @periodic: host pointer to qh/itd
3273 * @tag: hardware tag for type of this record
3274 */
3277 {
3285 }
3286 }
3290 {
3292 /* our fotg210_shadow.qh is actually software part */
3295 /* others are hw parts */
3298 }
3299 }
3301 /* caller must hold fotg210->lock */
3304 {
3309 /* find predecessor of "ptr"; hw and shadow lists are in sync */
3316 }
3317 /* an interrupt entry (at list end) could have been shared */
3321 /* update shadow and hardware lists ... the old "next" pointers
3322 * from ptr may still be in use, the caller updates them.
3323 */
3329 }
3331 /* how many of the uframe's 125 usecs are allocated? */
3334 {
3344 /* is it in the S-mask? */
3347 /* ... or C-mask? */
3354 /* case Q_TYPE_FSTN: */
3356 /* for "save place" FSTNs, count the relevant INTR
3357 * bandwidth from the previous frame
3358 */
3371 }
3372 }
3377 }
3380 {
3387 else
3389 }
3391 /* return true iff the device's transaction translator is available
3392 * for a periodic transfer starting at the specified frame, using
3393 * all the uframes in the mask.
3394 */
3397 {
3401 /* note bandwidth wastage: split never follows csplit
3402 * (different dev or endpoint) until the next uframe.
3403 * calling convention doesn't make that distinction.
3404 */
3407 __hc32 type;
3421 u32 mask;
3425 /* "knows" no gap is needed */
3429 }
3433 /* case Q_TYPE_FSTN: */
3438 }
3440 /* collision or error */
3442 }
3443 }
3445 /* no collision */
3447 }
3450 {
3454 /* Stop waiting to turn off the periodic schedule */
3458 /* Don't start the schedule until PSS is 0 */
3461 }
3464 {
3468 /* Don't turn off the schedule until PSS is 1 */
3470 }
3472 /* periodic schedule slots have iso tds (normal or split) first, then a
3473 * sparse tree for active interrupt transfers.
3474 *
3475 * this just links in a qh; caller guarantees uframe masks are set right.
3476 * no FSTN support (yet; fotg210 0.96+)
3477 */
3479 {
3489 /* high bandwidth, or otherwise every microframe */
3499 /* skip the iso nodes at list head */
3507 }
3509 /* sorting each branch by period (slow-->fast)
3510 * enables sharing interior tree nodes
3511 */
3518 }
3519 /* link in this qh, unless some earlier pass did that */
3527 }
3528 }
3532 /* update per-qh bandwidth for usbfs */
3539 /* maybe enable periodic schedule processing */
3542 }
3546 {
3550 /*
3551 * If qh is for a low/full-speed device, simply unlinking it
3552 * could interfere with an ongoing split transaction. To unlink
3553 * it safely would require setting the QH_INACTIVATE bit and
3554 * waiting at least one frame, as described in EHCI 4.12.2.5.
3555 *
3556 * We won't bother with any of this. Instead, we assume that the
3557 * only reason for unlinking an interrupt QH while the current URB
3558 * is still active is to dequeue all the URBs (flush the whole
3559 * endpoint queue).
3560 *
3561 * If rebalancing the periodic schedule is ever implemented, this
3562 * approach will no longer be valid.
3563 */
3565 /* high bandwidth, or otherwise part of every microframe */
3573 /* update per-qh bandwidth for usbfs */
3584 /* qh->qh_next still "live" to HC */
3592 }
3596 {
3597 /* If the QH isn't linked then there's nothing we can do
3598 * unless we were called during a giveback, in which case
3599 * qh_completions() has to deal with it.
3600 */
3605 }
3609 /* Make sure the unlinks are visible before starting the timer */
3612 /*
3613 * The EHCI spec doesn't say how long it takes the controller to
3614 * stop accessing an unlinked interrupt QH. The timer delay is
3615 * 9 uframes; presumably that will be long enough.
3616 */
3619 /* New entries go at the end of the intr_unlink list */
3622 else
3634 }
3635 }
3638 {
3647 /* reschedule QH iff another request is queued */
3652 /* An error here likely indicates handshake failure
3653 * or no space left in the schedule. Neither fault
3654 * should happen often ...
3655 *
3656 * FIXME kill the now-dysfunctional queued urbs
3657 */
3661 }
3663 /* maybe turn off periodic schedule */
3666 }
3670 {
3673 /* complete split running into next frame?
3674 * given FSTN support, we could sometimes check...
3675 */
3679 /* convert "usecs we need" to "max already claimed" */
3682 /* we "know" 2 and 4 uframe intervals were rejected; so
3683 * for period 0, check _every_ microframe in the schedule.
3684 */
3689 uframe);
3692 }
3695 /* just check the specified uframe, at that period */
3702 }
3704 /* success! */
3706 }
3710 {
3723 }
3725 /* Make sure this tt's buffer is also available for CSPLITs.
3726 * We pessimize a bit; probably the typical full speed case
3727 * doesn't need the second CSPLIT.
3728 *
3729 * NOTE: both SPLIT and CSPLIT could be checked in just
3730 * one smart pass...
3731 */
3744 }
3745 done:
3747 }
3749 /* "first fit" scheduling policy used the first time through,
3750 * or when the previous schedule slot can't be re-used.
3751 */
3753 {
3756 __hc32 c_mask;
3764 /* reuse the previous schedule slots, if we can */
3773 }
3775 /* else scan the schedule to find a group of slots such that all
3776 * uframes have enough periodic bandwidth available.
3777 */
3779 /* "normal" case, uframing flexible except with splits */
3791 }
3792 }
3794 /* qh->period == 0 means every uframe */
3799 }
3804 /* reset S-frame and (maybe) C-frame masks */
3813 /* stuff into the periodic schedule */
3815 done:
3817 }
3821 {
3828 /* get endpoint and transfer/schedule data */
3836 }
3841 /* get qh and force any scheduling errors */
3847 }
3852 }
3854 /* then queue the urb's tds to the qh */
3858 /* ... update usbfs periodic stats */
3861 done:
3864 done_not_linked:
3870 }
3873 {
3878 rescan:
3879 /* clean any finished work for this qh */
3883 /*
3884 * Unlinks could happen here; completion reporting
3885 * drops the lock. That's why fotg210->qh_scan_next
3886 * always holds the next qh to scan; if the next qh
3887 * gets unlinked then fotg210->qh_scan_next is adjusted
3888 * in qh_unlink_periodic().
3889 */
3897 }
3898 }
3899 }
3901 /* fotg210_iso_stream ops work with both ITD and SITD */
3904 {
3912 }
3914 }
3919 {
3920 u32 buf1;
3926 /*
3927 * this might be a "high bandwidth" highspeed endpoint,
3928 * as encoded in the ep descriptor's wMaxPacket field
3929 */
3935 else
3947 /* usbfs wants to report the average usecs per frame tied up
3948 * when transfers on this endpoint are scheduled ...
3949 */
3958 }
3967 }
3971 {
3980 else
3993 }
3995 /* if dev->ep[epnum] is a QH, hw is set */
4001 }
4005 }
4007 /* fotg210_iso_sched ops can be ITD-only or SITD-only */
4010 gfp_t mem_flags)
4011 {
4021 }
4026 {
4030 /* how many uframes are needed for these transfers */
4033 /* figure out per-uframe itd fields that we'll need later
4034 * when we fit new itds into the schedule.
4035 */
4039 dma_addr_t buf;
4040 u32 trans;
4053 /* might need to cross a buffer page within a uframe */
4058 }
4059 }
4063 {
4066 /* caller must hold fotg210->lock!*/
4069 }
4073 {
4075 dma_addr_t itd_dma;
4089 else
4092 /* allocate/init ITDs */
4096 /*
4097 * Use iTDs from the free list, but not iTDs that may
4098 * still be in use by the hardware.
4099 */
4108 alloc_itd:
4117 }
4118 }
4122 }
4125 /* temporarily store schedule info in hcpriv */
4129 }
4133 {
4136 /* can't commit more than uframe_periodic_max usec */
4141 /* we know urb->interval is 2^N uframes */
4145 }
4147 /* This scheduler plans almost as far into the future as it has actual
4148 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
4149 * "as small as possible" to be cache-friendlier.) That limits the size
4150 * transfers you can stream reliably; avoid more than 64 msec per urb.
4151 * Also avoid queue depths of less than fotg210's worst irq latency (affected
4152 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
4153 * and other factors); or more than about 230 msec total (for portability,
4154 * given FOTG210_TUNE_FLS and the slop). Or, write a smarter scheduler!
4155 */
4161 {
4174 }
4178 /* Typical case: reuse current schedule, stream is still active.
4179 * Hopefully there are no gaps from the host falling behind
4180 * (irq delays etc), but if there are we'll take the next
4181 * slot in the schedule, implicitly assuming URB_ISO_ASAP.
4182 */
4184 u32 excess;
4186 /* For high speed devices, allow scheduling within the
4187 * isochronous scheduling threshold. For full speed devices
4188 * and Intel PCI-based controllers, don't (work around for
4189 * Intel ICH9 bug).
4190 */
4193 else
4196 /* Fell behind (by up to twice the slop amount)?
4197 * We decide based on the time of the last currently-scheduled
4198 * slot, not the time of the next available slot.
4199 */
4204 else
4209 mod);
4212 }
4213 }
4215 /* need to schedule; when's the next (u)frame we could start?
4216 * this is bigger than fotg210->i_thresh allows; scheduling itself
4217 * isn't free, the slop should handle reasonably slow cpus. it
4218 * can also help high bandwidth if the dma and irq loads don't
4219 * jump until after the queue is primed.
4220 */
4226 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
4228 /* find a uframe slot with enough bandwidth.
4229 * Early uframes are more precious because full-speed
4230 * iso IN transfers can't use late uframes,
4231 * and therefore they should be allocated last.
4232 */
4236 start--;
4237 /* check schedule: enough space? */
4243 /* no room in the schedule */
4249 }
4250 }
4252 /* Tried to schedule too far into the future? */
4260 }
4264 /* report high speed start in uframes; full speed, in frames */
4269 /* Make sure scan_isoc() sees these */
4274 fail:
4278 }
4282 {
4285 /* it's been recently zeroed */
4294 /* All other fields are filled when scheduling */
4295 }
4300 {
4312 /* iso_frame_desc[].offset must be strictly increasing */
4319 }
4320 }
4324 {
4330 /* skip any iso nodes which might belong to previous microframes */
4338 }
4346 }
4348 /* fit urb's itds into the selected schedule slot; activate as needed */
4351 {
4368 }
4370 /* fill iTDs uframe by uframe */
4373 /* ASSERT: we have all necessary itds */
4375 /* ASSERT: no itds for this endpoint in this uframe */
4383 }
4392 packet++;
4394 /* link completed itds into the schedule */
4398 itd);
4400 }
4401 }
4404 /* don't need that schedule data any more */
4410 }
4412 #define ISO_ERRS (FOTG210_ISOC_BUF_ERR | FOTG210_ISOC_BABBLE |\
4413 FOTG210_ISOC_XACTERR)
4415 /* Process and recycle a completed ITD. Return true iff its urb completed,
4416 * and hence its completion callback probably added things to the hardware
4417 * schedule.
4418 *
4419 * Note that we carefully avoid recycling this descriptor until after any
4420 * completion callback runs, so that it won't be reused quickly. That is,
4421 * assuming (a) no more than two urbs per frame on this endpoint, and also
4422 * (b) only this endpoint's completions submit URBs. It seems some silicon
4423 * corrupts things if you reuse completed descriptors very quickly...
4424 */
4426 {
4429 u32 t;
4436 /* for each uframe with a packet */
4446 /* report transfer status */
4458 /* HC need not update length with this error */
4463 }
4469 /* URB was too late */
4471 }
4472 }
4474 /* handle completion now? */
4478 /* ASSERT: it's really the last itd for this urb
4479 * list_for_each_entry (itd, &stream->td_list, itd_list)
4480 * BUG_ON (itd->urb == urb);
4481 */
4483 /* give urb back to the driver; completion often (re)submits */
4499 }
4501 done:
4504 /* Add to the end of the free list for later reuse */
4507 /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
4512 }
4515 }
4518 gfp_t mem_flags)
4519 {
4524 /* Get iso_stream head */
4529 }
4532 USB_PORT_STAT_HIGH_SPEED)) {
4536 }
4538 #ifdef FOTG210_URB_TRACE
4546 stream);
4547 #endif
4549 /* allocate ITDs w/o locking anything */
4554 }
4556 /* schedule ... need to lock */
4561 }
4568 else
4570 done_not_linked:
4572 done:
4574 }
4578 {
4584 /* scan each element in frame's queue for completions */
4594 /* If this ITD is still active, leave it for
4595 * later processing ... check the next entry.
4596 * No need to check for activity unless the
4597 * frame is current.
4598 */
4605 }
4613 }
4614 }
4616 /* Take finished ITDs out of the schedule
4617 * and process them: recycle, maybe report
4618 * URB completion. HC won't cache the
4619 * pointer for much longer, if at all.
4620 */
4631 /* FALL THROUGH */
4634 /* End of the iTDs and siTDs */
4637 }
4639 /* assume completion callbacks modify the queue */
4642 }
4644 }
4647 {
4652 /*
4653 * When running, scan from last scan point up to "now"
4654 * else clean up by scanning everything that's left.
4655 * Touches as few pages as possible: cache-friendly.
4656 */
4664 }
4674 /* Stop when we have reached the current frame */
4678 }
4680 }
4682 /* Display / Set uframe_periodic_max
4683 */
4686 {
4693 }
4698 {
4704 ssize_t ret;
4712 uframe_periodic_max);
4714 }
4718 /*
4719 * lock, so that our checking does not race with possible periodic
4720 * bandwidth allocation through submitting new urbs.
4721 */
4724 /*
4725 * for request to decrease max periodic bandwidth, we have to check
4726 * every microframe in the schedule to see whether the decrease is
4727 * possible.
4728 */
4736 uframe));
4740 "cannot decrease uframe_periodic_max because periodic bandwidth is already allocated (%u > %u)\n",
4743 }
4744 }
4746 /* increasing is always ok */
4758 out_unlock:
4761 }
4766 {
4770 }
4773 {
4777 }
4778 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
4779 * The firmware seems to think that powering off is a wakeup event!
4780 * This routine turns off remote wakeup and everything else, on all ports.
4781 */
4783 {
4787 }
4789 /* Halt HC, turn off all ports, and let the BIOS use the companion controllers.
4790 * Must be called with interrupts enabled and the lock not held.
4791 */
4793 {
4800 }
4802 /* fotg210_shutdown kick in for silicon on any bus (not just pci, etc).
4803 * This forcibly disables dma and IRQs, helping kexec and other cases
4804 * where the next system software may expect clean state.
4805 */
4807 {
4819 }
4821 /* fotg210_work is called from some interrupts, timers, and so on.
4822 * it calls driver completion functions, after dropping fotg210->lock.
4823 */
4825 {
4826 /* another CPU may drop fotg210->lock during a schedule scan while
4827 * it reports urb completions. this flag guards against bogus
4828 * attempts at re-entrant schedule scanning.
4829 */
4833 }
4836 rescan:
4848 /* the IO watchdog guards against hardware or driver bugs that
4849 * misplace IRQs, and should let us run completely without IRQs.
4850 * such lossage has been observed on both VT6202 and VT8235.
4851 */
4853 }
4855 /* Called when the fotg210_hcd module is removed.
4856 */
4858 {
4863 /* no more interrupts ... */
4877 /* root hub is shut down separately (first, when possible) */
4883 #ifdef FOTG210_STATS
4889 #endif
4893 }
4895 /* one-time init, only for memory state */
4897 {
4899 u32 temp;
4901 u32 hcc_params;
4906 /*
4907 * keep io watchdog by default, those good HCDs could turn off it later
4908 */
4917 /*
4918 * by default set standard 80% (== 100 usec/uframe) max periodic
4919 * bandwidth as required by USB 2.0
4920 */
4923 /*
4924 * hw default: 1K periodic list heads, one per frame.
4925 * periodic_size can shrink by USBCMD update if hcc_params allows.
4926 */
4932 /* periodic schedule size can be smaller than default */
4945 }
4946 }
4951 /* controllers may cache some of the periodic schedule ... */
4954 /*
4955 * dedicate a qh for the async ring head, since we couldn't unlink
4956 * a 'real' qh without stopping the async schedule [4.8]. use it
4957 * as the 'reclamation list head' too.
4958 * its dummy is used in hw_alt_next of many tds, to prevent the qh
4959 * from automatically advancing to the next td after short reads.
4960 */
4970 /* clear interrupt enables, set irq latency */
4975 /* HW default park == 3, on hardware that supports it (like
4976 * NVidia and ALI silicon), maximizes throughput on the async
4977 * schedule by avoiding QH fetches between transfers.
4978 *
4979 * With fast usb storage devices and NForce2, "park" seems to
4980 * make problems: throughput reduction (!), data errors...
4981 */
4986 }
4988 }
4990 /* periodic schedule size can be smaller than default */
4993 }
4996 /* Accept arbitrarily long scatter-gather lists */
5000 }
5002 /* start HC running; it's halted, hcd_fotg210_init() has been run (once) */
5004 {
5006 u32 temp;
5007 u32 hcc_params;
5011 /* EHCI spec section 4.1 */
5018 /*
5019 * hcc_params controls whether fotg210->regs->segment must (!!!)
5020 * be used; it constrains QH/ITD/SITD and QTD locations.
5021 * dma_pool consistent memory always uses segment zero.
5022 * streaming mappings for I/O buffers, like pci_map_single(),
5023 * can return segments above 4GB, if the device allows.
5024 *
5025 * NOTE: the dma mask is visible through dev->dma_mask, so
5026 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
5027 * Scsi_Host.highmem_io, and so forth. It's readonly to all
5028 * host side drivers though.
5029 */
5032 /*
5033 * Philips, Intel, and maybe others need CMD_RUN before the
5034 * root hub will detect new devices (why?); NEC doesn't
5035 */
5041 /*
5042 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
5043 * are explicitly handed to companion controller(s), so no TT is
5044 * involved with the root hub. (Except where one is integrated,
5045 * and there's no companion controller unless maybe for USB OTG.)
5046 *
5047 * Turning on the CF flag will transfer ownership of all ports
5048 * from the companions to the EHCI controller. If any of the
5049 * companions are in the middle of a port reset at the time, it
5050 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
5051 * guarantees that no resets are in progress. After we set CF,
5052 * a short delay lets the hardware catch up; new resets shouldn't
5053 * be started before the port switching actions could complete.
5054 */
5057 /* unblock posted writes */
5073 /* GRR this is run-once init(), being done every time the HC starts.
5074 * So long as they're part of class devices, we can't do it init()
5075 * since the class device isn't created that early.
5076 */
5081 }
5084 {
5094 /* cache this readonly data; minimize chip reads */
5100 /* data structure init */
5112 }
5115 {
5124 /* e.g. cardbus physical eject */
5128 }
5130 /*
5131 * We don't use STS_FLR, but some controllers don't like it to
5132 * remain on, so mask it out along with the other status bits.
5133 */
5136 /* Shared IRQ? */
5141 }
5143 /* clear (just) interrupts */
5148 /* unrequested/ignored: Frame List Rollover */
5151 /* INT, ERR, and IAA interrupt rates can be throttled */
5153 /* normal [4.15.1.2] or error [4.15.1.1] completion */
5157 else
5160 }
5162 /* complete the unlinking of some qh [4.15.2.3] */
5165 /* Turn off the IAA watchdog */
5169 /*
5170 * Mild optimization: Allow another IAAD to reset the
5171 * hrtimer, if one occurs before the next expiration.
5172 * In theory we could always cancel the hrtimer, but
5173 * tests show that about half the time it will be reset
5174 * for some other event anyway.
5175 */
5179 /* guard against (alleged) silicon errata */
5187 }
5189 /* remote wakeup [4.3.1] */
5194 /* kick root hub later */
5197 /* resume root hub? */
5209 /* start 20 msec resume signaling from this port,
5210 * and make hub_wq collect PORT_STAT_C_SUSPEND to
5211 * stop that signaling. Use 5 ms extra for safety,
5212 * like usb_port_resume() does.
5213 */
5218 }
5219 }
5221 /* PCI errors [4.15.2.4] */
5226 dead:
5229 /* Don't let the controller do anything more */
5238 /* Handle completions when the controller stops */
5240 }
5248 }
5250 /* non-error returns are a promise to giveback() the urb later
5251 * we drop ownership so next owner (or urb unlink) can get it
5252 *
5253 * urb + dev is in hcd.self.controller.urb_list
5254 * we're queueing TDs onto software and hardware lists
5255 *
5256 * hcd-specific init for hcpriv hasn't been done yet
5257 *
5258 * NOTE: control, bulk, and interrupt share the same code to append TDs
5259 * to a (possibly active) QH, and the same QH scanning code.
5260 */
5262 gfp_t mem_flags)
5263 {
5271 /* qh_completions() code doesn't handle all the fault cases
5272 * in multi-TD control transfers. Even 1KB is rare anyway.
5273 */
5276 /* FALLTHROUGH */
5277 /* case PIPE_BULK: */
5290 }
5291 }
5293 /* remove from hardware lists
5294 * completions normally happen asynchronously
5295 */
5298 {
5310 /* case PIPE_CONTROL: */
5311 /* case PIPE_BULK:*/
5323 /* already started */
5326 /* QH might be waiting for a Clear-TT-Buffer */
5329 }
5348 }
5352 /* itd... */
5354 /* wait till next completion, do it then. */
5355 /* completion irqs can wait up to 1024 msec, */
5357 }
5358 done:
5361 }
5363 /* bulk qh holds the data toggle */
5367 {
5372 /* ASSERT: any requests/urbs are being unlinked */
5373 /* ASSERT: nobody can be submitting urbs for this any more */
5375 rescan:
5381 /* endpoints can be iso streams. for now, we don't
5382 * accelerate iso completions ... so spin a while.
5383 */
5390 /* BUG_ON(!list_empty(&stream->free_list)); */
5393 }
5404 /* periodic qh self-unlinks on empty, and a COMPLETING qh
5405 * may already be unlinked.
5406 */
5409 /* FALL THROUGH */
5412 idle_timeout:
5422 }
5423 /* fall through */
5425 /* caller was supposed to have unlinked any requests;
5426 * that's not our job. just leak this memory.
5427 */
5432 }
5433 done:
5436 }
5440 {
5454 /* For Bulk and Interrupt endpoints we maintain the toggle state
5455 * in the hardware; the toggle bits in udev aren't used at all.
5456 * When an endpoint is reset by usb_clear_halt() we must reset
5457 * the toggle bit in the QH.
5458 */
5466 /* The toggle value in the QH can't be updated
5467 * while the QH is active. Unlink it now;
5468 * re-linking will call qh_refresh().
5469 */
5472 else
5474 }
5475 }
5477 }
5480 {
5485 }
5487 /* The EHCI in ChipIdea HDRC cannot be a separate module or device,
5488 * because its registers (and irq) are shared between host/gadget/otg
5489 * functions and in order to facilitate role switching we cannot
5490 * give the fotg210 driver exclusive access to those.
5491 */
5501 /*
5502 * generic hardware linkage
5503 */
5507 /*
5508 * basic lifecycle operations
5509 */
5515 /*
5516 * managing i/o requests and associated device resources
5517 */
5523 /*
5524 * scheduling support
5525 */
5528 /*
5529 * root hub support
5530 */
5540 };
5543 {
5544 u32 value;
5553 }
5555 /**
5556 * fotg210_hcd_probe - initialize faraday FOTG210 HCDs
5557 *
5558 * Allocates basic resources for this USB host controller, and
5559 * then invokes the start() method for the HCD associated with it
5560 * through the hotplug entry's driver_data.
5561 */
5563 {
5581 }
5591 }
5600 }
5619 }
5624 failed:
5626 fail_create_hcd:
5629 }
5631 /**
5632 * fotg210_hcd_remove - shutdown processing for EHCI HCDs
5633 * @dev: USB Host Controller being removed
5634 *
5635 */
5637 {
5648 }
5653 },
5656 };
5659 {
5669 pr_warn("Warning! fotg210_hcd should always be loaded before uhci_hcd and ohci_hcd, not after\n");
5683 clean:
5689 }
5693 {
5697 }