drivers/gpu/drm/imx/ipuv3-crtc.c

   1 /*
   2  * i.MX IPUv3 Graphics driver
   3  *
   4  * Copyright (C) 2011 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15 #include <linux/component.h>
  16 #include <linux/module.h>
  17 #include <linux/export.h>
  18 #include <linux/device.h>
  19 #include <linux/platform_device.h>
  20 #include <drm/drmP.h>
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_crtc_helper.h>
  24 #include <linux/clk.h>
  25 #include <linux/errno.h>
  26 #include <drm/drm_gem_cma_helper.h>
  27 #include <drm/drm_fb_cma_helper.h>
  28
  29 #include <video/imx-ipu-v3.h>
  30 #include "imx-drm.h"
  31 #include "ipuv3-plane.h"
  32
  33 #define DRIVER_DESC             "i.MX IPUv3 Graphics"
  34
  35 struct ipu_crtc {
  36         struct device           *dev;
  37         struct drm_crtc         base;
  38         struct imx_drm_crtc     *imx_crtc;
  39
  40         /* plane[0] is the full plane, plane[1] is the partial plane */
  41         struct ipu_plane        *plane[2];
  42
  43         struct ipu_dc           *dc;
  44         struct ipu_di           *di;
  45         int                     irq;
  46 };
  47
  48 static inline struct ipu_crtc *to_ipu_crtc(struct drm_crtc *crtc)
  49 {
  50         return container_of(crtc, struct ipu_crtc, base);
  51 }
  52
  53 static void ipu_crtc_enable(struct drm_crtc *crtc)
  54 {
  55         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  56         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
  57
  58         ipu_dc_enable(ipu);
  59         ipu_dc_enable_channel(ipu_crtc->dc);
  60         ipu_di_enable(ipu_crtc->di);
  61 }
  62
  63 static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,
  64                                     struct drm_crtc_state *old_crtc_state)
  65 {
  66         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  67         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
  68
  69         ipu_dc_disable_channel(ipu_crtc->dc);
  70         ipu_di_disable(ipu_crtc->di);
  71         /*
  72          * Planes must be disabled before DC clock is removed, as otherwise the
  73          * attached IDMACs will be left in undefined state, possibly hanging
  74          * the IPU or even system.
  75          */
  76         drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
  77         ipu_dc_disable(ipu);
  78
  79         spin_lock_irq(&crtc->dev->event_lock);
  80         if (crtc->state->event) {
  81                 drm_crtc_send_vblank_event(crtc, crtc->state->event);
  82                 crtc->state->event = NULL;
  83         }
  84         spin_unlock_irq(&crtc->dev->event_lock);
  85
  86         drm_crtc_vblank_off(crtc);
  87 }
  88
  89 static void imx_drm_crtc_reset(struct drm_crtc *crtc)
  90 {
  91         struct imx_crtc_state *state;
  92
  93         if (crtc->state) {
  94                 if (crtc->state->mode_blob)
  95                         drm_property_unreference_blob(crtc->state->mode_blob);
  96
  97                 state = to_imx_crtc_state(crtc->state);
  98                 memset(state, 0, sizeof(*state));
  99         } else {
 100                 state = kzalloc(sizeof(*state), GFP_KERNEL);
 101                 if (!state)
 102                         return;
 103                 crtc->state = &state->base;
 104         }
 105
 106         state->base.crtc = crtc;
 107 }
 108
 109 static struct drm_crtc_state *imx_drm_crtc_duplicate_state(struct drm_crtc *crtc)
 110 {
 111         struct imx_crtc_state *state;
 112
 113         state = kzalloc(sizeof(*state), GFP_KERNEL);
 114         if (!state)
 115                 return NULL;
 116
 117         __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
 118
 119         WARN_ON(state->base.crtc != crtc);
 120         state->base.crtc = crtc;
 121
 122         return &state->base;
 123 }
 124
 125 static void imx_drm_crtc_destroy_state(struct drm_crtc *crtc,
 126                                        struct drm_crtc_state *state)
 127 {
 128         __drm_atomic_helper_crtc_destroy_state(state);
 129         kfree(to_imx_crtc_state(state));
 130 }
 131
 132 static void imx_drm_crtc_destroy(struct drm_crtc *crtc)
 133 {
 134         imx_drm_remove_crtc(to_ipu_crtc(crtc)->imx_crtc);
 135 }
 136
 137 static const struct drm_crtc_funcs ipu_crtc_funcs = {
 138         .set_config = drm_atomic_helper_set_config,
 139         .destroy = imx_drm_crtc_destroy,
 140         .page_flip = drm_atomic_helper_page_flip,
 141         .reset = imx_drm_crtc_reset,
 142         .atomic_duplicate_state = imx_drm_crtc_duplicate_state,
 143         .atomic_destroy_state = imx_drm_crtc_destroy_state,
 144 };
 145
 146 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
 147 {
 148         struct ipu_crtc *ipu_crtc = dev_id;
 149
 150         drm_crtc_handle_vblank(&ipu_crtc->base);
 151
 152         return IRQ_HANDLED;
 153 }
 154
 155 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
 156                                   const struct drm_display_mode *mode,
 157                                   struct drm_display_mode *adjusted_mode)
 158 {
 159         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 160         struct videomode vm;
 161         int ret;
 162
 163         drm_display_mode_to_videomode(adjusted_mode, &vm);
 164
 165         ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm);
 166         if (ret)
 167                 return false;
 168
 169         if ((vm.vsync_len == 0) || (vm.hsync_len == 0))
 170                 return false;
 171
 172         drm_display_mode_from_videomode(&vm, adjusted_mode);
 173
 174         return true;
 175 }
 176
 177 static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
 178                                  struct drm_crtc_state *state)
 179 {
 180         u32 primary_plane_mask = 1 << drm_plane_index(crtc->primary);
 181
 182         if (state->active && (primary_plane_mask & state->plane_mask) == 0)
 183                 return -EINVAL;
 184
 185         return 0;
 186 }
 187
 188 static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,
 189                                   struct drm_crtc_state *old_crtc_state)
 190 {
 191         drm_crtc_vblank_on(crtc);
 192 }
 193
 194 static void ipu_crtc_atomic_flush(struct drm_crtc *crtc,
 195                                   struct drm_crtc_state *old_crtc_state)
 196 {
 197         spin_lock_irq(&crtc->dev->event_lock);
 198         if (crtc->state->event) {
 199                 WARN_ON(drm_crtc_vblank_get(crtc));
 200                 drm_crtc_arm_vblank_event(crtc, crtc->state->event);
 201                 crtc->state->event = NULL;
 202         }
 203         spin_unlock_irq(&crtc->dev->event_lock);
 204 }
 205
 206 static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)
 207 {
 208         struct drm_device *dev = crtc->dev;
 209         struct drm_encoder *encoder;
 210         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 211         struct drm_display_mode *mode = &crtc->state->adjusted_mode;
 212         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc->state);
 213         struct ipu_di_signal_cfg sig_cfg = {};
 214         unsigned long encoder_types = 0;
 215
 216         dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
 217                         mode->hdisplay);
 218         dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
 219                         mode->vdisplay);
 220
 221         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 222                 if (encoder->crtc == crtc)
 223                         encoder_types |= BIT(encoder->encoder_type);
 224         }
 225
 226         dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n",
 227                 __func__, encoder_types);
 228
 229         /*
 230          * If we have DAC or LDB, then we need the IPU DI clock to be
 231          * the same as the LDB DI clock. For TVDAC, derive the IPU DI
 232          * clock from 27 MHz TVE_DI clock, but allow to divide it.
 233          */
 234         if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) |
 235                              BIT(DRM_MODE_ENCODER_LVDS)))
 236                 sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
 237         else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC))
 238                 sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
 239         else
 240                 sig_cfg.clkflags = 0;
 241
 242         sig_cfg.enable_pol = !(imx_crtc_state->bus_flags & DRM_BUS_FLAG_DE_LOW);
 243         /* Default to driving pixel data on negative clock edges */
 244         sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags &
 245                              DRM_BUS_FLAG_PIXDATA_POSEDGE);
 246         sig_cfg.bus_format = imx_crtc_state->bus_format;
 247         sig_cfg.v_to_h_sync = 0;
 248         sig_cfg.hsync_pin = imx_crtc_state->di_hsync_pin;
 249         sig_cfg.vsync_pin = imx_crtc_state->di_vsync_pin;
 250
 251         drm_display_mode_to_videomode(mode, &sig_cfg.mode);
 252
 253         ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di,
 254                          mode->flags & DRM_MODE_FLAG_INTERLACE,
 255                          imx_crtc_state->bus_format, mode->hdisplay);
 256         ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
 257 }
 258
 259 static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
 260         .mode_fixup = ipu_crtc_mode_fixup,
 261         .mode_set_nofb = ipu_crtc_mode_set_nofb,
 262         .atomic_check = ipu_crtc_atomic_check,
 263         .atomic_begin = ipu_crtc_atomic_begin,
 264         .atomic_flush = ipu_crtc_atomic_flush,
 265         .atomic_disable = ipu_crtc_atomic_disable,
 266         .enable = ipu_crtc_enable,
 267 };
 268
 269 static int ipu_enable_vblank(struct drm_crtc *crtc)
 270 {
 271         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 272
 273         enable_irq(ipu_crtc->irq);
 274
 275         return 0;
 276 }
 277
 278 static void ipu_disable_vblank(struct drm_crtc *crtc)
 279 {
 280         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 281
 282         disable_irq_nosync(ipu_crtc->irq);
 283 }
 284
 285 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
 286         .enable_vblank = ipu_enable_vblank,
 287         .disable_vblank = ipu_disable_vblank,
 288         .crtc_funcs = &ipu_crtc_funcs,
 289         .crtc_helper_funcs = &ipu_helper_funcs,
 290 };
 291
 292 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
 293 {
 294         if (!IS_ERR_OR_NULL(ipu_crtc->dc))
 295                 ipu_dc_put(ipu_crtc->dc);
 296         if (!IS_ERR_OR_NULL(ipu_crtc->di))
 297                 ipu_di_put(ipu_crtc->di);
 298 }
 299
 300 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
 301                 struct ipu_client_platformdata *pdata)
 302 {
 303         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 304         int ret;
 305
 306         ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
 307         if (IS_ERR(ipu_crtc->dc)) {
 308                 ret = PTR_ERR(ipu_crtc->dc);
 309                 goto err_out;
 310         }
 311
 312         ipu_crtc->di = ipu_di_get(ipu, pdata->di);
 313         if (IS_ERR(ipu_crtc->di)) {
 314                 ret = PTR_ERR(ipu_crtc->di);
 315                 goto err_out;
 316         }
 317
 318         return 0;
 319 err_out:
 320         ipu_put_resources(ipu_crtc);
 321
 322         return ret;
 323 }
 324
 325 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
 326         struct ipu_client_platformdata *pdata, struct drm_device *drm)
 327 {
 328         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 329         int dp = -EINVAL;
 330         int ret;
 331
 332         ret = ipu_get_resources(ipu_crtc, pdata);
 333         if (ret) {
 334                 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
 335                                 ret);
 336                 return ret;
 337         }
 338
 339         if (pdata->dp >= 0)
 340                 dp = IPU_DP_FLOW_SYNC_BG;
 341         ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0,
 342                                             DRM_PLANE_TYPE_PRIMARY);
 343         if (IS_ERR(ipu_crtc->plane[0])) {
 344                 ret = PTR_ERR(ipu_crtc->plane[0]);
 345                 goto err_put_resources;
 346         }
 347
 348         ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
 349                         &ipu_crtc->plane[0]->base, &ipu_crtc_helper_funcs,
 350                         pdata->of_node);
 351         if (ret) {
 352                 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
 353                 goto err_put_resources;
 354         }
 355
 356         ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
 357         if (ret) {
 358                 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
 359                         ret);
 360                 goto err_remove_crtc;
 361         }
 362
 363         /* If this crtc is using the DP, add an overlay plane */
 364         if (pdata->dp >= 0 && pdata->dma[1] > 0) {
 365                 ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],
 366                                                 IPU_DP_FLOW_SYNC_FG,
 367                                                 drm_crtc_mask(&ipu_crtc->base),
 368                                                 DRM_PLANE_TYPE_OVERLAY);
 369                 if (IS_ERR(ipu_crtc->plane[1])) {
 370                         ipu_crtc->plane[1] = NULL;
 371                 } else {
 372                         ret = ipu_plane_get_resources(ipu_crtc->plane[1]);
 373                         if (ret) {
 374                                 dev_err(ipu_crtc->dev, "getting plane 1 "
 375                                         "resources failed with %d.\n", ret);
 376                                 goto err_put_plane0_res;
 377                         }
 378                 }
 379         }
 380
 381         ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
 382         ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
 383                         "imx_drm", ipu_crtc);
 384         if (ret < 0) {
 385                 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
 386                 goto err_put_plane1_res;
 387         }
 388         /* Only enable IRQ when we actually need it to trigger work. */
 389         disable_irq(ipu_crtc->irq);
 390
 391         return 0;
 392
 393 err_put_plane1_res:
 394         if (ipu_crtc->plane[1])
 395                 ipu_plane_put_resources(ipu_crtc->plane[1]);
 396 err_put_plane0_res:
 397         ipu_plane_put_resources(ipu_crtc->plane[0]);
 398 err_remove_crtc:
 399         imx_drm_remove_crtc(ipu_crtc->imx_crtc);
 400 err_put_resources:
 401         ipu_put_resources(ipu_crtc);
 402
 403         return ret;
 404 }
 405
 406 static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
 407 {
 408         struct ipu_client_platformdata *pdata = dev->platform_data;
 409         struct drm_device *drm = data;
 410         struct ipu_crtc *ipu_crtc;
 411         int ret;
 412
 413         ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
 414         if (!ipu_crtc)
 415                 return -ENOMEM;
 416
 417         ipu_crtc->dev = dev;
 418
 419         ret = ipu_crtc_init(ipu_crtc, pdata, drm);
 420         if (ret)
 421                 return ret;
 422
 423         dev_set_drvdata(dev, ipu_crtc);
 424
 425         return 0;
 426 }
 427
 428 static void ipu_drm_unbind(struct device *dev, struct device *master,
 429         void *data)
 430 {
 431         struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
 432
 433         ipu_put_resources(ipu_crtc);
 434         if (ipu_crtc->plane[1])
 435                 ipu_plane_put_resources(ipu_crtc->plane[1]);
 436         ipu_plane_put_resources(ipu_crtc->plane[0]);
 437 }
 438
 439 static const struct component_ops ipu_crtc_ops = {
 440         .bind = ipu_drm_bind,
 441         .unbind = ipu_drm_unbind,
 442 };
 443
 444 static int ipu_drm_probe(struct platform_device *pdev)
 445 {
 446         struct device *dev = &pdev->dev;
 447         int ret;
 448
 449         if (!dev->platform_data)
 450                 return -EINVAL;
 451
 452         ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
 453         if (ret)
 454                 return ret;
 455
 456         return component_add(dev, &ipu_crtc_ops);
 457 }
 458
 459 static int ipu_drm_remove(struct platform_device *pdev)
 460 {
 461         component_del(&pdev->dev, &ipu_crtc_ops);
 462         return 0;
 463 }
 464
 465 static struct platform_driver ipu_drm_driver = {
 466         .driver = {
 467                 .name = "imx-ipuv3-crtc",
 468         },
 469         .probe = ipu_drm_probe,
 470         .remove = ipu_drm_remove,
 471 };
 472 module_platform_driver(ipu_drm_driver);
 473
 474 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
 475 MODULE_DESCRIPTION(DRIVER_DESC);
 476 MODULE_LICENSE("GPL");
 477 MODULE_ALIAS("platform:imx-ipuv3-crtc");