drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * drivers/gpu/drm/omapdrm/omap_drv.c
   3  *
   4  * Copyright (C) 2011 Texas Instruments
   5  * Author: Rob Clark <rob@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/wait.h>
  21
  22 #include <drm/drm_atomic.h>
  23 #include <drm/drm_atomic_helper.h>
  24 #include <drm/drm_crtc_helper.h>
  25 #include <drm/drm_fb_helper.h>
  26
  27 #include "omap_dmm_tiler.h"
  28 #include "omap_drv.h"
  29
  30 #define DRIVER_NAME             MODULE_NAME
  31 #define DRIVER_DESC             "OMAP DRM"
  32 #define DRIVER_DATE             "20110917"
  33 #define DRIVER_MAJOR            1
  34 #define DRIVER_MINOR            0
  35 #define DRIVER_PATCHLEVEL       0
  36
  37 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
  38
  39 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
  40 module_param(num_crtc, int, 0600);
  41
  42 /*
  43  * mode config funcs
  44  */
  45
  46 /* Notes about mapping DSS and DRM entities:
  47  *    CRTC:        overlay
  48  *    encoder:     manager.. with some extension to allow one primary CRTC
  49  *                 and zero or more video CRTC's to be mapped to one encoder?
  50  *    connector:   dssdev.. manager can be attached/detached from different
  51  *                 devices
  52  */
  53
  54 static void omap_fb_output_poll_changed(struct drm_device *dev)
  55 {
  56         struct omap_drm_private *priv = dev->dev_private;
  57         DBG("dev=%p", dev);
  58         if (priv->fbdev)
  59                 drm_fb_helper_hotplug_event(priv->fbdev);
  60 }
  61
  62 struct omap_atomic_state_commit {
  63         struct work_struct work;
  64         struct drm_device *dev;
  65         struct drm_atomic_state *state;
  66         u32 crtcs;
  67 };
  68
  69 static void omap_atomic_wait_for_completion(struct drm_device *dev,
  70                                             struct drm_atomic_state *old_state)
  71 {
  72         struct drm_crtc_state *old_crtc_state;
  73         struct drm_crtc *crtc;
  74         unsigned int i;
  75         int ret;
  76
  77         for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
  78                 if (!crtc->state->enable)
  79                         continue;
  80
  81                 ret = omap_crtc_wait_pending(crtc);
  82
  83                 if (!ret)
  84                         dev_warn(dev->dev,
  85                                  "atomic complete timeout (pipe %u)!\n", i);
  86         }
  87 }
  88
  89 static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
  90 {
  91         struct drm_device *dev = commit->dev;
  92         struct omap_drm_private *priv = dev->dev_private;
  93         struct drm_atomic_state *old_state = commit->state;
  94
  95         /* Apply the atomic update. */
  96         dispc_runtime_get();
  97
  98         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  99         drm_atomic_helper_commit_planes(dev, old_state, 0);
 100         drm_atomic_helper_commit_modeset_enables(dev, old_state);
 101
 102         omap_atomic_wait_for_completion(dev, old_state);
 103
 104         drm_atomic_helper_cleanup_planes(dev, old_state);
 105
 106         dispc_runtime_put();
 107
 108         drm_atomic_state_free(old_state);
 109
 110         /* Complete the commit, wake up any waiter. */
 111         spin_lock(&priv->commit.lock);
 112         priv->commit.pending &= ~commit->crtcs;
 113         spin_unlock(&priv->commit.lock);
 114
 115         wake_up_all(&priv->commit.wait);
 116
 117         kfree(commit);
 118 }
 119
 120 static void omap_atomic_work(struct work_struct *work)
 121 {
 122         struct omap_atomic_state_commit *commit =
 123                 container_of(work, struct omap_atomic_state_commit, work);
 124
 125         omap_atomic_complete(commit);
 126 }
 127
 128 static bool omap_atomic_is_pending(struct omap_drm_private *priv,
 129                                    struct omap_atomic_state_commit *commit)
 130 {
 131         bool pending;
 132
 133         spin_lock(&priv->commit.lock);
 134         pending = priv->commit.pending & commit->crtcs;
 135         spin_unlock(&priv->commit.lock);
 136
 137         return pending;
 138 }
 139
 140 static int omap_atomic_commit(struct drm_device *dev,
 141                               struct drm_atomic_state *state, bool nonblock)
 142 {
 143         struct omap_drm_private *priv = dev->dev_private;
 144         struct omap_atomic_state_commit *commit;
 145         struct drm_crtc *crtc;
 146         struct drm_crtc_state *crtc_state;
 147         int i, ret;
 148
 149         ret = drm_atomic_helper_prepare_planes(dev, state);
 150         if (ret)
 151                 return ret;
 152
 153         /* Allocate the commit object. */
 154         commit = kzalloc(sizeof(*commit), GFP_KERNEL);
 155         if (commit == NULL) {
 156                 ret = -ENOMEM;
 157                 goto error;
 158         }
 159
 160         INIT_WORK(&commit->work, omap_atomic_work);
 161         commit->dev = dev;
 162         commit->state = state;
 163
 164         /* Wait until all affected CRTCs have completed previous commits and
 165          * mark them as pending.
 166          */
 167         for_each_crtc_in_state(state, crtc, crtc_state, i)
 168                 commit->crtcs |= drm_crtc_mask(crtc);
 169
 170         wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
 171
 172         spin_lock(&priv->commit.lock);
 173         priv->commit.pending |= commit->crtcs;
 174         spin_unlock(&priv->commit.lock);
 175
 176         /* Swap the state, this is the point of no return. */
 177         drm_atomic_helper_swap_state(state, true);
 178
 179         if (nonblock)
 180                 schedule_work(&commit->work);
 181         else
 182                 omap_atomic_complete(commit);
 183
 184         return 0;
 185
 186 error:
 187         drm_atomic_helper_cleanup_planes(dev, state);
 188         return ret;
 189 }
 190
 191 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 192         .fb_create = omap_framebuffer_create,
 193         .output_poll_changed = omap_fb_output_poll_changed,
 194         .atomic_check = drm_atomic_helper_check,
 195         .atomic_commit = omap_atomic_commit,
 196 };
 197
 198 static int get_connector_type(struct omap_dss_device *dssdev)
 199 {
 200         switch (dssdev->type) {
 201         case OMAP_DISPLAY_TYPE_HDMI:
 202                 return DRM_MODE_CONNECTOR_HDMIA;
 203         case OMAP_DISPLAY_TYPE_DVI:
 204                 return DRM_MODE_CONNECTOR_DVID;
 205         case OMAP_DISPLAY_TYPE_DSI:
 206                 return DRM_MODE_CONNECTOR_DSI;
 207         default:
 208                 return DRM_MODE_CONNECTOR_Unknown;
 209         }
 210 }
 211
 212 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
 213 {
 214         struct omap_drm_private *priv = dev->dev_private;
 215         int i;
 216
 217         for (i = 0; i < priv->num_crtcs; i++) {
 218                 struct drm_crtc *crtc = priv->crtcs[i];
 219
 220                 if (omap_crtc_channel(crtc) == channel)
 221                         return true;
 222         }
 223
 224         return false;
 225 }
 226 static void omap_disconnect_dssdevs(void)
 227 {
 228         struct omap_dss_device *dssdev = NULL;
 229
 230         for_each_dss_dev(dssdev)
 231                 dssdev->driver->disconnect(dssdev);
 232 }
 233
 234 static int omap_connect_dssdevs(void)
 235 {
 236         int r;
 237         struct omap_dss_device *dssdev = NULL;
 238         bool no_displays = true;
 239
 240         for_each_dss_dev(dssdev) {
 241                 r = dssdev->driver->connect(dssdev);
 242                 if (r == -EPROBE_DEFER) {
 243                         omap_dss_put_device(dssdev);
 244                         goto cleanup;
 245                 } else if (r) {
 246                         dev_warn(dssdev->dev, "could not connect display: %s\n",
 247                                 dssdev->name);
 248                 } else {
 249                         no_displays = false;
 250                 }
 251         }
 252
 253         if (no_displays)
 254                 return -EPROBE_DEFER;
 255
 256         return 0;
 257
 258 cleanup:
 259         /*
 260          * if we are deferring probe, we disconnect the devices we previously
 261          * connected
 262          */
 263         omap_disconnect_dssdevs();
 264
 265         return r;
 266 }
 267
 268 static int omap_modeset_create_crtc(struct drm_device *dev, int id,
 269                                     enum omap_channel channel)
 270 {
 271         struct omap_drm_private *priv = dev->dev_private;
 272         struct drm_plane *plane;
 273         struct drm_crtc *crtc;
 274
 275         plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
 276         if (IS_ERR(plane))
 277                 return PTR_ERR(plane);
 278
 279         crtc = omap_crtc_init(dev, plane, channel, id);
 280
 281         BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
 282         priv->crtcs[id] = crtc;
 283         priv->num_crtcs++;
 284
 285         priv->planes[id] = plane;
 286         priv->num_planes++;
 287
 288         return 0;
 289 }
 290
 291 static int omap_modeset_init_properties(struct drm_device *dev)
 292 {
 293         struct omap_drm_private *priv = dev->dev_private;
 294
 295         if (priv->has_dmm) {
 296                 dev->mode_config.rotation_property =
 297                         drm_mode_create_rotation_property(dev,
 298                                 DRM_ROTATE_0 | DRM_ROTATE_90 |
 299                                 DRM_ROTATE_180 | DRM_ROTATE_270 |
 300                                 DRM_REFLECT_X | DRM_REFLECT_Y);
 301                 if (!dev->mode_config.rotation_property)
 302                         return -ENOMEM;
 303         }
 304
 305         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
 306         if (!priv->zorder_prop)
 307                 return -ENOMEM;
 308
 309         return 0;
 310 }
 311
 312 static int omap_modeset_init(struct drm_device *dev)
 313 {
 314         struct omap_drm_private *priv = dev->dev_private;
 315         struct omap_dss_device *dssdev = NULL;
 316         int num_ovls = dss_feat_get_num_ovls();
 317         int num_mgrs = dss_feat_get_num_mgrs();
 318         int num_crtcs;
 319         int i, id = 0;
 320         int ret;
 321
 322         drm_mode_config_init(dev);
 323
 324         omap_drm_irq_install(dev);
 325
 326         ret = omap_modeset_init_properties(dev);
 327         if (ret < 0)
 328                 return ret;
 329
 330         /*
 331          * We usually don't want to create a CRTC for each manager, at least
 332          * not until we have a way to expose private planes to userspace.
 333          * Otherwise there would not be enough video pipes left for drm planes.
 334          * We use the num_crtc argument to limit the number of crtcs we create.
 335          */
 336         num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
 337
 338         dssdev = NULL;
 339
 340         for_each_dss_dev(dssdev) {
 341                 struct drm_connector *connector;
 342                 struct drm_encoder *encoder;
 343                 enum omap_channel channel;
 344                 struct omap_dss_device *out;
 345
 346                 if (!omapdss_device_is_connected(dssdev))
 347                         continue;
 348
 349                 encoder = omap_encoder_init(dev, dssdev);
 350
 351                 if (!encoder) {
 352                         dev_err(dev->dev, "could not create encoder: %s\n",
 353                                         dssdev->name);
 354                         return -ENOMEM;
 355                 }
 356
 357                 connector = omap_connector_init(dev,
 358                                 get_connector_type(dssdev), dssdev, encoder);
 359
 360                 if (!connector) {
 361                         dev_err(dev->dev, "could not create connector: %s\n",
 362                                         dssdev->name);
 363                         return -ENOMEM;
 364                 }
 365
 366                 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
 367                 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
 368
 369                 priv->encoders[priv->num_encoders++] = encoder;
 370                 priv->connectors[priv->num_connectors++] = connector;
 371
 372                 drm_mode_connector_attach_encoder(connector, encoder);
 373
 374                 /*
 375                  * if we have reached the limit of the crtcs we are allowed to
 376                  * create, let's not try to look for a crtc for this
 377                  * panel/encoder and onwards, we will, of course, populate the
 378                  * the possible_crtcs field for all the encoders with the final
 379                  * set of crtcs we create
 380                  */
 381                 if (id == num_crtcs)
 382                         continue;
 383
 384                 /*
 385                  * get the recommended DISPC channel for this encoder. For now,
 386                  * we only try to get create a crtc out of the recommended, the
 387                  * other possible channels to which the encoder can connect are
 388                  * not considered.
 389                  */
 390
 391                 out = omapdss_find_output_from_display(dssdev);
 392                 channel = out->dispc_channel;
 393                 omap_dss_put_device(out);
 394
 395                 /*
 396                  * if this channel hasn't already been taken by a previously
 397                  * allocated crtc, we create a new crtc for it
 398                  */
 399                 if (!channel_used(dev, channel)) {
 400                         ret = omap_modeset_create_crtc(dev, id, channel);
 401                         if (ret < 0) {
 402                                 dev_err(dev->dev,
 403                                         "could not create CRTC (channel %u)\n",
 404                                         channel);
 405                                 return ret;
 406                         }
 407
 408                         id++;
 409                 }
 410         }
 411
 412         /*
 413          * we have allocated crtcs according to the need of the panels/encoders,
 414          * adding more crtcs here if needed
 415          */
 416         for (; id < num_crtcs; id++) {
 417
 418                 /* find a free manager for this crtc */
 419                 for (i = 0; i < num_mgrs; i++) {
 420                         if (!channel_used(dev, i))
 421                                 break;
 422                 }
 423
 424                 if (i == num_mgrs) {
 425                         /* this shouldn't really happen */
 426                         dev_err(dev->dev, "no managers left for crtc\n");
 427                         return -ENOMEM;
 428                 }
 429
 430                 ret = omap_modeset_create_crtc(dev, id, i);
 431                 if (ret < 0) {
 432                         dev_err(dev->dev,
 433                                 "could not create CRTC (channel %u)\n", i);
 434                         return ret;
 435                 }
 436         }
 437
 438         /*
 439          * Create normal planes for the remaining overlays:
 440          */
 441         for (; id < num_ovls; id++) {
 442                 struct drm_plane *plane;
 443
 444                 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
 445                 if (IS_ERR(plane))
 446                         return PTR_ERR(plane);
 447
 448                 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
 449                 priv->planes[priv->num_planes++] = plane;
 450         }
 451
 452         for (i = 0; i < priv->num_encoders; i++) {
 453                 struct drm_encoder *encoder = priv->encoders[i];
 454                 struct omap_dss_device *dssdev =
 455                                         omap_encoder_get_dssdev(encoder);
 456                 struct omap_dss_device *output;
 457
 458                 output = omapdss_find_output_from_display(dssdev);
 459
 460                 /* figure out which crtc's we can connect the encoder to: */
 461                 encoder->possible_crtcs = 0;
 462                 for (id = 0; id < priv->num_crtcs; id++) {
 463                         struct drm_crtc *crtc = priv->crtcs[id];
 464                         enum omap_channel crtc_channel;
 465
 466                         crtc_channel = omap_crtc_channel(crtc);
 467
 468                         if (output->dispc_channel == crtc_channel) {
 469                                 encoder->possible_crtcs |= (1 << id);
 470                                 break;
 471                         }
 472                 }
 473
 474                 omap_dss_put_device(output);
 475         }
 476
 477         DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
 478                 priv->num_planes, priv->num_crtcs, priv->num_encoders,
 479                 priv->num_connectors);
 480
 481         dev->mode_config.min_width = 32;
 482         dev->mode_config.min_height = 32;
 483
 484         /* note: eventually will need some cpu_is_omapXYZ() type stuff here
 485          * to fill in these limits properly on different OMAP generations..
 486          */
 487         dev->mode_config.max_width = 2048;
 488         dev->mode_config.max_height = 2048;
 489
 490         dev->mode_config.funcs = &omap_mode_config_funcs;
 491
 492         drm_mode_config_reset(dev);
 493
 494         return 0;
 495 }
 496
 497 static void omap_modeset_free(struct drm_device *dev)
 498 {
 499         drm_mode_config_cleanup(dev);
 500 }
 501
 502 /*
 503  * drm ioctl funcs
 504  */
 505
 506
 507 static int ioctl_get_param(struct drm_device *dev, void *data,
 508                 struct drm_file *file_priv)
 509 {
 510         struct omap_drm_private *priv = dev->dev_private;
 511         struct drm_omap_param *args = data;
 512
 513         DBG("%p: param=%llu", dev, args->param);
 514
 515         switch (args->param) {
 516         case OMAP_PARAM_CHIPSET_ID:
 517                 args->value = priv->omaprev;
 518                 break;
 519         default:
 520                 DBG("unknown parameter %lld", args->param);
 521                 return -EINVAL;
 522         }
 523
 524         return 0;
 525 }
 526
 527 static int ioctl_set_param(struct drm_device *dev, void *data,
 528                 struct drm_file *file_priv)
 529 {
 530         struct drm_omap_param *args = data;
 531
 532         switch (args->param) {
 533         default:
 534                 DBG("unknown parameter %lld", args->param);
 535                 return -EINVAL;
 536         }
 537
 538         return 0;
 539 }
 540
 541 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
 542
 543 static int ioctl_gem_new(struct drm_device *dev, void *data,
 544                 struct drm_file *file_priv)
 545 {
 546         struct drm_omap_gem_new *args = data;
 547         u32 flags = args->flags & OMAP_BO_USER_MASK;
 548
 549         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 550              args->size.bytes, flags);
 551
 552         return omap_gem_new_handle(dev, file_priv, args->size, flags,
 553                                    &args->handle);
 554 }
 555
 556 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 557                 struct drm_file *file_priv)
 558 {
 559         struct drm_omap_gem_cpu_prep *args = data;
 560         struct drm_gem_object *obj;
 561         int ret;
 562
 563         VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
 564
 565         obj = drm_gem_object_lookup(file_priv, args->handle);
 566         if (!obj)
 567                 return -ENOENT;
 568
 569         ret = omap_gem_op_sync(obj, args->op);
 570
 571         if (!ret)
 572                 ret = omap_gem_op_start(obj, args->op);
 573
 574         drm_gem_object_unreference_unlocked(obj);
 575
 576         return ret;
 577 }
 578
 579 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
 580                 struct drm_file *file_priv)
 581 {
 582         struct drm_omap_gem_cpu_fini *args = data;
 583         struct drm_gem_object *obj;
 584         int ret;
 585
 586         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 587
 588         obj = drm_gem_object_lookup(file_priv, args->handle);
 589         if (!obj)
 590                 return -ENOENT;
 591
 592         /* XXX flushy, flushy */
 593         ret = 0;
 594
 595         if (!ret)
 596                 ret = omap_gem_op_finish(obj, args->op);
 597
 598         drm_gem_object_unreference_unlocked(obj);
 599
 600         return ret;
 601 }
 602
 603 static int ioctl_gem_info(struct drm_device *dev, void *data,
 604                 struct drm_file *file_priv)
 605 {
 606         struct drm_omap_gem_info *args = data;
 607         struct drm_gem_object *obj;
 608         int ret = 0;
 609
 610         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 611
 612         obj = drm_gem_object_lookup(file_priv, args->handle);
 613         if (!obj)
 614                 return -ENOENT;
 615
 616         args->size = omap_gem_mmap_size(obj);
 617         args->offset = omap_gem_mmap_offset(obj);
 618
 619         drm_gem_object_unreference_unlocked(obj);
 620
 621         return ret;
 622 }
 623
 624 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 625         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_AUTH),
 626         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 627         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_AUTH),
 628         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_AUTH),
 629         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_AUTH),
 630         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_AUTH),
 631 };
 632
 633 /*
 634  * drm driver funcs
 635  */
 636
 637 /**
 638  * load - setup chip and create an initial config
 639  * @dev: DRM device
 640  * @flags: startup flags
 641  *
 642  * The driver load routine has to do several things:
 643  *   - initialize the memory manager
 644  *   - allocate initial config memory
 645  *   - setup the DRM framebuffer with the allocated memory
 646  */
 647 static int dev_load(struct drm_device *dev, unsigned long flags)
 648 {
 649         struct omap_drm_platform_data *pdata = dev->dev->platform_data;
 650         struct omap_drm_private *priv;
 651         unsigned int i;
 652         int ret;
 653
 654         DBG("load: dev=%p", dev);
 655
 656         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 657         if (!priv)
 658                 return -ENOMEM;
 659
 660         priv->omaprev = pdata->omaprev;
 661
 662         dev->dev_private = priv;
 663
 664         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 665         init_waitqueue_head(&priv->commit.wait);
 666         spin_lock_init(&priv->commit.lock);
 667
 668         spin_lock_init(&priv->list_lock);
 669         INIT_LIST_HEAD(&priv->obj_list);
 670
 671         omap_gem_init(dev);
 672
 673         ret = omap_modeset_init(dev);
 674         if (ret) {
 675                 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
 676                 dev->dev_private = NULL;
 677                 kfree(priv);
 678                 return ret;
 679         }
 680
 681         /* Initialize vblank handling, start with all CRTCs disabled. */
 682         ret = drm_vblank_init(dev, priv->num_crtcs);
 683         if (ret)
 684                 dev_warn(dev->dev, "could not init vblank\n");
 685
 686         for (i = 0; i < priv->num_crtcs; i++)
 687                 drm_crtc_vblank_off(priv->crtcs[i]);
 688
 689         priv->fbdev = omap_fbdev_init(dev);
 690
 691         /* store off drm_device for use in pm ops */
 692         dev_set_drvdata(dev->dev, dev);
 693
 694         drm_kms_helper_poll_init(dev);
 695
 696         return 0;
 697 }
 698
 699 static int dev_unload(struct drm_device *dev)
 700 {
 701         struct omap_drm_private *priv = dev->dev_private;
 702
 703         DBG("unload: dev=%p", dev);
 704
 705         drm_kms_helper_poll_fini(dev);
 706
 707         if (priv->fbdev)
 708                 omap_fbdev_free(dev);
 709
 710         omap_modeset_free(dev);
 711         omap_gem_deinit(dev);
 712
 713         destroy_workqueue(priv->wq);
 714
 715         drm_vblank_cleanup(dev);
 716         omap_drm_irq_uninstall(dev);
 717
 718         kfree(dev->dev_private);
 719         dev->dev_private = NULL;
 720
 721         dev_set_drvdata(dev->dev, NULL);
 722
 723         return 0;
 724 }
 725
 726 static int dev_open(struct drm_device *dev, struct drm_file *file)
 727 {
 728         file->driver_priv = NULL;
 729
 730         DBG("open: dev=%p, file=%p", dev, file);
 731
 732         return 0;
 733 }
 734
 735 /**
 736  * lastclose - clean up after all DRM clients have exited
 737  * @dev: DRM device
 738  *
 739  * Take care of cleaning up after all DRM clients have exited.  In the
 740  * mode setting case, we want to restore the kernel's initial mode (just
 741  * in case the last client left us in a bad state).
 742  */
 743 static void dev_lastclose(struct drm_device *dev)
 744 {
 745         int i;
 746
 747         /* we don't support vga_switcheroo.. so just make sure the fbdev
 748          * mode is active
 749          */
 750         struct omap_drm_private *priv = dev->dev_private;
 751         int ret;
 752
 753         DBG("lastclose: dev=%p", dev);
 754
 755         if (dev->mode_config.rotation_property) {
 756                 /* need to restore default rotation state.. not sure
 757                  * if there is a cleaner way to restore properties to
 758                  * default state?  Maybe a flag that properties should
 759                  * automatically be restored to default state on
 760                  * lastclose?
 761                  */
 762                 for (i = 0; i < priv->num_crtcs; i++) {
 763                         drm_object_property_set_value(&priv->crtcs[i]->base,
 764                                         dev->mode_config.rotation_property, 0);
 765                 }
 766
 767                 for (i = 0; i < priv->num_planes; i++) {
 768                         drm_object_property_set_value(&priv->planes[i]->base,
 769                                         dev->mode_config.rotation_property, 0);
 770                 }
 771         }
 772
 773         if (priv->fbdev) {
 774                 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
 775                 if (ret)
 776                         DBG("failed to restore crtc mode");
 777         }
 778 }
 779
 780 static const struct vm_operations_struct omap_gem_vm_ops = {
 781         .fault = omap_gem_fault,
 782         .open = drm_gem_vm_open,
 783         .close = drm_gem_vm_close,
 784 };
 785
 786 static const struct file_operations omapdriver_fops = {
 787         .owner = THIS_MODULE,
 788         .open = drm_open,
 789         .unlocked_ioctl = drm_ioctl,
 790         .release = drm_release,
 791         .mmap = omap_gem_mmap,
 792         .poll = drm_poll,
 793         .read = drm_read,
 794         .llseek = noop_llseek,
 795 };
 796
 797 static struct drm_driver omap_drm_driver = {
 798         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
 799                 DRIVER_ATOMIC,
 800         .load = dev_load,
 801         .unload = dev_unload,
 802         .open = dev_open,
 803         .lastclose = dev_lastclose,
 804         .get_vblank_counter = drm_vblank_no_hw_counter,
 805         .enable_vblank = omap_irq_enable_vblank,
 806         .disable_vblank = omap_irq_disable_vblank,
 807 #ifdef CONFIG_DEBUG_FS
 808         .debugfs_init = omap_debugfs_init,
 809         .debugfs_cleanup = omap_debugfs_cleanup,
 810 #endif
 811         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 812         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 813         .gem_prime_export = omap_gem_prime_export,
 814         .gem_prime_import = omap_gem_prime_import,
 815         .gem_free_object = omap_gem_free_object,
 816         .gem_vm_ops = &omap_gem_vm_ops,
 817         .dumb_create = omap_gem_dumb_create,
 818         .dumb_map_offset = omap_gem_dumb_map_offset,
 819         .dumb_destroy = drm_gem_dumb_destroy,
 820         .ioctls = ioctls,
 821         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 822         .fops = &omapdriver_fops,
 823         .name = DRIVER_NAME,
 824         .desc = DRIVER_DESC,
 825         .date = DRIVER_DATE,
 826         .major = DRIVER_MAJOR,
 827         .minor = DRIVER_MINOR,
 828         .patchlevel = DRIVER_PATCHLEVEL,
 829 };
 830
 831 static int pdev_probe(struct platform_device *device)
 832 {
 833         int r;
 834
 835         if (omapdss_is_initialized() == false)
 836                 return -EPROBE_DEFER;
 837
 838         omap_crtc_pre_init();
 839
 840         r = omap_connect_dssdevs();
 841         if (r) {
 842                 omap_crtc_pre_uninit();
 843                 return r;
 844         }
 845
 846         DBG("%s", device->name);
 847         return drm_platform_init(&omap_drm_driver, device);
 848 }
 849
 850 static int pdev_remove(struct platform_device *device)
 851 {
 852         DBG("");
 853
 854         drm_put_dev(platform_get_drvdata(device));
 855
 856         omap_disconnect_dssdevs();
 857         omap_crtc_pre_uninit();
 858
 859         return 0;
 860 }
 861
 862 #ifdef CONFIG_PM_SLEEP
 863 static int omap_drm_suspend_all_displays(void)
 864 {
 865         struct omap_dss_device *dssdev = NULL;
 866
 867         for_each_dss_dev(dssdev) {
 868                 if (!dssdev->driver)
 869                         continue;
 870
 871                 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
 872                         dssdev->driver->disable(dssdev);
 873                         dssdev->activate_after_resume = true;
 874                 } else {
 875                         dssdev->activate_after_resume = false;
 876                 }
 877         }
 878
 879         return 0;
 880 }
 881
 882 static int omap_drm_resume_all_displays(void)
 883 {
 884         struct omap_dss_device *dssdev = NULL;
 885
 886         for_each_dss_dev(dssdev) {
 887                 if (!dssdev->driver)
 888                         continue;
 889
 890                 if (dssdev->activate_after_resume) {
 891                         dssdev->driver->enable(dssdev);
 892                         dssdev->activate_after_resume = false;
 893                 }
 894         }
 895
 896         return 0;
 897 }
 898
 899 static int omap_drm_suspend(struct device *dev)
 900 {
 901         struct drm_device *drm_dev = dev_get_drvdata(dev);
 902
 903         drm_kms_helper_poll_disable(drm_dev);
 904
 905         drm_modeset_lock_all(drm_dev);
 906         omap_drm_suspend_all_displays();
 907         drm_modeset_unlock_all(drm_dev);
 908
 909         return 0;
 910 }
 911
 912 static int omap_drm_resume(struct device *dev)
 913 {
 914         struct drm_device *drm_dev = dev_get_drvdata(dev);
 915
 916         drm_modeset_lock_all(drm_dev);
 917         omap_drm_resume_all_displays();
 918         drm_modeset_unlock_all(drm_dev);
 919
 920         drm_kms_helper_poll_enable(drm_dev);
 921
 922         return omap_gem_resume(dev);
 923 }
 924 #endif
 925
 926 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 927
 928 static struct platform_driver pdev = {
 929         .driver = {
 930                 .name = DRIVER_NAME,
 931                 .pm = &omapdrm_pm_ops,
 932         },
 933         .probe = pdev_probe,
 934         .remove = pdev_remove,
 935 };
 936
 937 static struct platform_driver * const drivers[] = {
 938         &omap_dmm_driver,
 939         &pdev,
 940 };
 941
 942 static int __init omap_drm_init(void)
 943 {
 944         DBG("init");
 945
 946         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
 947 }
 948
 949 static void __exit omap_drm_fini(void)
 950 {
 951         DBG("fini");
 952
 953         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
 954 }
 955
 956 /* need late_initcall() so we load after dss_driver's are loaded */
 957 late_initcall(omap_drm_init);
 958 module_exit(omap_drm_fini);
 959
 960 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
 961 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 962 MODULE_ALIAS("platform:" DRIVER_NAME);
 963 MODULE_LICENSE("GPL v2");