drivers/thermal/rockchip_thermal.c

   1 /*
   2  * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
   3  * Caesar Wang <wxt@rock-chips.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/delay.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/io.h>
  19 #include <linux/module.h>
  20 #include <linux/of.h>
  21 #include <linux/of_address.h>
  22 #include <linux/of_irq.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/regmap.h>
  25 #include <linux/reset.h>
  26 #include <linux/thermal.h>
  27 #include <linux/mfd/syscon.h>
  28 #include <linux/pinctrl/consumer.h>
  29
  30 /**
  31  * If the temperature over a period of time High,
  32  * the resulting TSHUT gave CRU module,let it reset the entire chip,
  33  * or via GPIO give PMIC.
  34  */
  35 enum tshut_mode {
  36         TSHUT_MODE_CRU = 0,
  37         TSHUT_MODE_GPIO,
  38 };
  39
  40 /**
  41  * The system Temperature Sensors tshut(tshut) polarity
  42  * the bit 8 is tshut polarity.
  43  * 0: low active, 1: high active
  44  */
  45 enum tshut_polarity {
  46         TSHUT_LOW_ACTIVE = 0,
  47         TSHUT_HIGH_ACTIVE,
  48 };
  49
  50 /**
  51  * The system has two Temperature Sensors.
  52  * sensor0 is for CPU, and sensor1 is for GPU.
  53  */
  54 enum sensor_id {
  55         SENSOR_CPU = 0,
  56         SENSOR_GPU,
  57 };
  58
  59 /**
  60  * The conversion table has the adc value and temperature.
  61  * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
  62  * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
  63  */
  64 enum adc_sort_mode {
  65         ADC_DECREMENT = 0,
  66         ADC_INCREMENT,
  67 };
  68
  69 /**
  70  * The max sensors is two in rockchip SoCs.
  71  * Two sensors: CPU and GPU sensor.
  72  */
  73 #define SOC_MAX_SENSORS 2
  74
  75 /**
  76  * struct chip_tsadc_table - hold information about chip-specific differences
  77  * @id: conversion table
  78  * @length: size of conversion table
  79  * @data_mask: mask to apply on data inputs
  80  * @mode: sort mode of this adc variant (incrementing or decrementing)
  81  */
  82 struct chip_tsadc_table {
  83         const struct tsadc_table *id;
  84         unsigned int length;
  85         u32 data_mask;
  86         enum adc_sort_mode mode;
  87 };
  88
  89 /**
  90  * struct rockchip_tsadc_chip - hold the private data of tsadc chip
  91  * @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel
  92  * @chn_num: the channel number of tsadc chip
  93  * @tshut_temp: the hardware-controlled shutdown temperature value
  94  * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
  95  * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
  96  * @initialize: SoC special initialize tsadc controller method
  97  * @irq_ack: clear the interrupt
  98  * @get_temp: get the temperature
  99  * @set_alarm_temp: set the high temperature interrupt
 100  * @set_tshut_temp: set the hardware-controlled shutdown temperature
 101  * @set_tshut_mode: set the hardware-controlled shutdown mode
 102  * @table: the chip-specific conversion table
 103  */
 104 struct rockchip_tsadc_chip {
 105         /* The sensor id of chip correspond to the ADC channel */
 106         int chn_id[SOC_MAX_SENSORS];
 107         int chn_num;
 108
 109         /* The hardware-controlled tshut property */
 110         int tshut_temp;
 111         enum tshut_mode tshut_mode;
 112         enum tshut_polarity tshut_polarity;
 113
 114         /* Chip-wide methods */
 115         void (*initialize)(struct regmap *grf,
 116                            void __iomem *reg, enum tshut_polarity p);
 117         void (*irq_ack)(void __iomem *reg);
 118         void (*control)(void __iomem *reg, bool on);
 119
 120         /* Per-sensor methods */
 121         int (*get_temp)(struct chip_tsadc_table table,
 122                         int chn, void __iomem *reg, int *temp);
 123         void (*set_alarm_temp)(struct chip_tsadc_table table,
 124                                int chn, void __iomem *reg, int temp);
 125         void (*set_tshut_temp)(struct chip_tsadc_table table,
 126                                int chn, void __iomem *reg, int temp);
 127         void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
 128
 129         /* Per-table methods */
 130         struct chip_tsadc_table table;
 131 };
 132
 133 /**
 134  * struct rockchip_thermal_sensor - hold the information of thermal sensor
 135  * @thermal:  pointer to the platform/configuration data
 136  * @tzd: pointer to a thermal zone
 137  * @id: identifier of the thermal sensor
 138  */
 139 struct rockchip_thermal_sensor {
 140         struct rockchip_thermal_data *thermal;
 141         struct thermal_zone_device *tzd;
 142         int id;
 143 };
 144
 145 /**
 146  * struct rockchip_thermal_data - hold the private data of thermal driver
 147  * @chip: pointer to the platform/configuration data
 148  * @pdev: platform device of thermal
 149  * @reset: the reset controller of tsadc
 150  * @sensors[SOC_MAX_SENSORS]: the thermal sensor
 151  * @clk: the controller clock is divided by the exteral 24MHz
 152  * @pclk: the advanced peripherals bus clock
 153  * @grf: the general register file will be used to do static set by software
 154  * @regs: the base address of tsadc controller
 155  * @tshut_temp: the hardware-controlled shutdown temperature value
 156  * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
 157  * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
 158  */
 159 struct rockchip_thermal_data {
 160         const struct rockchip_tsadc_chip *chip;
 161         struct platform_device *pdev;
 162         struct reset_control *reset;
 163
 164         struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
 165
 166         struct clk *clk;
 167         struct clk *pclk;
 168
 169         struct regmap *grf;
 170         void __iomem *regs;
 171
 172         int tshut_temp;
 173         enum tshut_mode tshut_mode;
 174         enum tshut_polarity tshut_polarity;
 175 };
 176
 177 /**
 178  * TSADC Sensor Register description:
 179  *
 180  * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
 181  * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
 182  *
 183  */
 184 #define TSADCV2_USER_CON                        0x00
 185 #define TSADCV2_AUTO_CON                        0x04
 186 #define TSADCV2_INT_EN                          0x08
 187 #define TSADCV2_INT_PD                          0x0c
 188 #define TSADCV2_DATA(chn)                       (0x20 + (chn) * 0x04)
 189 #define TSADCV2_COMP_INT(chn)                   (0x30 + (chn) * 0x04)
 190 #define TSADCV2_COMP_SHUT(chn)                  (0x40 + (chn) * 0x04)
 191 #define TSADCV2_HIGHT_INT_DEBOUNCE              0x60
 192 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE            0x64
 193 #define TSADCV2_AUTO_PERIOD                     0x68
 194 #define TSADCV2_AUTO_PERIOD_HT                  0x6c
 195
 196 #define TSADCV2_AUTO_EN                         BIT(0)
 197 #define TSADCV2_AUTO_SRC_EN(chn)                BIT(4 + (chn))
 198 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH        BIT(8)
 199
 200 #define TSADCV3_AUTO_Q_SEL_EN                   BIT(1)
 201
 202 #define TSADCV2_INT_SRC_EN(chn)                 BIT(chn)
 203 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn)          BIT(4 + (chn))
 204 #define TSADCV2_SHUT_2CRU_SRC_EN(chn)           BIT(8 + (chn))
 205
 206 #define TSADCV2_INT_PD_CLEAR_MASK               ~BIT(8)
 207 #define TSADCV3_INT_PD_CLEAR_MASK               ~BIT(16)
 208
 209 #define TSADCV2_DATA_MASK                       0xfff
 210 #define TSADCV3_DATA_MASK                       0x3ff
 211
 212 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT        4
 213 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT      4
 214 #define TSADCV2_AUTO_PERIOD_TIME                250 /* 250ms */
 215 #define TSADCV2_AUTO_PERIOD_HT_TIME             50  /* 50ms */
 216 #define TSADCV3_AUTO_PERIOD_TIME                1875 /* 2.5ms */
 217 #define TSADCV3_AUTO_PERIOD_HT_TIME             1875 /* 2.5ms */
 218
 219 #define TSADCV2_USER_INTER_PD_SOC               0x340 /* 13 clocks */
 220
 221 #define GRF_SARADC_TESTBIT                      0x0e644
 222 #define GRF_TSADC_TESTBIT_L                     0x0e648
 223 #define GRF_TSADC_TESTBIT_H                     0x0e64c
 224
 225 #define GRF_SARADC_TESTBIT_ON                   (0x10001 << 2)
 226 #define GRF_TSADC_TESTBIT_H_ON                  (0x10001 << 2)
 227 #define GRF_TSADC_VCM_EN_L                      (0x10001 << 7)
 228 #define GRF_TSADC_VCM_EN_H                      (0x10001 << 7)
 229
 230 /**
 231  * struct tsadc_table - code to temperature conversion table
 232  * @code: the value of adc channel
 233  * @temp: the temperature
 234  * Note:
 235  * code to temperature mapping of the temperature sensor is a piece wise linear
 236  * curve.Any temperature, code faling between to 2 give temperatures can be
 237  * linearly interpolated.
 238  * Code to Temperature mapping should be updated based on manufacturer results.
 239  */
 240 struct tsadc_table {
 241         u32 code;
 242         int temp;
 243 };
 244
 245 static const struct tsadc_table rk3228_code_table[] = {
 246         {0, -40000},
 247         {588, -40000},
 248         {593, -35000},
 249         {598, -30000},
 250         {603, -25000},
 251         {608, -20000},
 252         {613, -15000},
 253         {618, -10000},
 254         {623, -5000},
 255         {629, 0},
 256         {634, 5000},
 257         {639, 10000},
 258         {644, 15000},
 259         {649, 20000},
 260         {654, 25000},
 261         {660, 30000},
 262         {665, 35000},
 263         {670, 40000},
 264         {675, 45000},
 265         {681, 50000},
 266         {686, 55000},
 267         {691, 60000},
 268         {696, 65000},
 269         {702, 70000},
 270         {707, 75000},
 271         {712, 80000},
 272         {717, 85000},
 273         {723, 90000},
 274         {728, 95000},
 275         {733, 100000},
 276         {738, 105000},
 277         {744, 110000},
 278         {749, 115000},
 279         {754, 120000},
 280         {760, 125000},
 281         {TSADCV2_DATA_MASK, 125000},
 282 };
 283
 284 static const struct tsadc_table rk3288_code_table[] = {
 285         {TSADCV2_DATA_MASK, -40000},
 286         {3800, -40000},
 287         {3792, -35000},
 288         {3783, -30000},
 289         {3774, -25000},
 290         {3765, -20000},
 291         {3756, -15000},
 292         {3747, -10000},
 293         {3737, -5000},
 294         {3728, 0},
 295         {3718, 5000},
 296         {3708, 10000},
 297         {3698, 15000},
 298         {3688, 20000},
 299         {3678, 25000},
 300         {3667, 30000},
 301         {3656, 35000},
 302         {3645, 40000},
 303         {3634, 45000},
 304         {3623, 50000},
 305         {3611, 55000},
 306         {3600, 60000},
 307         {3588, 65000},
 308         {3575, 70000},
 309         {3563, 75000},
 310         {3550, 80000},
 311         {3537, 85000},
 312         {3524, 90000},
 313         {3510, 95000},
 314         {3496, 100000},
 315         {3482, 105000},
 316         {3467, 110000},
 317         {3452, 115000},
 318         {3437, 120000},
 319         {3421, 125000},
 320 };
 321
 322 static const struct tsadc_table rk3368_code_table[] = {
 323         {0, -40000},
 324         {106, -40000},
 325         {108, -35000},
 326         {110, -30000},
 327         {112, -25000},
 328         {114, -20000},
 329         {116, -15000},
 330         {118, -10000},
 331         {120, -5000},
 332         {122, 0},
 333         {124, 5000},
 334         {126, 10000},
 335         {128, 15000},
 336         {130, 20000},
 337         {132, 25000},
 338         {134, 30000},
 339         {136, 35000},
 340         {138, 40000},
 341         {140, 45000},
 342         {142, 50000},
 343         {144, 55000},
 344         {146, 60000},
 345         {148, 65000},
 346         {150, 70000},
 347         {152, 75000},
 348         {154, 80000},
 349         {156, 85000},
 350         {158, 90000},
 351         {160, 95000},
 352         {162, 100000},
 353         {163, 105000},
 354         {165, 110000},
 355         {167, 115000},
 356         {169, 120000},
 357         {171, 125000},
 358         {TSADCV3_DATA_MASK, 125000},
 359 };
 360
 361 static const struct tsadc_table rk3399_code_table[] = {
 362         {0, -40000},
 363         {402, -40000},
 364         {410, -35000},
 365         {419, -30000},
 366         {427, -25000},
 367         {436, -20000},
 368         {444, -15000},
 369         {453, -10000},
 370         {461, -5000},
 371         {470, 0},
 372         {478, 5000},
 373         {487, 10000},
 374         {496, 15000},
 375         {504, 20000},
 376         {513, 25000},
 377         {521, 30000},
 378         {530, 35000},
 379         {538, 40000},
 380         {547, 45000},
 381         {555, 50000},
 382         {564, 55000},
 383         {573, 60000},
 384         {581, 65000},
 385         {590, 70000},
 386         {599, 75000},
 387         {607, 80000},
 388         {616, 85000},
 389         {624, 90000},
 390         {633, 95000},
 391         {642, 100000},
 392         {650, 105000},
 393         {659, 110000},
 394         {668, 115000},
 395         {677, 120000},
 396         {685, 125000},
 397         {TSADCV3_DATA_MASK, 125000},
 398 };
 399
 400 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
 401                                    int temp)
 402 {
 403         int high, low, mid;
 404         u32 error = 0;
 405
 406         low = 0;
 407         high = table.length - 1;
 408         mid = (high + low) / 2;
 409
 410         /* Return mask code data when the temp is over table range */
 411         if (temp < table.id[low].temp || temp > table.id[high].temp) {
 412                 error = table.data_mask;
 413                 goto exit;
 414         }
 415
 416         while (low <= high) {
 417                 if (temp == table.id[mid].temp)
 418                         return table.id[mid].code;
 419                 else if (temp < table.id[mid].temp)
 420                         high = mid - 1;
 421                 else
 422                         low = mid + 1;
 423                 mid = (low + high) / 2;
 424         }
 425
 426 exit:
 427         pr_err("Invalid the conversion, error=%d\n", error);
 428         return error;
 429 }
 430
 431 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 432                                    int *temp)
 433 {
 434         unsigned int low = 1;
 435         unsigned int high = table.length - 1;
 436         unsigned int mid = (low + high) / 2;
 437         unsigned int num;
 438         unsigned long denom;
 439
 440         WARN_ON(table.length < 2);
 441
 442         switch (table.mode) {
 443         case ADC_DECREMENT:
 444                 code &= table.data_mask;
 445                 if (code < table.id[high].code)
 446                         return -EAGAIN;         /* Incorrect reading */
 447
 448                 while (low <= high) {
 449                         if (code >= table.id[mid].code &&
 450                             code < table.id[mid - 1].code)
 451                                 break;
 452                         else if (code < table.id[mid].code)
 453                                 low = mid + 1;
 454                         else
 455                                 high = mid - 1;
 456
 457                         mid = (low + high) / 2;
 458                 }
 459                 break;
 460         case ADC_INCREMENT:
 461                 code &= table.data_mask;
 462                 if (code < table.id[low].code)
 463                         return -EAGAIN;         /* Incorrect reading */
 464
 465                 while (low <= high) {
 466                         if (code <= table.id[mid].code &&
 467                             code > table.id[mid - 1].code)
 468                                 break;
 469                         else if (code > table.id[mid].code)
 470                                 low = mid + 1;
 471                         else
 472                                 high = mid - 1;
 473
 474                         mid = (low + high) / 2;
 475                 }
 476                 break;
 477         default:
 478                 pr_err("Invalid the conversion table\n");
 479         }
 480
 481         /*
 482          * The 5C granularity provided by the table is too much. Let's
 483          * assume that the relationship between sensor readings and
 484          * temperature between 2 table entries is linear and interpolate
 485          * to produce less granular result.
 486          */
 487         num = table.id[mid].temp - table.id[mid - 1].temp;
 488         num *= abs(table.id[mid - 1].code - code);
 489         denom = abs(table.id[mid - 1].code - table.id[mid].code);
 490         *temp = table.id[mid - 1].temp + (num / denom);
 491
 492         return 0;
 493 }
 494
 495 /**
 496  * rk_tsadcv2_initialize - initialize TASDC Controller.
 497  *
 498  * (1) Set TSADC_V2_AUTO_PERIOD:
 499  *     Configure the interleave between every two accessing of
 500  *     TSADC in normal operation.
 501  *
 502  * (2) Set TSADCV2_AUTO_PERIOD_HT:
 503  *     Configure the interleave between every two accessing of
 504  *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
 505  *
 506  * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
 507  *     If the temperature is higher than COMP_INT or COMP_SHUT for
 508  *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
 509  */
 510 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
 511                                   enum tshut_polarity tshut_polarity)
 512 {
 513         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 514                 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 515                                regs + TSADCV2_AUTO_CON);
 516         else
 517                 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 518                                regs + TSADCV2_AUTO_CON);
 519
 520         writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 521         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 522                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 523         writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 524                        regs + TSADCV2_AUTO_PERIOD_HT);
 525         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 526                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 527
 528         if (IS_ERR(grf)) {
 529                 pr_warn("%s: Missing rockchip,grf property\n", __func__);
 530                 return;
 531         }
 532 }
 533
 534 /**
 535  * rk_tsadcv3_initialize - initialize TASDC Controller.
 536  *
 537  * (1) The tsadc control power sequence.
 538  *
 539  * (2) Set TSADC_V2_AUTO_PERIOD:
 540  *     Configure the interleave between every two accessing of
 541  *     TSADC in normal operation.
 542  *
 543  * (2) Set TSADCV2_AUTO_PERIOD_HT:
 544  *     Configure the interleave between every two accessing of
 545  *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
 546  *
 547  * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
 548  *     If the temperature is higher than COMP_INT or COMP_SHUT for
 549  *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
 550  */
 551 static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
 552                                   enum tshut_polarity tshut_polarity)
 553 {
 554         /* The tsadc control power sequence */
 555         if (IS_ERR(grf)) {
 556                 /* Set interleave value to workround ic time sync issue */
 557                 writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
 558                                TSADCV2_USER_CON);
 559
 560                 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME,
 561                                regs + TSADCV2_AUTO_PERIOD);
 562                 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 563                                regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 564                 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 565                                regs + TSADCV2_AUTO_PERIOD_HT);
 566                 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 567                                regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 568
 569         } else {
 570                 /* Enable the voltage common mode feature */
 571                 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L);
 572                 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H);
 573
 574                 usleep_range(15, 100); /* The spec note says at least 15 us */
 575                 regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
 576                 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
 577                 usleep_range(90, 200); /* The spec note says at least 90 us */
 578
 579                 writel_relaxed(TSADCV3_AUTO_PERIOD_TIME,
 580                                regs + TSADCV2_AUTO_PERIOD);
 581                 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 582                                regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 583                 writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
 584                                regs + TSADCV2_AUTO_PERIOD_HT);
 585                 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 586                                regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 587         }
 588
 589         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 590                 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 591                                regs + TSADCV2_AUTO_CON);
 592         else
 593                 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 594                                regs + TSADCV2_AUTO_CON);
 595 }
 596
 597 static void rk_tsadcv2_irq_ack(void __iomem *regs)
 598 {
 599         u32 val;
 600
 601         val = readl_relaxed(regs + TSADCV2_INT_PD);
 602         writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 603 }
 604
 605 static void rk_tsadcv3_irq_ack(void __iomem *regs)
 606 {
 607         u32 val;
 608
 609         val = readl_relaxed(regs + TSADCV2_INT_PD);
 610         writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 611 }
 612
 613 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 614 {
 615         u32 val;
 616
 617         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 618         if (enable)
 619                 val |= TSADCV2_AUTO_EN;
 620         else
 621                 val &= ~TSADCV2_AUTO_EN;
 622
 623         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 624 }
 625
 626 /**
 627  * rk_tsadcv3_control - the tsadc controller is enabled or disabled.
 628  *
 629  * NOTE: TSADC controller works at auto mode, and some SoCs need set the
 630  * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output
 631  * adc value if setting this bit to enable.
 632  */
 633 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
 634 {
 635         u32 val;
 636
 637         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 638         if (enable)
 639                 val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
 640         else
 641                 val &= ~TSADCV2_AUTO_EN;
 642
 643         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 644 }
 645
 646 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
 647                                int chn, void __iomem *regs, int *temp)
 648 {
 649         u32 val;
 650
 651         val = readl_relaxed(regs + TSADCV2_DATA(chn));
 652
 653         return rk_tsadcv2_code_to_temp(table, val, temp);
 654 }
 655
 656 static void rk_tsadcv2_alarm_temp(struct chip_tsadc_table table,
 657                                   int chn, void __iomem *regs, int temp)
 658 {
 659         u32 alarm_value, int_en;
 660
 661         /* Make sure the value is valid */
 662         alarm_value = rk_tsadcv2_temp_to_code(table, temp);
 663         if (alarm_value == table.data_mask)
 664                 return;
 665
 666         writel_relaxed(alarm_value & table.data_mask,
 667                        regs + TSADCV2_COMP_INT(chn));
 668
 669         int_en = readl_relaxed(regs + TSADCV2_INT_EN);
 670         int_en |= TSADCV2_INT_SRC_EN(chn);
 671         writel_relaxed(int_en, regs + TSADCV2_INT_EN);
 672 }
 673
 674 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
 675                                   int chn, void __iomem *regs, int temp)
 676 {
 677         u32 tshut_value, val;
 678
 679         /* Make sure the value is valid */
 680         tshut_value = rk_tsadcv2_temp_to_code(table, temp);
 681         if (tshut_value == table.data_mask)
 682                 return;
 683
 684         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 685
 686         /* TSHUT will be valid */
 687         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 688         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 689 }
 690
 691 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 692                                   enum tshut_mode mode)
 693 {
 694         u32 val;
 695
 696         val = readl_relaxed(regs + TSADCV2_INT_EN);
 697         if (mode == TSHUT_MODE_GPIO) {
 698                 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
 699                 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 700         } else {
 701                 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 702                 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
 703         }
 704
 705         writel_relaxed(val, regs + TSADCV2_INT_EN);
 706 }
 707
 708 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
 709         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 710         .chn_num = 1, /* one channel for tsadc */
 711
 712         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 713         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 714         .tshut_temp = 95000,
 715
 716         .initialize = rk_tsadcv2_initialize,
 717         .irq_ack = rk_tsadcv3_irq_ack,
 718         .control = rk_tsadcv3_control,
 719         .get_temp = rk_tsadcv2_get_temp,
 720         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 721         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 722         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 723
 724         .table = {
 725                 .id = rk3228_code_table,
 726                 .length = ARRAY_SIZE(rk3228_code_table),
 727                 .data_mask = TSADCV3_DATA_MASK,
 728                 .mode = ADC_INCREMENT,
 729         },
 730 };
 731
 732 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 733         .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
 734         .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
 735         .chn_num = 2, /* two channels for tsadc */
 736
 737         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 738         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 739         .tshut_temp = 95000,
 740
 741         .initialize = rk_tsadcv2_initialize,
 742         .irq_ack = rk_tsadcv2_irq_ack,
 743         .control = rk_tsadcv2_control,
 744         .get_temp = rk_tsadcv2_get_temp,
 745         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 746         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 747         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 748
 749         .table = {
 750                 .id = rk3288_code_table,
 751                 .length = ARRAY_SIZE(rk3288_code_table),
 752                 .data_mask = TSADCV2_DATA_MASK,
 753                 .mode = ADC_DECREMENT,
 754         },
 755 };
 756
 757 static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
 758         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 759         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 760         .chn_num = 2, /* two channels for tsadc */
 761
 762         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 763         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 764         .tshut_temp = 95000,
 765
 766         .initialize = rk_tsadcv3_initialize,
 767         .irq_ack = rk_tsadcv3_irq_ack,
 768         .control = rk_tsadcv3_control,
 769         .get_temp = rk_tsadcv2_get_temp,
 770         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 771         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 772         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 773
 774         .table = {
 775                 .id = rk3228_code_table,
 776                 .length = ARRAY_SIZE(rk3228_code_table),
 777                 .data_mask = TSADCV3_DATA_MASK,
 778                 .mode = ADC_INCREMENT,
 779         },
 780 };
 781
 782 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 783         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 784         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 785         .chn_num = 2, /* two channels for tsadc */
 786
 787         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 788         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 789         .tshut_temp = 95000,
 790
 791         .initialize = rk_tsadcv2_initialize,
 792         .irq_ack = rk_tsadcv2_irq_ack,
 793         .control = rk_tsadcv2_control,
 794         .get_temp = rk_tsadcv2_get_temp,
 795         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 796         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 797         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 798
 799         .table = {
 800                 .id = rk3368_code_table,
 801                 .length = ARRAY_SIZE(rk3368_code_table),
 802                 .data_mask = TSADCV3_DATA_MASK,
 803                 .mode = ADC_INCREMENT,
 804         },
 805 };
 806
 807 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
 808         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 809         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 810         .chn_num = 2, /* two channels for tsadc */
 811
 812         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 813         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 814         .tshut_temp = 95000,
 815
 816         .initialize = rk_tsadcv3_initialize,
 817         .irq_ack = rk_tsadcv3_irq_ack,
 818         .control = rk_tsadcv3_control,
 819         .get_temp = rk_tsadcv2_get_temp,
 820         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 821         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 822         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 823
 824         .table = {
 825                 .id = rk3399_code_table,
 826                 .length = ARRAY_SIZE(rk3399_code_table),
 827                 .data_mask = TSADCV3_DATA_MASK,
 828                 .mode = ADC_INCREMENT,
 829         },
 830 };
 831
 832 static const struct of_device_id of_rockchip_thermal_match[] = {
 833         {
 834                 .compatible = "rockchip,rk3228-tsadc",
 835                 .data = (void *)&rk3228_tsadc_data,
 836         },
 837         {
 838                 .compatible = "rockchip,rk3288-tsadc",
 839                 .data = (void *)&rk3288_tsadc_data,
 840         },
 841         {
 842                 .compatible = "rockchip,rk3366-tsadc",
 843                 .data = (void *)&rk3366_tsadc_data,
 844         },
 845         {
 846                 .compatible = "rockchip,rk3368-tsadc",
 847                 .data = (void *)&rk3368_tsadc_data,
 848         },
 849         {
 850                 .compatible = "rockchip,rk3399-tsadc",
 851                 .data = (void *)&rk3399_tsadc_data,
 852         },
 853         { /* end */ },
 854 };
 855 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
 856
 857 static void
 858 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
 859 {
 860         struct thermal_zone_device *tzd = sensor->tzd;
 861
 862         tzd->ops->set_mode(tzd,
 863                 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
 864 }
 865
 866 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 867 {
 868         struct rockchip_thermal_data *thermal = dev;
 869         int i;
 870
 871         dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
 872
 873         thermal->chip->irq_ack(thermal->regs);
 874
 875         for (i = 0; i < thermal->chip->chn_num; i++)
 876                 thermal_zone_device_update(thermal->sensors[i].tzd,
 877                                            THERMAL_EVENT_UNSPECIFIED);
 878
 879         return IRQ_HANDLED;
 880 }
 881
 882 static int rockchip_thermal_set_trips(void *_sensor, int low, int high)
 883 {
 884         struct rockchip_thermal_sensor *sensor = _sensor;
 885         struct rockchip_thermal_data *thermal = sensor->thermal;
 886         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 887
 888         dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n",
 889                 __func__, sensor->id, low, high);
 890
 891         tsadc->set_alarm_temp(tsadc->table,
 892                               sensor->id, thermal->regs, high);
 893
 894         return 0;
 895 }
 896
 897 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
 898 {
 899         struct rockchip_thermal_sensor *sensor = _sensor;
 900         struct rockchip_thermal_data *thermal = sensor->thermal;
 901         const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
 902         int retval;
 903
 904         retval = tsadc->get_temp(tsadc->table,
 905                                  sensor->id, thermal->regs, out_temp);
 906         dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
 907                 sensor->id, *out_temp, retval);
 908
 909         return retval;
 910 }
 911
 912 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
 913         .get_temp = rockchip_thermal_get_temp,
 914         .set_trips = rockchip_thermal_set_trips,
 915 };
 916
 917 static int rockchip_configure_from_dt(struct device *dev,
 918                                       struct device_node *np,
 919                                       struct rockchip_thermal_data *thermal)
 920 {
 921         u32 shut_temp, tshut_mode, tshut_polarity;
 922
 923         if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
 924                 dev_warn(dev,
 925                          "Missing tshut temp property, using default %d\n",
 926                          thermal->chip->tshut_temp);
 927                 thermal->tshut_temp = thermal->chip->tshut_temp;
 928         } else {
 929                 if (shut_temp > INT_MAX) {
 930                         dev_err(dev, "Invalid tshut temperature specified: %d\n",
 931                                 shut_temp);
 932                         return -ERANGE;
 933                 }
 934                 thermal->tshut_temp = shut_temp;
 935         }
 936
 937         if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
 938                 dev_warn(dev,
 939                          "Missing tshut mode property, using default (%s)\n",
 940                          thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
 941                                 "gpio" : "cru");
 942                 thermal->tshut_mode = thermal->chip->tshut_mode;
 943         } else {
 944                 thermal->tshut_mode = tshut_mode;
 945         }
 946
 947         if (thermal->tshut_mode > 1) {
 948                 dev_err(dev, "Invalid tshut mode specified: %d\n",
 949                         thermal->tshut_mode);
 950                 return -EINVAL;
 951         }
 952
 953         if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
 954                                  &tshut_polarity)) {
 955                 dev_warn(dev,
 956                          "Missing tshut-polarity property, using default (%s)\n",
 957                          thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
 958                                 "low" : "high");
 959                 thermal->tshut_polarity = thermal->chip->tshut_polarity;
 960         } else {
 961                 thermal->tshut_polarity = tshut_polarity;
 962         }
 963
 964         if (thermal->tshut_polarity > 1) {
 965                 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
 966                         thermal->tshut_polarity);
 967                 return -EINVAL;
 968         }
 969
 970         /* The tsadc wont to handle the error in here since some SoCs didn't
 971          * need this property.
 972          */
 973         thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
 974
 975         return 0;
 976 }
 977
 978 static int
 979 rockchip_thermal_register_sensor(struct platform_device *pdev,
 980                                  struct rockchip_thermal_data *thermal,
 981                                  struct rockchip_thermal_sensor *sensor,
 982                                  int id)
 983 {
 984         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 985         int error;
 986
 987         tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
 988         tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
 989                               thermal->tshut_temp);
 990
 991         sensor->thermal = thermal;
 992         sensor->id = id;
 993         sensor->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, id,
 994                                         sensor, &rockchip_of_thermal_ops);
 995         if (IS_ERR(sensor->tzd)) {
 996                 error = PTR_ERR(sensor->tzd);
 997                 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
 998                         id, error);
 999                 return error;
1000         }
1001
1002         return 0;
1003 }
1004
1005 /**
1006  * Reset TSADC Controller, reset all tsadc registers.
1007  */
1008 static void rockchip_thermal_reset_controller(struct reset_control *reset)
1009 {
1010         reset_control_assert(reset);
1011         usleep_range(10, 20);
1012         reset_control_deassert(reset);
1013 }
1014
1015 static int rockchip_thermal_probe(struct platform_device *pdev)
1016 {
1017         struct device_node *np = pdev->dev.of_node;
1018         struct rockchip_thermal_data *thermal;
1019         const struct of_device_id *match;
1020         struct resource *res;
1021         int irq;
1022         int i;
1023         int error;
1024
1025         match = of_match_node(of_rockchip_thermal_match, np);
1026         if (!match)
1027                 return -ENXIO;
1028
1029         irq = platform_get_irq(pdev, 0);
1030         if (irq < 0) {
1031                 dev_err(&pdev->dev, "no irq resource?\n");
1032                 return -EINVAL;
1033         }
1034
1035         thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
1036                                GFP_KERNEL);
1037         if (!thermal)
1038                 return -ENOMEM;
1039
1040         thermal->pdev = pdev;
1041
1042         thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
1043         if (!thermal->chip)
1044                 return -EINVAL;
1045
1046         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1047         thermal->regs = devm_ioremap_resource(&pdev->dev, res);
1048         if (IS_ERR(thermal->regs))
1049                 return PTR_ERR(thermal->regs);
1050
1051         thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
1052         if (IS_ERR(thermal->reset)) {
1053                 error = PTR_ERR(thermal->reset);
1054                 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
1055                 return error;
1056         }
1057
1058         thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1059         if (IS_ERR(thermal->clk)) {
1060                 error = PTR_ERR(thermal->clk);
1061                 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1062                 return error;
1063         }
1064
1065         thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1066         if (IS_ERR(thermal->pclk)) {
1067                 error = PTR_ERR(thermal->pclk);
1068                 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1069                         error);
1070                 return error;
1071         }
1072
1073         error = clk_prepare_enable(thermal->clk);
1074         if (error) {
1075                 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
1076                         error);
1077                 return error;
1078         }
1079
1080         error = clk_prepare_enable(thermal->pclk);
1081         if (error) {
1082                 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1083                 goto err_disable_clk;
1084         }
1085
1086         rockchip_thermal_reset_controller(thermal->reset);
1087
1088         error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1089         if (error) {
1090                 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1091                         error);
1092                 goto err_disable_pclk;
1093         }
1094
1095         thermal->chip->initialize(thermal->grf, thermal->regs,
1096                                   thermal->tshut_polarity);
1097
1098         for (i = 0; i < thermal->chip->chn_num; i++) {
1099                 error = rockchip_thermal_register_sensor(pdev, thermal,
1100                                                 &thermal->sensors[i],
1101                                                 thermal->chip->chn_id[i]);
1102                 if (error) {
1103                         dev_err(&pdev->dev,
1104                                 "failed to register sensor[%d] : error = %d\n",
1105                                 i, error);
1106                         goto err_disable_pclk;
1107                 }
1108         }
1109
1110         error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1111                                           &rockchip_thermal_alarm_irq_thread,
1112                                           IRQF_ONESHOT,
1113                                           "rockchip_thermal", thermal);
1114         if (error) {
1115                 dev_err(&pdev->dev,
1116                         "failed to request tsadc irq: %d\n", error);
1117                 goto err_disable_pclk;
1118         }
1119
1120         thermal->chip->control(thermal->regs, true);
1121
1122         for (i = 0; i < thermal->chip->chn_num; i++)
1123                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1124
1125         platform_set_drvdata(pdev, thermal);
1126
1127         return 0;
1128
1129 err_disable_pclk:
1130         clk_disable_unprepare(thermal->pclk);
1131 err_disable_clk:
1132         clk_disable_unprepare(thermal->clk);
1133
1134         return error;
1135 }
1136
1137 static int rockchip_thermal_remove(struct platform_device *pdev)
1138 {
1139         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1140         int i;
1141
1142         for (i = 0; i < thermal->chip->chn_num; i++) {
1143                 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1144
1145                 rockchip_thermal_toggle_sensor(sensor, false);
1146         }
1147
1148         thermal->chip->control(thermal->regs, false);
1149
1150         clk_disable_unprepare(thermal->pclk);
1151         clk_disable_unprepare(thermal->clk);
1152
1153         return 0;
1154 }
1155
1156 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1157 {
1158         struct platform_device *pdev = to_platform_device(dev);
1159         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1160         int i;
1161
1162         for (i = 0; i < thermal->chip->chn_num; i++)
1163                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1164
1165         thermal->chip->control(thermal->regs, false);
1166
1167         clk_disable(thermal->pclk);
1168         clk_disable(thermal->clk);
1169
1170         pinctrl_pm_select_sleep_state(dev);
1171
1172         return 0;
1173 }
1174
1175 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1176 {
1177         struct platform_device *pdev = to_platform_device(dev);
1178         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1179         int i;
1180         int error;
1181
1182         error = clk_enable(thermal->clk);
1183         if (error)
1184                 return error;
1185
1186         error = clk_enable(thermal->pclk);
1187         if (error) {
1188                 clk_disable(thermal->clk);
1189                 return error;
1190         }
1191
1192         rockchip_thermal_reset_controller(thermal->reset);
1193
1194         thermal->chip->initialize(thermal->grf, thermal->regs,
1195                                   thermal->tshut_polarity);
1196
1197         for (i = 0; i < thermal->chip->chn_num; i++) {
1198                 int id = thermal->sensors[i].id;
1199
1200                 thermal->chip->set_tshut_mode(id, thermal->regs,
1201                                               thermal->tshut_mode);
1202                 thermal->chip->set_tshut_temp(thermal->chip->table,
1203                                               id, thermal->regs,
1204                                               thermal->tshut_temp);
1205         }
1206
1207         thermal->chip->control(thermal->regs, true);
1208
1209         for (i = 0; i < thermal->chip->chn_num; i++)
1210                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1211
1212         pinctrl_pm_select_default_state(dev);
1213
1214         return 0;
1215 }
1216
1217 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1218                          rockchip_thermal_suspend, rockchip_thermal_resume);
1219
1220 static struct platform_driver rockchip_thermal_driver = {
1221         .driver = {
1222                 .name = "rockchip-thermal",
1223                 .pm = &rockchip_thermal_pm_ops,
1224                 .of_match_table = of_rockchip_thermal_match,
1225         },
1226         .probe = rockchip_thermal_probe,
1227         .remove = rockchip_thermal_remove,
1228 };
1229
1230 module_platform_driver(rockchip_thermal_driver);
1231
1232 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1233 MODULE_AUTHOR("Rockchip, Inc.");
1234 MODULE_LICENSE("GPL v2");
1235 MODULE_ALIAS("platform:rockchip-thermal");