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jme: Do not enable NIC WoL functions on S0
[linux/fpc-iii.git] / drivers / hwmon / nct6775.c
blob5ce32bbc41eb750ded2e880541120461c41acebe
1 /*
2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
4 *
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
6 *
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
14 *
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 *
33 * Supports the following chips:
34 *
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
41 *
42 * #temp lists the number of monitored temperature sources (first value) plus
43 * the number of directly connectable temperature sensors (second value).
44 */
45
46 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
47
48 #include <linux/module.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/jiffies.h>
52 #include <linux/platform_device.h>
53 #include <linux/hwmon.h>
54 #include <linux/hwmon-sysfs.h>
55 #include <linux/hwmon-vid.h>
56 #include <linux/err.h>
57 #include <linux/mutex.h>
58 #include <linux/acpi.h>
59 #include <linux/io.h>
60 #include "lm75.h"
61
62 #define USE_ALTERNATE
63
64 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791 };
65
66 /* used to set data->name = nct6775_device_names[data->sio_kind] */
67 static const char * const nct6775_device_names[] = {
68 "nct6106",
69 "nct6775",
70 "nct6776",
71 "nct6779",
72 "nct6791",
73 };
74
75 static unsigned short force_id;
76 module_param(force_id, ushort, 0);
77 MODULE_PARM_DESC(force_id, "Override the detected device ID");
78
79 static unsigned short fan_debounce;
80 module_param(fan_debounce, ushort, 0);
81 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
82
83 #define DRVNAME "nct6775"
84
85 /*
86 * Super-I/O constants and functions
87 */
88
89 #define NCT6775_LD_ACPI 0x0a
90 #define NCT6775_LD_HWM 0x0b
91 #define NCT6775_LD_VID 0x0d
92
93 #define SIO_REG_LDSEL 0x07 /* Logical device select */
94 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
95 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
96 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
97
98 #define SIO_NCT6106_ID 0xc450
99 #define SIO_NCT6775_ID 0xb470
100 #define SIO_NCT6776_ID 0xc330
101 #define SIO_NCT6779_ID 0xc560
102 #define SIO_NCT6791_ID 0xc800
103 #define SIO_ID_MASK 0xFFF0
104
105 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
106
107 static inline void
108 superio_outb(int ioreg, int reg, int val)
109 {
110 outb(reg, ioreg);
111 outb(val, ioreg + 1);
112 }
113
114 static inline int
115 superio_inb(int ioreg, int reg)
116 {
117 outb(reg, ioreg);
118 return inb(ioreg + 1);
119 }
120
121 static inline void
122 superio_select(int ioreg, int ld)
123 {
124 outb(SIO_REG_LDSEL, ioreg);
125 outb(ld, ioreg + 1);
126 }
127
128 static inline int
129 superio_enter(int ioreg)
130 {
131 /*
132 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
133 */
134 if (!request_muxed_region(ioreg, 2, DRVNAME))
135 return -EBUSY;
136
137 outb(0x87, ioreg);
138 outb(0x87, ioreg);
139
140 return 0;
141 }
142
143 static inline void
144 superio_exit(int ioreg)
145 {
146 outb(0xaa, ioreg);
147 outb(0x02, ioreg);
148 outb(0x02, ioreg + 1);
149 release_region(ioreg, 2);
150 }
151
152 /*
153 * ISA constants
154 */
155
156 #define IOREGION_ALIGNMENT (~7)
157 #define IOREGION_OFFSET 5
158 #define IOREGION_LENGTH 2
159 #define ADDR_REG_OFFSET 0
160 #define DATA_REG_OFFSET 1
161
162 #define NCT6775_REG_BANK 0x4E
163 #define NCT6775_REG_CONFIG 0x40
164
165 /*
166 * Not currently used:
167 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
168 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
169 * REG_MAN_ID is at port 0x4f
170 * REG_CHIP_ID is at port 0x58
171 */
172
173 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
174 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
175
176 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
177 #define NUM_REG_BEEP 5 /* Max number of beep registers */
178
179 #define NUM_FAN 6
180
181 /* Common and NCT6775 specific data */
182
183 /* Voltage min/max registers for nr=7..14 are in bank 5 */
184
185 static const u16 NCT6775_REG_IN_MAX[] = {
186 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
187 0x55c, 0x55e, 0x560, 0x562 };
188 static const u16 NCT6775_REG_IN_MIN[] = {
189 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
190 0x55d, 0x55f, 0x561, 0x563 };
191 static const u16 NCT6775_REG_IN[] = {
192 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
193 };
194
195 #define NCT6775_REG_VBAT 0x5D
196 #define NCT6775_REG_DIODE 0x5E
197 #define NCT6775_DIODE_MASK 0x02
198
199 #define NCT6775_REG_FANDIV1 0x506
200 #define NCT6775_REG_FANDIV2 0x507
201
202 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
203
204 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
205
206 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
207
208 static const s8 NCT6775_ALARM_BITS[] = {
209 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
210 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
211 -1, /* unused */
212 6, 7, 11, -1, -1, /* fan1..fan5 */
213 -1, -1, -1, /* unused */
214 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
215 12, -1 }; /* intrusion0, intrusion1 */
216
217 #define FAN_ALARM_BASE 16
218 #define TEMP_ALARM_BASE 24
219 #define INTRUSION_ALARM_BASE 30
220
221 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
222
223 /*
224 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
225 * 30..31 intrusion
226 */
227 static const s8 NCT6775_BEEP_BITS[] = {
228 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
229 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
230 21, /* global beep enable */
231 6, 7, 11, 28, -1, /* fan1..fan5 */
232 -1, -1, -1, /* unused */
233 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
234 12, -1 }; /* intrusion0, intrusion1 */
235
236 #define BEEP_ENABLE_BASE 15
237
238 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
239 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
240
241 /* DC or PWM output fan configuration */
242 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
243 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
244
245 /* Advanced Fan control, some values are common for all fans */
246
247 static const u16 NCT6775_REG_TARGET[] = {
248 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
249 static const u16 NCT6775_REG_FAN_MODE[] = {
250 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
251 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
252 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
253 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
254 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
255 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
256 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
257 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
258 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
259 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
260 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
261
262 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
263 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
264 static const u16 NCT6775_REG_PWM[] = {
265 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
266 static const u16 NCT6775_REG_PWM_READ[] = {
267 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
268
269 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
270 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
271 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
272 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
273
274 static const u16 NCT6775_REG_TEMP[] = {
275 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
276
277 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
278
279 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
280 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
281 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
282 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
283 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
284 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
285
286 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
287 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
288
289 static const u16 NCT6775_REG_TEMP_SEL[] = {
290 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
291
292 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
293 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
294 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
295 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
296 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
297 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
298 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
299 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
300 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
301 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
302
303 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
304
305 static const u16 NCT6775_REG_AUTO_TEMP[] = {
306 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
307 static const u16 NCT6775_REG_AUTO_PWM[] = {
308 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
309
310 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
311 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
312
313 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
314
315 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
316 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
317 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
318 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
319
320 static const char *const nct6775_temp_label[] = {
321 "",
322 "SYSTIN",
323 "CPUTIN",
324 "AUXTIN",
325 "AMD SB-TSI",
326 "PECI Agent 0",
327 "PECI Agent 1",
328 "PECI Agent 2",
329 "PECI Agent 3",
330 "PECI Agent 4",
331 "PECI Agent 5",
332 "PECI Agent 6",
333 "PECI Agent 7",
334 "PCH_CHIP_CPU_MAX_TEMP",
335 "PCH_CHIP_TEMP",
336 "PCH_CPU_TEMP",
337 "PCH_MCH_TEMP",
338 "PCH_DIM0_TEMP",
339 "PCH_DIM1_TEMP",
340 "PCH_DIM2_TEMP",
341 "PCH_DIM3_TEMP"
342 };
343
344 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
345 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
346
347 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
348 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
349 0xa07 };
350
351 /* NCT6776 specific data */
352
353 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
354 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
355 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
356
357 static const s8 NCT6776_ALARM_BITS[] = {
358 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
359 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
360 -1, /* unused */
361 6, 7, 11, 10, 23, /* fan1..fan5 */
362 -1, -1, -1, /* unused */
363 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
364 12, 9 }; /* intrusion0, intrusion1 */
365
366 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
367
368 static const s8 NCT6776_BEEP_BITS[] = {
369 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
370 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
371 24, /* global beep enable */
372 25, 26, 27, 28, 29, /* fan1..fan5 */
373 -1, -1, -1, /* unused */
374 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
375 30, 31 }; /* intrusion0, intrusion1 */
376
377 static const u16 NCT6776_REG_TOLERANCE_H[] = {
378 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
379
380 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
381 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
382
383 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
384 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
385
386 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
387 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
388
389 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
390 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
391
392 static const char *const nct6776_temp_label[] = {
393 "",
394 "SYSTIN",
395 "CPUTIN",
396 "AUXTIN",
397 "SMBUSMASTER 0",
398 "SMBUSMASTER 1",
399 "SMBUSMASTER 2",
400 "SMBUSMASTER 3",
401 "SMBUSMASTER 4",
402 "SMBUSMASTER 5",
403 "SMBUSMASTER 6",
404 "SMBUSMASTER 7",
405 "PECI Agent 0",
406 "PECI Agent 1",
407 "PCH_CHIP_CPU_MAX_TEMP",
408 "PCH_CHIP_TEMP",
409 "PCH_CPU_TEMP",
410 "PCH_MCH_TEMP",
411 "PCH_DIM0_TEMP",
412 "PCH_DIM1_TEMP",
413 "PCH_DIM2_TEMP",
414 "PCH_DIM3_TEMP",
415 "BYTE_TEMP"
416 };
417
418 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
419 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
420
421 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
422 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
423
424 /* NCT6779 specific data */
425
426 static const u16 NCT6779_REG_IN[] = {
427 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
428 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
429
430 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
431 0x459, 0x45A, 0x45B, 0x568 };
432
433 static const s8 NCT6779_ALARM_BITS[] = {
434 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
435 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
436 -1, /* unused */
437 6, 7, 11, 10, 23, /* fan1..fan5 */
438 -1, -1, -1, /* unused */
439 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
440 12, 9 }; /* intrusion0, intrusion1 */
441
442 static const s8 NCT6779_BEEP_BITS[] = {
443 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
444 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
445 24, /* global beep enable */
446 25, 26, 27, 28, 29, /* fan1..fan5 */
447 -1, -1, -1, /* unused */
448 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
449 30, 31 }; /* intrusion0, intrusion1 */
450
451 static const u16 NCT6779_REG_FAN[] = {
452 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
453 static const u16 NCT6779_REG_FAN_PULSES[] = {
454 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
455
456 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
457 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
458 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
459 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
460 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
461
462 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
463 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
464 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
465 0x18, 0x152 };
466 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
467 0x3a, 0x153 };
468 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
469 0x39, 0x155 };
470
471 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
472 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
473
474 static const char *const nct6779_temp_label[] = {
475 "",
476 "SYSTIN",
477 "CPUTIN",
478 "AUXTIN0",
479 "AUXTIN1",
480 "AUXTIN2",
481 "AUXTIN3",
482 "",
483 "SMBUSMASTER 0",
484 "SMBUSMASTER 1",
485 "SMBUSMASTER 2",
486 "SMBUSMASTER 3",
487 "SMBUSMASTER 4",
488 "SMBUSMASTER 5",
489 "SMBUSMASTER 6",
490 "SMBUSMASTER 7",
491 "PECI Agent 0",
492 "PECI Agent 1",
493 "PCH_CHIP_CPU_MAX_TEMP",
494 "PCH_CHIP_TEMP",
495 "PCH_CPU_TEMP",
496 "PCH_MCH_TEMP",
497 "PCH_DIM0_TEMP",
498 "PCH_DIM1_TEMP",
499 "PCH_DIM2_TEMP",
500 "PCH_DIM3_TEMP",
501 "BYTE_TEMP"
502 };
503
504 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
505 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
506 0, 0, 0, 0, 0, 0, 0, 0,
507 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
508 0x408, 0 };
509
510 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
511 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
512
513 /* NCT6791 specific data */
514
515 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
516
517 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
518 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
519 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
520 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
521 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
522 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
523
524 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
525 0x459, 0x45A, 0x45B, 0x568, 0x45D };
526
527 static const s8 NCT6791_ALARM_BITS[] = {
528 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
529 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
530 -1, /* unused */
531 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
532 -1, -1, /* unused */
533 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
534 12, 9 }; /* intrusion0, intrusion1 */
535
536
537 /* NCT6102D/NCT6106D specific data */
538
539 #define NCT6106_REG_VBAT 0x318
540 #define NCT6106_REG_DIODE 0x319
541 #define NCT6106_DIODE_MASK 0x01
542
543 static const u16 NCT6106_REG_IN_MAX[] = {
544 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
545 static const u16 NCT6106_REG_IN_MIN[] = {
546 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
547 static const u16 NCT6106_REG_IN[] = {
548 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
549
550 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
551 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
552 static const u16 NCT6106_REG_TEMP_HYST[] = {
553 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
554 static const u16 NCT6106_REG_TEMP_OVER[] = {
555 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
556 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
557 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
558 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
559 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
560 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
561 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
562 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
563
564 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
565 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
566 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
567 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
568
569 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
570 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
571 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
572 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
573 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
574 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
575 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
576 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
577
578 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
579 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
580 0x11b, 0x12b, 0x13b };
581
582 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
583 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
584 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
585
586 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
587 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
588 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
589 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
590 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
591 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
592
593 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
594
595 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
596 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
597 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
598 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
599 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
600 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
601
602 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
603 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
604
605 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
606 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
607
608 static const s8 NCT6106_ALARM_BITS[] = {
609 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
610 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
611 -1, /* unused */
612 32, 33, 34, -1, -1, /* fan1..fan5 */
613 -1, -1, -1, /* unused */
614 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
615 48, -1 /* intrusion0, intrusion1 */
616 };
617
618 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
619 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
620
621 static const s8 NCT6106_BEEP_BITS[] = {
622 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
623 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
624 32, /* global beep enable */
625 24, 25, 26, 27, 28, /* fan1..fan5 */
626 -1, -1, -1, /* unused */
627 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
628 34, -1 /* intrusion0, intrusion1 */
629 };
630
631 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
632 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
633
634 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
635 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
636
637 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
638 {
639 if (mode == 0 && pwm == 255)
640 return off;
641 return mode + 1;
642 }
643
644 static int pwm_enable_to_reg(enum pwm_enable mode)
645 {
646 if (mode == off)
647 return 0;
648 return mode - 1;
649 }
650
651 /*
652 * Conversions
653 */
654
655 /* 1 is DC mode, output in ms */
656 static unsigned int step_time_from_reg(u8 reg, u8 mode)
657 {
658 return mode ? 400 * reg : 100 * reg;
659 }
660
661 static u8 step_time_to_reg(unsigned int msec, u8 mode)
662 {
663 return clamp_val((mode ? (msec + 200) / 400 :
664 (msec + 50) / 100), 1, 255);
665 }
666
667 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
668 {
669 if (reg == 0 || reg == 255)
670 return 0;
671 return 1350000U / (reg << divreg);
672 }
673
674 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
675 {
676 if ((reg & 0xff1f) == 0xff1f)
677 return 0;
678
679 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
680
681 if (reg == 0)
682 return 0;
683
684 return 1350000U / reg;
685 }
686
687 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
688 {
689 if (reg == 0 || reg == 0xffff)
690 return 0;
691
692 /*
693 * Even though the registers are 16 bit wide, the fan divisor
694 * still applies.
695 */
696 return 1350000U / (reg << divreg);
697 }
698
699 static u16 fan_to_reg(u32 fan, unsigned int divreg)
700 {
701 if (!fan)
702 return 0;
703
704 return (1350000U / fan) >> divreg;
705 }
706
707 static inline unsigned int
708 div_from_reg(u8 reg)
709 {
710 return 1 << reg;
711 }
712
713 /*
714 * Some of the voltage inputs have internal scaling, the tables below
715 * contain 8 (the ADC LSB in mV) * scaling factor * 100
716 */
717 static const u16 scale_in[15] = {
718 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
719 800, 800
720 };
721
722 static inline long in_from_reg(u8 reg, u8 nr)
723 {
724 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
725 }
726
727 static inline u8 in_to_reg(u32 val, u8 nr)
728 {
729 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
730 }
731
732 /*
733 * Data structures and manipulation thereof
734 */
735
736 struct nct6775_data {
737 int addr; /* IO base of hw monitor block */
738 int sioreg; /* SIO register address */
739 enum kinds kind;
740 const char *name;
741
742 int num_attr_groups;
743 const struct attribute_group *groups[6];
744
745 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
746 * 3=temp_crit, 4=temp_lcrit
747 */
748 u8 temp_src[NUM_TEMP];
749 u16 reg_temp_config[NUM_TEMP];
750 const char * const *temp_label;
751 int temp_label_num;
752
753 u16 REG_CONFIG;
754 u16 REG_VBAT;
755 u16 REG_DIODE;
756 u8 DIODE_MASK;
757
758 const s8 *ALARM_BITS;
759 const s8 *BEEP_BITS;
760
761 const u16 *REG_VIN;
762 const u16 *REG_IN_MINMAX[2];
763
764 const u16 *REG_TARGET;
765 const u16 *REG_FAN;
766 const u16 *REG_FAN_MODE;
767 const u16 *REG_FAN_MIN;
768 const u16 *REG_FAN_PULSES;
769 const u16 *FAN_PULSE_SHIFT;
770 const u16 *REG_FAN_TIME[3];
771
772 const u16 *REG_TOLERANCE_H;
773
774 const u8 *REG_PWM_MODE;
775 const u8 *PWM_MODE_MASK;
776
777 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
778 * [3]=pwm_max, [4]=pwm_step,
779 * [5]=weight_duty_step, [6]=weight_duty_base
780 */
781 const u16 *REG_PWM_READ;
782
783 const u16 *REG_CRITICAL_PWM_ENABLE;
784 u8 CRITICAL_PWM_ENABLE_MASK;
785 const u16 *REG_CRITICAL_PWM;
786
787 const u16 *REG_AUTO_TEMP;
788 const u16 *REG_AUTO_PWM;
789
790 const u16 *REG_CRITICAL_TEMP;
791 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
792
793 const u16 *REG_TEMP_SOURCE; /* temp register sources */
794 const u16 *REG_TEMP_SEL;
795 const u16 *REG_WEIGHT_TEMP_SEL;
796 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
797
798 const u16 *REG_TEMP_OFFSET;
799
800 const u16 *REG_ALARM;
801 const u16 *REG_BEEP;
802
803 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
804 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
805
806 struct mutex update_lock;
807 bool valid; /* true if following fields are valid */
808 unsigned long last_updated; /* In jiffies */
809
810 /* Register values */
811 u8 bank; /* current register bank */
812 u8 in_num; /* number of in inputs we have */
813 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
814 unsigned int rpm[NUM_FAN];
815 u16 fan_min[NUM_FAN];
816 u8 fan_pulses[NUM_FAN];
817 u8 fan_div[NUM_FAN];
818 u8 has_pwm;
819 u8 has_fan; /* some fan inputs can be disabled */
820 u8 has_fan_min; /* some fans don't have min register */
821 bool has_fan_div;
822
823 u8 num_temp_alarms; /* 2, 3, or 6 */
824 u8 num_temp_beeps; /* 2, 3, or 6 */
825 u8 temp_fixed_num; /* 3 or 6 */
826 u8 temp_type[NUM_TEMP_FIXED];
827 s8 temp_offset[NUM_TEMP_FIXED];
828 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
829 * 3=temp_crit, 4=temp_lcrit */
830 u64 alarms;
831 u64 beeps;
832
833 u8 pwm_num; /* number of pwm */
834 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
835 * 0->PWM variable duty cycle
836 */
837 enum pwm_enable pwm_enable[NUM_FAN];
838 /* 0->off
839 * 1->manual
840 * 2->thermal cruise mode (also called SmartFan I)
841 * 3->fan speed cruise mode
842 * 4->SmartFan III
843 * 5->enhanced variable thermal cruise (SmartFan IV)
844 */
845 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
846 * [3]=pwm_max, [4]=pwm_step,
847 * [5]=weight_duty_step, [6]=weight_duty_base
848 */
849
850 u8 target_temp[NUM_FAN];
851 u8 target_temp_mask;
852 u32 target_speed[NUM_FAN];
853 u32 target_speed_tolerance[NUM_FAN];
854 u8 speed_tolerance_limit;
855
856 u8 temp_tolerance[2][NUM_FAN];
857 u8 tolerance_mask;
858
859 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
860
861 /* Automatic fan speed control registers */
862 int auto_pwm_num;
863 u8 auto_pwm[NUM_FAN][7];
864 u8 auto_temp[NUM_FAN][7];
865 u8 pwm_temp_sel[NUM_FAN];
866 u8 pwm_weight_temp_sel[NUM_FAN];
867 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
868 * 2->temp_base
869 */
870
871 u8 vid;
872 u8 vrm;
873
874 bool have_vid;
875
876 u16 have_temp;
877 u16 have_temp_fixed;
878 u16 have_in;
879 #ifdef CONFIG_PM
880 /* Remember extra register values over suspend/resume */
881 u8 vbat;
882 u8 fandiv1;
883 u8 fandiv2;
884 #endif
885 };
886
887 struct nct6775_sio_data {
888 int sioreg;
889 enum kinds kind;
890 };
891
892 struct sensor_device_template {
893 struct device_attribute dev_attr;
894 union {
895 struct {
896 u8 nr;
897 u8 index;
898 } s;
899 int index;
900 } u;
901 bool s2; /* true if both index and nr are used */
902 };
903
904 struct sensor_device_attr_u {
905 union {
906 struct sensor_device_attribute a1;
907 struct sensor_device_attribute_2 a2;
908 } u;
909 char name[32];
910 };
911
912 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
913 .attr = {.name = _template, .mode = _mode }, \
914 .show = _show, \
915 .store = _store, \
916 }
917
918 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
919 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
920 .u.index = _index, \
921 .s2 = false }
922
923 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
924 _nr, _index) \
925 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
926 .u.s.index = _index, \
927 .u.s.nr = _nr, \
928 .s2 = true }
929
930 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
931 static struct sensor_device_template sensor_dev_template_##_name \
932 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
933 _index)
934
935 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
936 _nr, _index) \
937 static struct sensor_device_template sensor_dev_template_##_name \
938 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
939 _nr, _index)
940
941 struct sensor_template_group {
942 struct sensor_device_template **templates;
943 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
944 int base;
945 };
946
947 static struct attribute_group *
948 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
949 int repeat)
950 {
951 struct attribute_group *group;
952 struct sensor_device_attr_u *su;
953 struct sensor_device_attribute *a;
954 struct sensor_device_attribute_2 *a2;
955 struct attribute **attrs;
956 struct sensor_device_template **t;
957 int i, count;
958
959 if (repeat <= 0)
960 return ERR_PTR(-EINVAL);
961
962 t = tg->templates;
963 for (count = 0; *t; t++, count++)
964 ;
965
966 if (count == 0)
967 return ERR_PTR(-EINVAL);
968
969 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
970 if (group == NULL)
971 return ERR_PTR(-ENOMEM);
972
973 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
974 GFP_KERNEL);
975 if (attrs == NULL)
976 return ERR_PTR(-ENOMEM);
977
978 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
979 GFP_KERNEL);
980 if (su == NULL)
981 return ERR_PTR(-ENOMEM);
982
983 group->attrs = attrs;
984 group->is_visible = tg->is_visible;
985
986 for (i = 0; i < repeat; i++) {
987 t = tg->templates;
988 while (*t != NULL) {
989 snprintf(su->name, sizeof(su->name),
990 (*t)->dev_attr.attr.name, tg->base + i);
991 if ((*t)->s2) {
992 a2 = &su->u.a2;
993 sysfs_attr_init(&a2->dev_attr.attr);
994 a2->dev_attr.attr.name = su->name;
995 a2->nr = (*t)->u.s.nr + i;
996 a2->index = (*t)->u.s.index;
997 a2->dev_attr.attr.mode =
998 (*t)->dev_attr.attr.mode;
999 a2->dev_attr.show = (*t)->dev_attr.show;
1000 a2->dev_attr.store = (*t)->dev_attr.store;
1001 *attrs = &a2->dev_attr.attr;
1002 } else {
1003 a = &su->u.a1;
1004 sysfs_attr_init(&a->dev_attr.attr);
1005 a->dev_attr.attr.name = su->name;
1006 a->index = (*t)->u.index + i;
1007 a->dev_attr.attr.mode =
1008 (*t)->dev_attr.attr.mode;
1009 a->dev_attr.show = (*t)->dev_attr.show;
1010 a->dev_attr.store = (*t)->dev_attr.store;
1011 *attrs = &a->dev_attr.attr;
1012 }
1013 attrs++;
1014 su++;
1015 t++;
1016 }
1017 }
1018
1019 return group;
1020 }
1021
1022 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1023 {
1024 switch (data->kind) {
1025 case nct6106:
1026 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1027 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1028 reg == 0x111 || reg == 0x121 || reg == 0x131;
1029 case nct6775:
1030 return (((reg & 0xff00) == 0x100 ||
1031 (reg & 0xff00) == 0x200) &&
1032 ((reg & 0x00ff) == 0x50 ||
1033 (reg & 0x00ff) == 0x53 ||
1034 (reg & 0x00ff) == 0x55)) ||
1035 (reg & 0xfff0) == 0x630 ||
1036 reg == 0x640 || reg == 0x642 ||
1037 reg == 0x662 ||
1038 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1039 reg == 0x73 || reg == 0x75 || reg == 0x77;
1040 case nct6776:
1041 return (((reg & 0xff00) == 0x100 ||
1042 (reg & 0xff00) == 0x200) &&
1043 ((reg & 0x00ff) == 0x50 ||
1044 (reg & 0x00ff) == 0x53 ||
1045 (reg & 0x00ff) == 0x55)) ||
1046 (reg & 0xfff0) == 0x630 ||
1047 reg == 0x402 ||
1048 reg == 0x640 || reg == 0x642 ||
1049 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1050 reg == 0x73 || reg == 0x75 || reg == 0x77;
1051 case nct6779:
1052 case nct6791:
1053 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1054 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1055 reg == 0x402 ||
1056 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1057 reg == 0x640 || reg == 0x642 ||
1058 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1059 reg == 0x7b;
1060 }
1061 return false;
1062 }
1063
1064 /*
1065 * On older chips, only registers 0x50-0x5f are banked.
1066 * On more recent chips, all registers are banked.
1067 * Assume that is the case and set the bank number for each access.
1068 * Cache the bank number so it only needs to be set if it changes.
1069 */
1070 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1071 {
1072 u8 bank = reg >> 8;
1073 if (data->bank != bank) {
1074 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1075 outb_p(bank, data->addr + DATA_REG_OFFSET);
1076 data->bank = bank;
1077 }
1078 }
1079
1080 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1081 {
1082 int res, word_sized = is_word_sized(data, reg);
1083
1084 nct6775_set_bank(data, reg);
1085 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1086 res = inb_p(data->addr + DATA_REG_OFFSET);
1087 if (word_sized) {
1088 outb_p((reg & 0xff) + 1,
1089 data->addr + ADDR_REG_OFFSET);
1090 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1091 }
1092 return res;
1093 }
1094
1095 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1096 {
1097 int word_sized = is_word_sized(data, reg);
1098
1099 nct6775_set_bank(data, reg);
1100 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1101 if (word_sized) {
1102 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1103 outb_p((reg & 0xff) + 1,
1104 data->addr + ADDR_REG_OFFSET);
1105 }
1106 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1107 return 0;
1108 }
1109
1110 /* We left-align 8-bit temperature values to make the code simpler */
1111 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1112 {
1113 u16 res;
1114
1115 res = nct6775_read_value(data, reg);
1116 if (!is_word_sized(data, reg))
1117 res <<= 8;
1118
1119 return res;
1120 }
1121
1122 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1123 {
1124 if (!is_word_sized(data, reg))
1125 value >>= 8;
1126 return nct6775_write_value(data, reg, value);
1127 }
1128
1129 /* This function assumes that the caller holds data->update_lock */
1130 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1131 {
1132 u8 reg;
1133
1134 switch (nr) {
1135 case 0:
1136 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1137 | (data->fan_div[0] & 0x7);
1138 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1139 break;
1140 case 1:
1141 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1142 | ((data->fan_div[1] << 4) & 0x70);
1143 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1144 break;
1145 case 2:
1146 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1147 | (data->fan_div[2] & 0x7);
1148 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1149 break;
1150 case 3:
1151 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1152 | ((data->fan_div[3] << 4) & 0x70);
1153 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1154 break;
1155 }
1156 }
1157
1158 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1159 {
1160 if (data->kind == nct6775)
1161 nct6775_write_fan_div(data, nr);
1162 }
1163
1164 static void nct6775_update_fan_div(struct nct6775_data *data)
1165 {
1166 u8 i;
1167
1168 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1169 data->fan_div[0] = i & 0x7;
1170 data->fan_div[1] = (i & 0x70) >> 4;
1171 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1172 data->fan_div[2] = i & 0x7;
1173 if (data->has_fan & (1 << 3))
1174 data->fan_div[3] = (i & 0x70) >> 4;
1175 }
1176
1177 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1178 {
1179 if (data->kind == nct6775)
1180 nct6775_update_fan_div(data);
1181 }
1182
1183 static void nct6775_init_fan_div(struct nct6775_data *data)
1184 {
1185 int i;
1186
1187 nct6775_update_fan_div_common(data);
1188 /*
1189 * For all fans, start with highest divider value if the divider
1190 * register is not initialized. This ensures that we get a
1191 * reading from the fan count register, even if it is not optimal.
1192 * We'll compute a better divider later on.
1193 */
1194 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1195 if (!(data->has_fan & (1 << i)))
1196 continue;
1197 if (data->fan_div[i] == 0) {
1198 data->fan_div[i] = 7;
1199 nct6775_write_fan_div_common(data, i);
1200 }
1201 }
1202 }
1203
1204 static void nct6775_init_fan_common(struct device *dev,
1205 struct nct6775_data *data)
1206 {
1207 int i;
1208 u8 reg;
1209
1210 if (data->has_fan_div)
1211 nct6775_init_fan_div(data);
1212
1213 /*
1214 * If fan_min is not set (0), set it to 0xff to disable it. This
1215 * prevents the unnecessary warning when fanX_min is reported as 0.
1216 */
1217 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1218 if (data->has_fan_min & (1 << i)) {
1219 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1220 if (!reg)
1221 nct6775_write_value(data, data->REG_FAN_MIN[i],
1222 data->has_fan_div ? 0xff
1223 : 0xff1f);
1224 }
1225 }
1226 }
1227
1228 static void nct6775_select_fan_div(struct device *dev,
1229 struct nct6775_data *data, int nr, u16 reg)
1230 {
1231 u8 fan_div = data->fan_div[nr];
1232 u16 fan_min;
1233
1234 if (!data->has_fan_div)
1235 return;
1236
1237 /*
1238 * If we failed to measure the fan speed, or the reported value is not
1239 * in the optimal range, and the clock divider can be modified,
1240 * let's try that for next time.
1241 */
1242 if (reg == 0x00 && fan_div < 0x07)
1243 fan_div++;
1244 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1245 fan_div--;
1246
1247 if (fan_div != data->fan_div[nr]) {
1248 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1249 nr + 1, div_from_reg(data->fan_div[nr]),
1250 div_from_reg(fan_div));
1251
1252 /* Preserve min limit if possible */
1253 if (data->has_fan_min & (1 << nr)) {
1254 fan_min = data->fan_min[nr];
1255 if (fan_div > data->fan_div[nr]) {
1256 if (fan_min != 255 && fan_min > 1)
1257 fan_min >>= 1;
1258 } else {
1259 if (fan_min != 255) {
1260 fan_min <<= 1;
1261 if (fan_min > 254)
1262 fan_min = 254;
1263 }
1264 }
1265 if (fan_min != data->fan_min[nr]) {
1266 data->fan_min[nr] = fan_min;
1267 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1268 fan_min);
1269 }
1270 }
1271 data->fan_div[nr] = fan_div;
1272 nct6775_write_fan_div_common(data, nr);
1273 }
1274 }
1275
1276 static void nct6775_update_pwm(struct device *dev)
1277 {
1278 struct nct6775_data *data = dev_get_drvdata(dev);
1279 int i, j;
1280 int fanmodecfg, reg;
1281 bool duty_is_dc;
1282
1283 for (i = 0; i < data->pwm_num; i++) {
1284 if (!(data->has_pwm & (1 << i)))
1285 continue;
1286
1287 duty_is_dc = data->REG_PWM_MODE[i] &&
1288 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1289 & data->PWM_MODE_MASK[i]);
1290 data->pwm_mode[i] = duty_is_dc;
1291
1292 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1293 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1294 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1295 data->pwm[j][i]
1296 = nct6775_read_value(data,
1297 data->REG_PWM[j][i]);
1298 }
1299 }
1300
1301 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1302 (fanmodecfg >> 4) & 7);
1303
1304 if (!data->temp_tolerance[0][i] ||
1305 data->pwm_enable[i] != speed_cruise)
1306 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1307 if (!data->target_speed_tolerance[i] ||
1308 data->pwm_enable[i] == speed_cruise) {
1309 u8 t = fanmodecfg & 0x0f;
1310 if (data->REG_TOLERANCE_H) {
1311 t |= (nct6775_read_value(data,
1312 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1313 }
1314 data->target_speed_tolerance[i] = t;
1315 }
1316
1317 data->temp_tolerance[1][i] =
1318 nct6775_read_value(data,
1319 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1320
1321 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1322 data->pwm_temp_sel[i] = reg & 0x1f;
1323 /* If fan can stop, report floor as 0 */
1324 if (reg & 0x80)
1325 data->pwm[2][i] = 0;
1326
1327 if (!data->REG_WEIGHT_TEMP_SEL[i])
1328 continue;
1329
1330 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1331 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1332 /* If weight is disabled, report weight source as 0 */
1333 if (j == 1 && !(reg & 0x80))
1334 data->pwm_weight_temp_sel[i] = 0;
1335
1336 /* Weight temp data */
1337 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1338 data->weight_temp[j][i]
1339 = nct6775_read_value(data,
1340 data->REG_WEIGHT_TEMP[j][i]);
1341 }
1342 }
1343 }
1344
1345 static void nct6775_update_pwm_limits(struct device *dev)
1346 {
1347 struct nct6775_data *data = dev_get_drvdata(dev);
1348 int i, j;
1349 u8 reg;
1350 u16 reg_t;
1351
1352 for (i = 0; i < data->pwm_num; i++) {
1353 if (!(data->has_pwm & (1 << i)))
1354 continue;
1355
1356 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1357 data->fan_time[j][i] =
1358 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1359 }
1360
1361 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1362 /* Update only in matching mode or if never updated */
1363 if (!data->target_temp[i] ||
1364 data->pwm_enable[i] == thermal_cruise)
1365 data->target_temp[i] = reg_t & data->target_temp_mask;
1366 if (!data->target_speed[i] ||
1367 data->pwm_enable[i] == speed_cruise) {
1368 if (data->REG_TOLERANCE_H) {
1369 reg_t |= (nct6775_read_value(data,
1370 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1371 }
1372 data->target_speed[i] = reg_t;
1373 }
1374
1375 for (j = 0; j < data->auto_pwm_num; j++) {
1376 data->auto_pwm[i][j] =
1377 nct6775_read_value(data,
1378 NCT6775_AUTO_PWM(data, i, j));
1379 data->auto_temp[i][j] =
1380 nct6775_read_value(data,
1381 NCT6775_AUTO_TEMP(data, i, j));
1382 }
1383
1384 /* critical auto_pwm temperature data */
1385 data->auto_temp[i][data->auto_pwm_num] =
1386 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1387
1388 switch (data->kind) {
1389 case nct6775:
1390 reg = nct6775_read_value(data,
1391 NCT6775_REG_CRITICAL_ENAB[i]);
1392 data->auto_pwm[i][data->auto_pwm_num] =
1393 (reg & 0x02) ? 0xff : 0x00;
1394 break;
1395 case nct6776:
1396 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1397 break;
1398 case nct6106:
1399 case nct6779:
1400 case nct6791:
1401 reg = nct6775_read_value(data,
1402 data->REG_CRITICAL_PWM_ENABLE[i]);
1403 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1404 reg = nct6775_read_value(data,
1405 data->REG_CRITICAL_PWM[i]);
1406 else
1407 reg = 0xff;
1408 data->auto_pwm[i][data->auto_pwm_num] = reg;
1409 break;
1410 }
1411 }
1412 }
1413
1414 static struct nct6775_data *nct6775_update_device(struct device *dev)
1415 {
1416 struct nct6775_data *data = dev_get_drvdata(dev);
1417 int i, j;
1418
1419 mutex_lock(&data->update_lock);
1420
1421 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1422 || !data->valid) {
1423 /* Fan clock dividers */
1424 nct6775_update_fan_div_common(data);
1425
1426 /* Measured voltages and limits */
1427 for (i = 0; i < data->in_num; i++) {
1428 if (!(data->have_in & (1 << i)))
1429 continue;
1430
1431 data->in[i][0] = nct6775_read_value(data,
1432 data->REG_VIN[i]);
1433 data->in[i][1] = nct6775_read_value(data,
1434 data->REG_IN_MINMAX[0][i]);
1435 data->in[i][2] = nct6775_read_value(data,
1436 data->REG_IN_MINMAX[1][i]);
1437 }
1438
1439 /* Measured fan speeds and limits */
1440 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1441 u16 reg;
1442
1443 if (!(data->has_fan & (1 << i)))
1444 continue;
1445
1446 reg = nct6775_read_value(data, data->REG_FAN[i]);
1447 data->rpm[i] = data->fan_from_reg(reg,
1448 data->fan_div[i]);
1449
1450 if (data->has_fan_min & (1 << i))
1451 data->fan_min[i] = nct6775_read_value(data,
1452 data->REG_FAN_MIN[i]);
1453 data->fan_pulses[i] =
1454 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1455 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1456
1457 nct6775_select_fan_div(dev, data, i, reg);
1458 }
1459
1460 nct6775_update_pwm(dev);
1461 nct6775_update_pwm_limits(dev);
1462
1463 /* Measured temperatures and limits */
1464 for (i = 0; i < NUM_TEMP; i++) {
1465 if (!(data->have_temp & (1 << i)))
1466 continue;
1467 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1468 if (data->reg_temp[j][i])
1469 data->temp[j][i]
1470 = nct6775_read_temp(data,
1471 data->reg_temp[j][i]);
1472 }
1473 if (i >= NUM_TEMP_FIXED ||
1474 !(data->have_temp_fixed & (1 << i)))
1475 continue;
1476 data->temp_offset[i]
1477 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1478 }
1479
1480 data->alarms = 0;
1481 for (i = 0; i < NUM_REG_ALARM; i++) {
1482 u8 alarm;
1483 if (!data->REG_ALARM[i])
1484 continue;
1485 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1486 data->alarms |= ((u64)alarm) << (i << 3);
1487 }
1488
1489 data->beeps = 0;
1490 for (i = 0; i < NUM_REG_BEEP; i++) {
1491 u8 beep;
1492 if (!data->REG_BEEP[i])
1493 continue;
1494 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1495 data->beeps |= ((u64)beep) << (i << 3);
1496 }
1497
1498 data->last_updated = jiffies;
1499 data->valid = true;
1500 }
1501
1502 mutex_unlock(&data->update_lock);
1503 return data;
1504 }
1505
1506 /*
1507 * Sysfs callback functions
1508 */
1509 static ssize_t
1510 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1511 {
1512 struct nct6775_data *data = nct6775_update_device(dev);
1513 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1514 int nr = sattr->nr;
1515 int index = sattr->index;
1516 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1517 }
1518
1519 static ssize_t
1520 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1521 size_t count)
1522 {
1523 struct nct6775_data *data = dev_get_drvdata(dev);
1524 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1525 int nr = sattr->nr;
1526 int index = sattr->index;
1527 unsigned long val;
1528 int err = kstrtoul(buf, 10, &val);
1529 if (err < 0)
1530 return err;
1531 mutex_lock(&data->update_lock);
1532 data->in[nr][index] = in_to_reg(val, nr);
1533 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1534 data->in[nr][index]);
1535 mutex_unlock(&data->update_lock);
1536 return count;
1537 }
1538
1539 static ssize_t
1540 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1541 {
1542 struct nct6775_data *data = nct6775_update_device(dev);
1543 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1544 int nr = data->ALARM_BITS[sattr->index];
1545 return sprintf(buf, "%u\n",
1546 (unsigned int)((data->alarms >> nr) & 0x01));
1547 }
1548
1549 static int find_temp_source(struct nct6775_data *data, int index, int count)
1550 {
1551 int source = data->temp_src[index];
1552 int nr;
1553
1554 for (nr = 0; nr < count; nr++) {
1555 int src;
1556
1557 src = nct6775_read_value(data,
1558 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1559 if (src == source)
1560 return nr;
1561 }
1562 return -ENODEV;
1563 }
1564
1565 static ssize_t
1566 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1567 {
1568 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1569 struct nct6775_data *data = nct6775_update_device(dev);
1570 unsigned int alarm = 0;
1571 int nr;
1572
1573 /*
1574 * For temperatures, there is no fixed mapping from registers to alarm
1575 * bits. Alarm bits are determined by the temperature source mapping.
1576 */
1577 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1578 if (nr >= 0) {
1579 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1580 alarm = (data->alarms >> bit) & 0x01;
1581 }
1582 return sprintf(buf, "%u\n", alarm);
1583 }
1584
1585 static ssize_t
1586 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1587 {
1588 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1589 struct nct6775_data *data = nct6775_update_device(dev);
1590 int nr = data->BEEP_BITS[sattr->index];
1591
1592 return sprintf(buf, "%u\n",
1593 (unsigned int)((data->beeps >> nr) & 0x01));
1594 }
1595
1596 static ssize_t
1597 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1598 size_t count)
1599 {
1600 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1601 struct nct6775_data *data = dev_get_drvdata(dev);
1602 int nr = data->BEEP_BITS[sattr->index];
1603 int regindex = nr >> 3;
1604 unsigned long val;
1605
1606 int err = kstrtoul(buf, 10, &val);
1607 if (err < 0)
1608 return err;
1609 if (val > 1)
1610 return -EINVAL;
1611
1612 mutex_lock(&data->update_lock);
1613 if (val)
1614 data->beeps |= (1ULL << nr);
1615 else
1616 data->beeps &= ~(1ULL << nr);
1617 nct6775_write_value(data, data->REG_BEEP[regindex],
1618 (data->beeps >> (regindex << 3)) & 0xff);
1619 mutex_unlock(&data->update_lock);
1620 return count;
1621 }
1622
1623 static ssize_t
1624 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1625 {
1626 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1627 struct nct6775_data *data = nct6775_update_device(dev);
1628 unsigned int beep = 0;
1629 int nr;
1630
1631 /*
1632 * For temperatures, there is no fixed mapping from registers to beep
1633 * enable bits. Beep enable bits are determined by the temperature
1634 * source mapping.
1635 */
1636 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1637 if (nr >= 0) {
1638 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1639 beep = (data->beeps >> bit) & 0x01;
1640 }
1641 return sprintf(buf, "%u\n", beep);
1642 }
1643
1644 static ssize_t
1645 store_temp_beep(struct device *dev, struct device_attribute *attr,
1646 const char *buf, size_t count)
1647 {
1648 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1649 struct nct6775_data *data = dev_get_drvdata(dev);
1650 int nr, bit, regindex;
1651 unsigned long val;
1652
1653 int err = kstrtoul(buf, 10, &val);
1654 if (err < 0)
1655 return err;
1656 if (val > 1)
1657 return -EINVAL;
1658
1659 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1660 if (nr < 0)
1661 return nr;
1662
1663 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1664 regindex = bit >> 3;
1665
1666 mutex_lock(&data->update_lock);
1667 if (val)
1668 data->beeps |= (1ULL << bit);
1669 else
1670 data->beeps &= ~(1ULL << bit);
1671 nct6775_write_value(data, data->REG_BEEP[regindex],
1672 (data->beeps >> (regindex << 3)) & 0xff);
1673 mutex_unlock(&data->update_lock);
1674
1675 return count;
1676 }
1677
1678 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1679 struct attribute *attr, int index)
1680 {
1681 struct device *dev = container_of(kobj, struct device, kobj);
1682 struct nct6775_data *data = dev_get_drvdata(dev);
1683 int in = index / 5; /* voltage index */
1684
1685 if (!(data->have_in & (1 << in)))
1686 return 0;
1687
1688 return attr->mode;
1689 }
1690
1691 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1692 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1693 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1694 0);
1695 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1696 store_in_reg, 0, 1);
1697 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1698 store_in_reg, 0, 2);
1699
1700 /*
1701 * nct6775_in_is_visible uses the index into the following array
1702 * to determine if attributes should be created or not.
1703 * Any change in order or content must be matched.
1704 */
1705 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1706 &sensor_dev_template_in_input,
1707 &sensor_dev_template_in_alarm,
1708 &sensor_dev_template_in_beep,
1709 &sensor_dev_template_in_min,
1710 &sensor_dev_template_in_max,
1711 NULL
1712 };
1713
1714 static struct sensor_template_group nct6775_in_template_group = {
1715 .templates = nct6775_attributes_in_template,
1716 .is_visible = nct6775_in_is_visible,
1717 };
1718
1719 static ssize_t
1720 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1721 {
1722 struct nct6775_data *data = nct6775_update_device(dev);
1723 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1724 int nr = sattr->index;
1725 return sprintf(buf, "%d\n", data->rpm[nr]);
1726 }
1727
1728 static ssize_t
1729 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1730 {
1731 struct nct6775_data *data = nct6775_update_device(dev);
1732 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1733 int nr = sattr->index;
1734 return sprintf(buf, "%d\n",
1735 data->fan_from_reg_min(data->fan_min[nr],
1736 data->fan_div[nr]));
1737 }
1738
1739 static ssize_t
1740 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1741 {
1742 struct nct6775_data *data = nct6775_update_device(dev);
1743 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1744 int nr = sattr->index;
1745 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1746 }
1747
1748 static ssize_t
1749 store_fan_min(struct device *dev, struct device_attribute *attr,
1750 const char *buf, size_t count)
1751 {
1752 struct nct6775_data *data = dev_get_drvdata(dev);
1753 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1754 int nr = sattr->index;
1755 unsigned long val;
1756 int err;
1757 unsigned int reg;
1758 u8 new_div;
1759
1760 err = kstrtoul(buf, 10, &val);
1761 if (err < 0)
1762 return err;
1763
1764 mutex_lock(&data->update_lock);
1765 if (!data->has_fan_div) {
1766 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1767 if (!val) {
1768 val = 0xff1f;
1769 } else {
1770 if (val > 1350000U)
1771 val = 135000U;
1772 val = 1350000U / val;
1773 val = (val & 0x1f) | ((val << 3) & 0xff00);
1774 }
1775 data->fan_min[nr] = val;
1776 goto write_min; /* Leave fan divider alone */
1777 }
1778 if (!val) {
1779 /* No min limit, alarm disabled */
1780 data->fan_min[nr] = 255;
1781 new_div = data->fan_div[nr]; /* No change */
1782 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1783 goto write_div;
1784 }
1785 reg = 1350000U / val;
1786 if (reg >= 128 * 255) {
1787 /*
1788 * Speed below this value cannot possibly be represented,
1789 * even with the highest divider (128)
1790 */
1791 data->fan_min[nr] = 254;
1792 new_div = 7; /* 128 == (1 << 7) */
1793 dev_warn(dev,
1794 "fan%u low limit %lu below minimum %u, set to minimum\n",
1795 nr + 1, val, data->fan_from_reg_min(254, 7));
1796 } else if (!reg) {
1797 /*
1798 * Speed above this value cannot possibly be represented,
1799 * even with the lowest divider (1)
1800 */
1801 data->fan_min[nr] = 1;
1802 new_div = 0; /* 1 == (1 << 0) */
1803 dev_warn(dev,
1804 "fan%u low limit %lu above maximum %u, set to maximum\n",
1805 nr + 1, val, data->fan_from_reg_min(1, 0));
1806 } else {
1807 /*
1808 * Automatically pick the best divider, i.e. the one such
1809 * that the min limit will correspond to a register value
1810 * in the 96..192 range
1811 */
1812 new_div = 0;
1813 while (reg > 192 && new_div < 7) {
1814 reg >>= 1;
1815 new_div++;
1816 }
1817 data->fan_min[nr] = reg;
1818 }
1819
1820 write_div:
1821 /*
1822 * Write both the fan clock divider (if it changed) and the new
1823 * fan min (unconditionally)
1824 */
1825 if (new_div != data->fan_div[nr]) {
1826 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1827 nr + 1, div_from_reg(data->fan_div[nr]),
1828 div_from_reg(new_div));
1829 data->fan_div[nr] = new_div;
1830 nct6775_write_fan_div_common(data, nr);
1831 /* Give the chip time to sample a new speed value */
1832 data->last_updated = jiffies;
1833 }
1834
1835 write_min:
1836 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1837 mutex_unlock(&data->update_lock);
1838
1839 return count;
1840 }
1841
1842 static ssize_t
1843 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1844 {
1845 struct nct6775_data *data = nct6775_update_device(dev);
1846 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1847 int p = data->fan_pulses[sattr->index];
1848
1849 return sprintf(buf, "%d\n", p ? : 4);
1850 }
1851
1852 static ssize_t
1853 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1854 const char *buf, size_t count)
1855 {
1856 struct nct6775_data *data = dev_get_drvdata(dev);
1857 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1858 int nr = sattr->index;
1859 unsigned long val;
1860 int err;
1861 u8 reg;
1862
1863 err = kstrtoul(buf, 10, &val);
1864 if (err < 0)
1865 return err;
1866
1867 if (val > 4)
1868 return -EINVAL;
1869
1870 mutex_lock(&data->update_lock);
1871 data->fan_pulses[nr] = val & 3;
1872 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1873 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1874 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1875 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1876 mutex_unlock(&data->update_lock);
1877
1878 return count;
1879 }
1880
1881 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1882 struct attribute *attr, int index)
1883 {
1884 struct device *dev = container_of(kobj, struct device, kobj);
1885 struct nct6775_data *data = dev_get_drvdata(dev);
1886 int fan = index / 6; /* fan index */
1887 int nr = index % 6; /* attribute index */
1888
1889 if (!(data->has_fan & (1 << fan)))
1890 return 0;
1891
1892 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1893 return 0;
1894 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1895 return 0;
1896 if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1897 return 0;
1898 if (nr == 5 && data->kind != nct6775)
1899 return 0;
1900
1901 return attr->mode;
1902 }
1903
1904 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1905 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1906 FAN_ALARM_BASE);
1907 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1908 store_beep, FAN_ALARM_BASE);
1909 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1910 store_fan_pulses, 0);
1911 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1912 store_fan_min, 0);
1913 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1914
1915 /*
1916 * nct6775_fan_is_visible uses the index into the following array
1917 * to determine if attributes should be created or not.
1918 * Any change in order or content must be matched.
1919 */
1920 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1921 &sensor_dev_template_fan_input,
1922 &sensor_dev_template_fan_alarm, /* 1 */
1923 &sensor_dev_template_fan_beep, /* 2 */
1924 &sensor_dev_template_fan_pulses,
1925 &sensor_dev_template_fan_min, /* 4 */
1926 &sensor_dev_template_fan_div, /* 5 */
1927 NULL
1928 };
1929
1930 static struct sensor_template_group nct6775_fan_template_group = {
1931 .templates = nct6775_attributes_fan_template,
1932 .is_visible = nct6775_fan_is_visible,
1933 .base = 1,
1934 };
1935
1936 static ssize_t
1937 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1938 {
1939 struct nct6775_data *data = nct6775_update_device(dev);
1940 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1941 int nr = sattr->index;
1942 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1943 }
1944
1945 static ssize_t
1946 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1947 {
1948 struct nct6775_data *data = nct6775_update_device(dev);
1949 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1950 int nr = sattr->nr;
1951 int index = sattr->index;
1952
1953 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1954 }
1955
1956 static ssize_t
1957 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1958 size_t count)
1959 {
1960 struct nct6775_data *data = dev_get_drvdata(dev);
1961 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1962 int nr = sattr->nr;
1963 int index = sattr->index;
1964 int err;
1965 long val;
1966
1967 err = kstrtol(buf, 10, &val);
1968 if (err < 0)
1969 return err;
1970
1971 mutex_lock(&data->update_lock);
1972 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1973 nct6775_write_temp(data, data->reg_temp[index][nr],
1974 data->temp[index][nr]);
1975 mutex_unlock(&data->update_lock);
1976 return count;
1977 }
1978
1979 static ssize_t
1980 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1981 {
1982 struct nct6775_data *data = nct6775_update_device(dev);
1983 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1984
1985 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1986 }
1987
1988 static ssize_t
1989 store_temp_offset(struct device *dev, struct device_attribute *attr,
1990 const char *buf, size_t count)
1991 {
1992 struct nct6775_data *data = dev_get_drvdata(dev);
1993 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1994 int nr = sattr->index;
1995 long val;
1996 int err;
1997
1998 err = kstrtol(buf, 10, &val);
1999 if (err < 0)
2000 return err;
2001
2002 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2003
2004 mutex_lock(&data->update_lock);
2005 data->temp_offset[nr] = val;
2006 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2007 mutex_unlock(&data->update_lock);
2008
2009 return count;
2010 }
2011
2012 static ssize_t
2013 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2014 {
2015 struct nct6775_data *data = nct6775_update_device(dev);
2016 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2017 int nr = sattr->index;
2018 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2019 }
2020
2021 static ssize_t
2022 store_temp_type(struct device *dev, struct device_attribute *attr,
2023 const char *buf, size_t count)
2024 {
2025 struct nct6775_data *data = nct6775_update_device(dev);
2026 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2027 int nr = sattr->index;
2028 unsigned long val;
2029 int err;
2030 u8 vbat, diode, vbit, dbit;
2031
2032 err = kstrtoul(buf, 10, &val);
2033 if (err < 0)
2034 return err;
2035
2036 if (val != 1 && val != 3 && val != 4)
2037 return -EINVAL;
2038
2039 mutex_lock(&data->update_lock);
2040
2041 data->temp_type[nr] = val;
2042 vbit = 0x02 << nr;
2043 dbit = data->DIODE_MASK << nr;
2044 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2045 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2046 switch (val) {
2047 case 1: /* CPU diode (diode, current mode) */
2048 vbat |= vbit;
2049 diode |= dbit;
2050 break;
2051 case 3: /* diode, voltage mode */
2052 vbat |= dbit;
2053 break;
2054 case 4: /* thermistor */
2055 break;
2056 }
2057 nct6775_write_value(data, data->REG_VBAT, vbat);
2058 nct6775_write_value(data, data->REG_DIODE, diode);
2059
2060 mutex_unlock(&data->update_lock);
2061 return count;
2062 }
2063
2064 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2065 struct attribute *attr, int index)
2066 {
2067 struct device *dev = container_of(kobj, struct device, kobj);
2068 struct nct6775_data *data = dev_get_drvdata(dev);
2069 int temp = index / 10; /* temp index */
2070 int nr = index % 10; /* attribute index */
2071
2072 if (!(data->have_temp & (1 << temp)))
2073 return 0;
2074
2075 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2076 return 0; /* alarm */
2077
2078 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2079 return 0; /* beep */
2080
2081 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2082 return 0;
2083
2084 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2085 return 0;
2086
2087 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2088 return 0;
2089
2090 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2091 return 0;
2092
2093 /* offset and type only apply to fixed sensors */
2094 if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2095 return 0;
2096
2097 return attr->mode;
2098 }
2099
2100 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2101 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2102 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2103 store_temp, 0, 1);
2104 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2105 show_temp, store_temp, 0, 2);
2106 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2107 store_temp, 0, 3);
2108 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2109 store_temp, 0, 4);
2110 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2111 show_temp_offset, store_temp_offset, 0);
2112 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2113 store_temp_type, 0);
2114 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2115 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2116 store_temp_beep, 0);
2117
2118 /*
2119 * nct6775_temp_is_visible uses the index into the following array
2120 * to determine if attributes should be created or not.
2121 * Any change in order or content must be matched.
2122 */
2123 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2124 &sensor_dev_template_temp_input,
2125 &sensor_dev_template_temp_label,
2126 &sensor_dev_template_temp_alarm, /* 2 */
2127 &sensor_dev_template_temp_beep, /* 3 */
2128 &sensor_dev_template_temp_max, /* 4 */
2129 &sensor_dev_template_temp_max_hyst, /* 5 */
2130 &sensor_dev_template_temp_crit, /* 6 */
2131 &sensor_dev_template_temp_lcrit, /* 7 */
2132 &sensor_dev_template_temp_offset, /* 8 */
2133 &sensor_dev_template_temp_type, /* 9 */
2134 NULL
2135 };
2136
2137 static struct sensor_template_group nct6775_temp_template_group = {
2138 .templates = nct6775_attributes_temp_template,
2139 .is_visible = nct6775_temp_is_visible,
2140 .base = 1,
2141 };
2142
2143 static ssize_t
2144 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2145 {
2146 struct nct6775_data *data = nct6775_update_device(dev);
2147 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2148
2149 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2150 }
2151
2152 static ssize_t
2153 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2154 const char *buf, size_t count)
2155 {
2156 struct nct6775_data *data = dev_get_drvdata(dev);
2157 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2158 int nr = sattr->index;
2159 unsigned long val;
2160 int err;
2161 u8 reg;
2162
2163 err = kstrtoul(buf, 10, &val);
2164 if (err < 0)
2165 return err;
2166
2167 if (val > 1)
2168 return -EINVAL;
2169
2170 /* Setting DC mode is not supported for all chips/channels */
2171 if (data->REG_PWM_MODE[nr] == 0) {
2172 if (val)
2173 return -EINVAL;
2174 return count;
2175 }
2176
2177 mutex_lock(&data->update_lock);
2178 data->pwm_mode[nr] = val;
2179 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2180 reg &= ~data->PWM_MODE_MASK[nr];
2181 if (val)
2182 reg |= data->PWM_MODE_MASK[nr];
2183 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2184 mutex_unlock(&data->update_lock);
2185 return count;
2186 }
2187
2188 static ssize_t
2189 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2190 {
2191 struct nct6775_data *data = nct6775_update_device(dev);
2192 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2193 int nr = sattr->nr;
2194 int index = sattr->index;
2195 int pwm;
2196
2197 /*
2198 * For automatic fan control modes, show current pwm readings.
2199 * Otherwise, show the configured value.
2200 */
2201 if (index == 0 && data->pwm_enable[nr] > manual)
2202 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2203 else
2204 pwm = data->pwm[index][nr];
2205
2206 return sprintf(buf, "%d\n", pwm);
2207 }
2208
2209 static ssize_t
2210 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2211 size_t count)
2212 {
2213 struct nct6775_data *data = dev_get_drvdata(dev);
2214 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2215 int nr = sattr->nr;
2216 int index = sattr->index;
2217 unsigned long val;
2218 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2219 int maxval[7]
2220 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2221 int err;
2222 u8 reg;
2223
2224 err = kstrtoul(buf, 10, &val);
2225 if (err < 0)
2226 return err;
2227 val = clamp_val(val, minval[index], maxval[index]);
2228
2229 mutex_lock(&data->update_lock);
2230 data->pwm[index][nr] = val;
2231 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2232 if (index == 2) { /* floor: disable if val == 0 */
2233 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2234 reg &= 0x7f;
2235 if (val)
2236 reg |= 0x80;
2237 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2238 }
2239 mutex_unlock(&data->update_lock);
2240 return count;
2241 }
2242
2243 /* Returns 0 if OK, -EINVAL otherwise */
2244 static int check_trip_points(struct nct6775_data *data, int nr)
2245 {
2246 int i;
2247
2248 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2249 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2250 return -EINVAL;
2251 }
2252 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2253 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2254 return -EINVAL;
2255 }
2256 /* validate critical temperature and pwm if enabled (pwm > 0) */
2257 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2258 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2259 data->auto_temp[nr][data->auto_pwm_num] ||
2260 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2261 data->auto_pwm[nr][data->auto_pwm_num])
2262 return -EINVAL;
2263 }
2264 return 0;
2265 }
2266
2267 static void pwm_update_registers(struct nct6775_data *data, int nr)
2268 {
2269 u8 reg;
2270
2271 switch (data->pwm_enable[nr]) {
2272 case off:
2273 case manual:
2274 break;
2275 case speed_cruise:
2276 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2277 reg = (reg & ~data->tolerance_mask) |
2278 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2279 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2280 nct6775_write_value(data, data->REG_TARGET[nr],
2281 data->target_speed[nr] & 0xff);
2282 if (data->REG_TOLERANCE_H) {
2283 reg = (data->target_speed[nr] >> 8) & 0x0f;
2284 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2285 nct6775_write_value(data,
2286 data->REG_TOLERANCE_H[nr],
2287 reg);
2288 }
2289 break;
2290 case thermal_cruise:
2291 nct6775_write_value(data, data->REG_TARGET[nr],
2292 data->target_temp[nr]);
2293 /* intentional */
2294 default:
2295 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2296 reg = (reg & ~data->tolerance_mask) |
2297 data->temp_tolerance[0][nr];
2298 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2299 break;
2300 }
2301 }
2302
2303 static ssize_t
2304 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2305 {
2306 struct nct6775_data *data = nct6775_update_device(dev);
2307 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2308
2309 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2310 }
2311
2312 static ssize_t
2313 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2314 const char *buf, size_t count)
2315 {
2316 struct nct6775_data *data = dev_get_drvdata(dev);
2317 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2318 int nr = sattr->index;
2319 unsigned long val;
2320 int err;
2321 u16 reg;
2322
2323 err = kstrtoul(buf, 10, &val);
2324 if (err < 0)
2325 return err;
2326
2327 if (val > sf4)
2328 return -EINVAL;
2329
2330 if (val == sf3 && data->kind != nct6775)
2331 return -EINVAL;
2332
2333 if (val == sf4 && check_trip_points(data, nr)) {
2334 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2335 dev_err(dev, "Adjust trip points and try again\n");
2336 return -EINVAL;
2337 }
2338
2339 mutex_lock(&data->update_lock);
2340 data->pwm_enable[nr] = val;
2341 if (val == off) {
2342 /*
2343 * turn off pwm control: select manual mode, set pwm to maximum
2344 */
2345 data->pwm[0][nr] = 255;
2346 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2347 }
2348 pwm_update_registers(data, nr);
2349 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2350 reg &= 0x0f;
2351 reg |= pwm_enable_to_reg(val) << 4;
2352 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2353 mutex_unlock(&data->update_lock);
2354 return count;
2355 }
2356
2357 static ssize_t
2358 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2359 {
2360 int i, sel = 0;
2361
2362 for (i = 0; i < NUM_TEMP; i++) {
2363 if (!(data->have_temp & (1 << i)))
2364 continue;
2365 if (src == data->temp_src[i]) {
2366 sel = i + 1;
2367 break;
2368 }
2369 }
2370
2371 return sprintf(buf, "%d\n", sel);
2372 }
2373
2374 static ssize_t
2375 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2376 {
2377 struct nct6775_data *data = nct6775_update_device(dev);
2378 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2379 int index = sattr->index;
2380
2381 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2382 }
2383
2384 static ssize_t
2385 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2386 const char *buf, size_t count)
2387 {
2388 struct nct6775_data *data = nct6775_update_device(dev);
2389 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2390 int nr = sattr->index;
2391 unsigned long val;
2392 int err, reg, src;
2393
2394 err = kstrtoul(buf, 10, &val);
2395 if (err < 0)
2396 return err;
2397 if (val == 0 || val > NUM_TEMP)
2398 return -EINVAL;
2399 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2400 return -EINVAL;
2401
2402 mutex_lock(&data->update_lock);
2403 src = data->temp_src[val - 1];
2404 data->pwm_temp_sel[nr] = src;
2405 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2406 reg &= 0xe0;
2407 reg |= src;
2408 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2409 mutex_unlock(&data->update_lock);
2410
2411 return count;
2412 }
2413
2414 static ssize_t
2415 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2416 char *buf)
2417 {
2418 struct nct6775_data *data = nct6775_update_device(dev);
2419 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2420 int index = sattr->index;
2421
2422 return show_pwm_temp_sel_common(data, buf,
2423 data->pwm_weight_temp_sel[index]);
2424 }
2425
2426 static ssize_t
2427 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2428 const char *buf, size_t count)
2429 {
2430 struct nct6775_data *data = nct6775_update_device(dev);
2431 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2432 int nr = sattr->index;
2433 unsigned long val;
2434 int err, reg, src;
2435
2436 err = kstrtoul(buf, 10, &val);
2437 if (err < 0)
2438 return err;
2439 if (val > NUM_TEMP)
2440 return -EINVAL;
2441 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2442 !data->temp_src[val - 1]))
2443 return -EINVAL;
2444
2445 mutex_lock(&data->update_lock);
2446 if (val) {
2447 src = data->temp_src[val - 1];
2448 data->pwm_weight_temp_sel[nr] = src;
2449 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2450 reg &= 0xe0;
2451 reg |= (src | 0x80);
2452 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2453 } else {
2454 data->pwm_weight_temp_sel[nr] = 0;
2455 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2456 reg &= 0x7f;
2457 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2458 }
2459 mutex_unlock(&data->update_lock);
2460
2461 return count;
2462 }
2463
2464 static ssize_t
2465 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2466 {
2467 struct nct6775_data *data = nct6775_update_device(dev);
2468 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2469
2470 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2471 }
2472
2473 static ssize_t
2474 store_target_temp(struct device *dev, struct device_attribute *attr,
2475 const char *buf, size_t count)
2476 {
2477 struct nct6775_data *data = dev_get_drvdata(dev);
2478 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2479 int nr = sattr->index;
2480 unsigned long val;
2481 int err;
2482
2483 err = kstrtoul(buf, 10, &val);
2484 if (err < 0)
2485 return err;
2486
2487 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2488 data->target_temp_mask);
2489
2490 mutex_lock(&data->update_lock);
2491 data->target_temp[nr] = val;
2492 pwm_update_registers(data, nr);
2493 mutex_unlock(&data->update_lock);
2494 return count;
2495 }
2496
2497 static ssize_t
2498 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2499 {
2500 struct nct6775_data *data = nct6775_update_device(dev);
2501 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2502 int nr = sattr->index;
2503
2504 return sprintf(buf, "%d\n",
2505 fan_from_reg16(data->target_speed[nr],
2506 data->fan_div[nr]));
2507 }
2508
2509 static ssize_t
2510 store_target_speed(struct device *dev, struct device_attribute *attr,
2511 const char *buf, size_t count)
2512 {
2513 struct nct6775_data *data = dev_get_drvdata(dev);
2514 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2515 int nr = sattr->index;
2516 unsigned long val;
2517 int err;
2518 u16 speed;
2519
2520 err = kstrtoul(buf, 10, &val);
2521 if (err < 0)
2522 return err;
2523
2524 val = clamp_val(val, 0, 1350000U);
2525 speed = fan_to_reg(val, data->fan_div[nr]);
2526
2527 mutex_lock(&data->update_lock);
2528 data->target_speed[nr] = speed;
2529 pwm_update_registers(data, nr);
2530 mutex_unlock(&data->update_lock);
2531 return count;
2532 }
2533
2534 static ssize_t
2535 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2536 char *buf)
2537 {
2538 struct nct6775_data *data = nct6775_update_device(dev);
2539 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2540 int nr = sattr->nr;
2541 int index = sattr->index;
2542
2543 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2544 }
2545
2546 static ssize_t
2547 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2548 const char *buf, size_t count)
2549 {
2550 struct nct6775_data *data = dev_get_drvdata(dev);
2551 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2552 int nr = sattr->nr;
2553 int index = sattr->index;
2554 unsigned long val;
2555 int err;
2556
2557 err = kstrtoul(buf, 10, &val);
2558 if (err < 0)
2559 return err;
2560
2561 /* Limit tolerance as needed */
2562 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2563
2564 mutex_lock(&data->update_lock);
2565 data->temp_tolerance[index][nr] = val;
2566 if (index)
2567 pwm_update_registers(data, nr);
2568 else
2569 nct6775_write_value(data,
2570 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2571 val);
2572 mutex_unlock(&data->update_lock);
2573 return count;
2574 }
2575
2576 /*
2577 * Fan speed tolerance is a tricky beast, since the associated register is
2578 * a tick counter, but the value is reported and configured as rpm.
2579 * Compute resulting low and high rpm values and report the difference.
2580 */
2581 static ssize_t
2582 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2583 char *buf)
2584 {
2585 struct nct6775_data *data = nct6775_update_device(dev);
2586 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2587 int nr = sattr->index;
2588 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2589 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2590 int tolerance;
2591
2592 if (low <= 0)
2593 low = 1;
2594 if (high > 0xffff)
2595 high = 0xffff;
2596 if (high < low)
2597 high = low;
2598
2599 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2600 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2601
2602 return sprintf(buf, "%d\n", tolerance);
2603 }
2604
2605 static ssize_t
2606 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2607 const char *buf, size_t count)
2608 {
2609 struct nct6775_data *data = dev_get_drvdata(dev);
2610 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2611 int nr = sattr->index;
2612 unsigned long val;
2613 int err;
2614 int low, high;
2615
2616 err = kstrtoul(buf, 10, &val);
2617 if (err < 0)
2618 return err;
2619
2620 high = fan_from_reg16(data->target_speed[nr],
2621 data->fan_div[nr]) + val;
2622 low = fan_from_reg16(data->target_speed[nr],
2623 data->fan_div[nr]) - val;
2624 if (low <= 0)
2625 low = 1;
2626 if (high < low)
2627 high = low;
2628
2629 val = (fan_to_reg(low, data->fan_div[nr]) -
2630 fan_to_reg(high, data->fan_div[nr])) / 2;
2631
2632 /* Limit tolerance as needed */
2633 val = clamp_val(val, 0, data->speed_tolerance_limit);
2634
2635 mutex_lock(&data->update_lock);
2636 data->target_speed_tolerance[nr] = val;
2637 pwm_update_registers(data, nr);
2638 mutex_unlock(&data->update_lock);
2639 return count;
2640 }
2641
2642 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2643 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2644 store_pwm_mode, 0);
2645 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2646 store_pwm_enable, 0);
2647 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2648 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2649 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2650 show_target_temp, store_target_temp, 0);
2651 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2652 show_target_speed, store_target_speed, 0);
2653 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2654 show_speed_tolerance, store_speed_tolerance, 0);
2655
2656 /* Smart Fan registers */
2657
2658 static ssize_t
2659 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2660 {
2661 struct nct6775_data *data = nct6775_update_device(dev);
2662 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2663 int nr = sattr->nr;
2664 int index = sattr->index;
2665
2666 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2667 }
2668
2669 static ssize_t
2670 store_weight_temp(struct device *dev, struct device_attribute *attr,
2671 const char *buf, size_t count)
2672 {
2673 struct nct6775_data *data = dev_get_drvdata(dev);
2674 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2675 int nr = sattr->nr;
2676 int index = sattr->index;
2677 unsigned long val;
2678 int err;
2679
2680 err = kstrtoul(buf, 10, &val);
2681 if (err < 0)
2682 return err;
2683
2684 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2685
2686 mutex_lock(&data->update_lock);
2687 data->weight_temp[index][nr] = val;
2688 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2689 mutex_unlock(&data->update_lock);
2690 return count;
2691 }
2692
2693 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2694 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2695 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2696 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2697 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2698 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2699 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2700 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2701 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2702 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2703 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2704 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2705
2706 static ssize_t
2707 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2708 {
2709 struct nct6775_data *data = nct6775_update_device(dev);
2710 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2711 int nr = sattr->nr;
2712 int index = sattr->index;
2713
2714 return sprintf(buf, "%d\n",
2715 step_time_from_reg(data->fan_time[index][nr],
2716 data->pwm_mode[nr]));
2717 }
2718
2719 static ssize_t
2720 store_fan_time(struct device *dev, struct device_attribute *attr,
2721 const char *buf, size_t count)
2722 {
2723 struct nct6775_data *data = dev_get_drvdata(dev);
2724 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2725 int nr = sattr->nr;
2726 int index = sattr->index;
2727 unsigned long val;
2728 int err;
2729
2730 err = kstrtoul(buf, 10, &val);
2731 if (err < 0)
2732 return err;
2733
2734 val = step_time_to_reg(val, data->pwm_mode[nr]);
2735 mutex_lock(&data->update_lock);
2736 data->fan_time[index][nr] = val;
2737 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2738 mutex_unlock(&data->update_lock);
2739 return count;
2740 }
2741
2742 static ssize_t
2743 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2744 {
2745 struct nct6775_data *data = nct6775_update_device(dev);
2746 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2747
2748 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2749 }
2750
2751 static ssize_t
2752 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2753 const char *buf, size_t count)
2754 {
2755 struct nct6775_data *data = dev_get_drvdata(dev);
2756 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2757 int nr = sattr->nr;
2758 int point = sattr->index;
2759 unsigned long val;
2760 int err;
2761 u8 reg;
2762
2763 err = kstrtoul(buf, 10, &val);
2764 if (err < 0)
2765 return err;
2766 if (val > 255)
2767 return -EINVAL;
2768
2769 if (point == data->auto_pwm_num) {
2770 if (data->kind != nct6775 && !val)
2771 return -EINVAL;
2772 if (data->kind != nct6779 && val)
2773 val = 0xff;
2774 }
2775
2776 mutex_lock(&data->update_lock);
2777 data->auto_pwm[nr][point] = val;
2778 if (point < data->auto_pwm_num) {
2779 nct6775_write_value(data,
2780 NCT6775_AUTO_PWM(data, nr, point),
2781 data->auto_pwm[nr][point]);
2782 } else {
2783 switch (data->kind) {
2784 case nct6775:
2785 /* disable if needed (pwm == 0) */
2786 reg = nct6775_read_value(data,
2787 NCT6775_REG_CRITICAL_ENAB[nr]);
2788 if (val)
2789 reg |= 0x02;
2790 else
2791 reg &= ~0x02;
2792 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2793 reg);
2794 break;
2795 case nct6776:
2796 break; /* always enabled, nothing to do */
2797 case nct6106:
2798 case nct6779:
2799 case nct6791:
2800 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2801 val);
2802 reg = nct6775_read_value(data,
2803 data->REG_CRITICAL_PWM_ENABLE[nr]);
2804 if (val == 255)
2805 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2806 else
2807 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2808 nct6775_write_value(data,
2809 data->REG_CRITICAL_PWM_ENABLE[nr],
2810 reg);
2811 break;
2812 }
2813 }
2814 mutex_unlock(&data->update_lock);
2815 return count;
2816 }
2817
2818 static ssize_t
2819 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2820 {
2821 struct nct6775_data *data = nct6775_update_device(dev);
2822 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2823 int nr = sattr->nr;
2824 int point = sattr->index;
2825
2826 /*
2827 * We don't know for sure if the temperature is signed or unsigned.
2828 * Assume it is unsigned.
2829 */
2830 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2831 }
2832
2833 static ssize_t
2834 store_auto_temp(struct device *dev, struct device_attribute *attr,
2835 const char *buf, size_t count)
2836 {
2837 struct nct6775_data *data = dev_get_drvdata(dev);
2838 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2839 int nr = sattr->nr;
2840 int point = sattr->index;
2841 unsigned long val;
2842 int err;
2843
2844 err = kstrtoul(buf, 10, &val);
2845 if (err)
2846 return err;
2847 if (val > 255000)
2848 return -EINVAL;
2849
2850 mutex_lock(&data->update_lock);
2851 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2852 if (point < data->auto_pwm_num) {
2853 nct6775_write_value(data,
2854 NCT6775_AUTO_TEMP(data, nr, point),
2855 data->auto_temp[nr][point]);
2856 } else {
2857 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2858 data->auto_temp[nr][point]);
2859 }
2860 mutex_unlock(&data->update_lock);
2861 return count;
2862 }
2863
2864 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2865 struct attribute *attr, int index)
2866 {
2867 struct device *dev = container_of(kobj, struct device, kobj);
2868 struct nct6775_data *data = dev_get_drvdata(dev);
2869 int pwm = index / 36; /* pwm index */
2870 int nr = index % 36; /* attribute index */
2871
2872 if (!(data->has_pwm & (1 << pwm)))
2873 return 0;
2874
2875 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
2876 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2877 return 0;
2878 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2879 return 0;
2880 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2881 return 0;
2882 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2883 return 0;
2884
2885 if (nr >= 22 && nr <= 35) { /* auto point */
2886 int api = (nr - 22) / 2; /* auto point index */
2887
2888 if (api > data->auto_pwm_num)
2889 return 0;
2890 }
2891 return attr->mode;
2892 }
2893
2894 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2895 show_fan_time, store_fan_time, 0, 0);
2896 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2897 show_fan_time, store_fan_time, 0, 1);
2898 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2899 show_fan_time, store_fan_time, 0, 2);
2900 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2901 store_pwm, 0, 1);
2902 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2903 store_pwm, 0, 2);
2904 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2905 show_temp_tolerance, store_temp_tolerance, 0, 0);
2906 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2907 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2908 0, 1);
2909
2910 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2911 0, 3);
2912
2913 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2914 store_pwm, 0, 4);
2915
2916 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2917 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2918 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2919 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2920
2921 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2922 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2923 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2924 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2925
2926 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2927 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2928 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2929 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2930
2931 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2932 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2933 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2934 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2935
2936 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2937 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2938 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2939 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2940
2941 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2942 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2943 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2944 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2945
2946 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2947 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2948 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2949 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2950
2951 /*
2952 * nct6775_pwm_is_visible uses the index into the following array
2953 * to determine if attributes should be created or not.
2954 * Any change in order or content must be matched.
2955 */
2956 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2957 &sensor_dev_template_pwm,
2958 &sensor_dev_template_pwm_mode,
2959 &sensor_dev_template_pwm_enable,
2960 &sensor_dev_template_pwm_temp_sel,
2961 &sensor_dev_template_pwm_temp_tolerance,
2962 &sensor_dev_template_pwm_crit_temp_tolerance,
2963 &sensor_dev_template_pwm_target_temp,
2964 &sensor_dev_template_fan_target,
2965 &sensor_dev_template_fan_tolerance,
2966 &sensor_dev_template_pwm_stop_time,
2967 &sensor_dev_template_pwm_step_up_time,
2968 &sensor_dev_template_pwm_step_down_time,
2969 &sensor_dev_template_pwm_start,
2970 &sensor_dev_template_pwm_floor,
2971 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
2972 &sensor_dev_template_pwm_weight_temp_step,
2973 &sensor_dev_template_pwm_weight_temp_step_tol,
2974 &sensor_dev_template_pwm_weight_temp_step_base,
2975 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
2976 &sensor_dev_template_pwm_max, /* 19 */
2977 &sensor_dev_template_pwm_step, /* 20 */
2978 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
2979 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
2980 &sensor_dev_template_pwm_auto_point1_temp,
2981 &sensor_dev_template_pwm_auto_point2_pwm,
2982 &sensor_dev_template_pwm_auto_point2_temp,
2983 &sensor_dev_template_pwm_auto_point3_pwm,
2984 &sensor_dev_template_pwm_auto_point3_temp,
2985 &sensor_dev_template_pwm_auto_point4_pwm,
2986 &sensor_dev_template_pwm_auto_point4_temp,
2987 &sensor_dev_template_pwm_auto_point5_pwm,
2988 &sensor_dev_template_pwm_auto_point5_temp,
2989 &sensor_dev_template_pwm_auto_point6_pwm,
2990 &sensor_dev_template_pwm_auto_point6_temp,
2991 &sensor_dev_template_pwm_auto_point7_pwm,
2992 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
2993
2994 NULL
2995 };
2996
2997 static struct sensor_template_group nct6775_pwm_template_group = {
2998 .templates = nct6775_attributes_pwm_template,
2999 .is_visible = nct6775_pwm_is_visible,
3000 .base = 1,
3001 };
3002
3003 static ssize_t
3004 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3005 {
3006 struct nct6775_data *data = dev_get_drvdata(dev);
3007 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3008 }
3009
3010 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3011
3012 /* Case open detection */
3013
3014 static ssize_t
3015 clear_caseopen(struct device *dev, struct device_attribute *attr,
3016 const char *buf, size_t count)
3017 {
3018 struct nct6775_data *data = dev_get_drvdata(dev);
3019 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3020 unsigned long val;
3021 u8 reg;
3022 int ret;
3023
3024 if (kstrtoul(buf, 10, &val) || val != 0)
3025 return -EINVAL;
3026
3027 mutex_lock(&data->update_lock);
3028
3029 /*
3030 * Use CR registers to clear caseopen status.
3031 * The CR registers are the same for all chips, and not all chips
3032 * support clearing the caseopen status through "regular" registers.
3033 */
3034 ret = superio_enter(data->sioreg);
3035 if (ret) {
3036 count = ret;
3037 goto error;
3038 }
3039
3040 superio_select(data->sioreg, NCT6775_LD_ACPI);
3041 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3042 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3043 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3044 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3045 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3046 superio_exit(data->sioreg);
3047
3048 data->valid = false; /* Force cache refresh */
3049 error:
3050 mutex_unlock(&data->update_lock);
3051 return count;
3052 }
3053
3054 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3055 clear_caseopen, INTRUSION_ALARM_BASE);
3056 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3057 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3058 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3059 store_beep, INTRUSION_ALARM_BASE);
3060 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3061 store_beep, INTRUSION_ALARM_BASE + 1);
3062 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3063 store_beep, BEEP_ENABLE_BASE);
3064
3065 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3066 struct attribute *attr, int index)
3067 {
3068 struct device *dev = container_of(kobj, struct device, kobj);
3069 struct nct6775_data *data = dev_get_drvdata(dev);
3070
3071 if (index == 0 && !data->have_vid)
3072 return 0;
3073
3074 if (index == 1 || index == 2) {
3075 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3076 return 0;
3077 }
3078
3079 if (index == 3 || index == 4) {
3080 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3081 return 0;
3082 }
3083
3084 return attr->mode;
3085 }
3086
3087 /*
3088 * nct6775_other_is_visible uses the index into the following array
3089 * to determine if attributes should be created or not.
3090 * Any change in order or content must be matched.
3091 */
3092 static struct attribute *nct6775_attributes_other[] = {
3093 &dev_attr_cpu0_vid.attr, /* 0 */
3094 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 1 */
3095 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 2 */
3096 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 3 */
3097 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 4 */
3098 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 5 */
3099
3100 NULL
3101 };
3102
3103 static const struct attribute_group nct6775_group_other = {
3104 .attrs = nct6775_attributes_other,
3105 .is_visible = nct6775_other_is_visible,
3106 };
3107
3108 static inline void nct6775_init_device(struct nct6775_data *data)
3109 {
3110 int i;
3111 u8 tmp, diode;
3112
3113 /* Start monitoring if needed */
3114 if (data->REG_CONFIG) {
3115 tmp = nct6775_read_value(data, data->REG_CONFIG);
3116 if (!(tmp & 0x01))
3117 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3118 }
3119
3120 /* Enable temperature sensors if needed */
3121 for (i = 0; i < NUM_TEMP; i++) {
3122 if (!(data->have_temp & (1 << i)))
3123 continue;
3124 if (!data->reg_temp_config[i])
3125 continue;
3126 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3127 if (tmp & 0x01)
3128 nct6775_write_value(data, data->reg_temp_config[i],
3129 tmp & 0xfe);
3130 }
3131
3132 /* Enable VBAT monitoring if needed */
3133 tmp = nct6775_read_value(data, data->REG_VBAT);
3134 if (!(tmp & 0x01))
3135 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3136
3137 diode = nct6775_read_value(data, data->REG_DIODE);
3138
3139 for (i = 0; i < data->temp_fixed_num; i++) {
3140 if (!(data->have_temp_fixed & (1 << i)))
3141 continue;
3142 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3143 data->temp_type[i]
3144 = 3 - ((diode >> i) & data->DIODE_MASK);
3145 else /* thermistor */
3146 data->temp_type[i] = 4;
3147 }
3148 }
3149
3150 static void
3151 nct6775_check_fan_inputs(struct nct6775_data *data)
3152 {
3153 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3154 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3155 int sioreg = data->sioreg;
3156 int regval;
3157
3158 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3159 if (data->kind == nct6775) {
3160 regval = superio_inb(sioreg, 0x2c);
3161
3162 fan3pin = regval & (1 << 6);
3163 pwm3pin = regval & (1 << 7);
3164
3165 /* On NCT6775, fan4 shares pins with the fdc interface */
3166 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3167 fan4min = false;
3168 fan5pin = false;
3169 fan6pin = false;
3170 pwm4pin = false;
3171 pwm5pin = false;
3172 pwm6pin = false;
3173 } else if (data->kind == nct6776) {
3174 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3175
3176 superio_select(sioreg, NCT6775_LD_HWM);
3177 regval = superio_inb(sioreg, SIO_REG_ENABLE);
3178
3179 if (regval & 0x80)
3180 fan3pin = gpok;
3181 else
3182 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3183
3184 if (regval & 0x40)
3185 fan4pin = gpok;
3186 else
3187 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3188
3189 if (regval & 0x20)
3190 fan5pin = gpok;
3191 else
3192 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3193
3194 fan4min = fan4pin;
3195 fan6pin = false;
3196 pwm3pin = fan3pin;
3197 pwm4pin = false;
3198 pwm5pin = false;
3199 pwm6pin = false;
3200 } else if (data->kind == nct6106) {
3201 regval = superio_inb(sioreg, 0x24);
3202 fan3pin = !(regval & 0x80);
3203 pwm3pin = regval & 0x08;
3204
3205 fan4pin = false;
3206 fan4min = false;
3207 fan5pin = false;
3208 fan6pin = false;
3209 pwm4pin = false;
3210 pwm5pin = false;
3211 pwm6pin = false;
3212 } else { /* NCT6779D or NCT6791D */
3213 regval = superio_inb(sioreg, 0x1c);
3214
3215 fan3pin = !(regval & (1 << 5));
3216 fan4pin = !(regval & (1 << 6));
3217 fan5pin = !(regval & (1 << 7));
3218
3219 pwm3pin = !(regval & (1 << 0));
3220 pwm4pin = !(regval & (1 << 1));
3221 pwm5pin = !(regval & (1 << 2));
3222
3223 fan4min = fan4pin;
3224
3225 if (data->kind == nct6791) {
3226 regval = superio_inb(sioreg, 0x2d);
3227 fan6pin = (regval & (1 << 1));
3228 pwm6pin = (regval & (1 << 0));
3229 } else { /* NCT6779D */
3230 fan6pin = false;
3231 pwm6pin = false;
3232 }
3233 }
3234
3235 /* fan 1 and 2 (0x03) are always present */
3236 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3237 (fan5pin << 4) | (fan6pin << 5);
3238 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3239 (fan5pin << 4);
3240 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3241 (pwm5pin << 4) | (pwm6pin << 5);
3242 }
3243
3244 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3245 int *available, int *mask)
3246 {
3247 int i;
3248 u8 src;
3249
3250 for (i = 0; i < data->pwm_num && *available; i++) {
3251 int index;
3252
3253 if (!regp[i])
3254 continue;
3255 src = nct6775_read_value(data, regp[i]);
3256 src &= 0x1f;
3257 if (!src || (*mask & (1 << src)))
3258 continue;
3259 if (src >= data->temp_label_num ||
3260 !strlen(data->temp_label[src]))
3261 continue;
3262
3263 index = __ffs(*available);
3264 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3265 *available &= ~(1 << index);
3266 *mask |= 1 << src;
3267 }
3268 }
3269
3270 static int nct6775_probe(struct platform_device *pdev)
3271 {
3272 struct device *dev = &pdev->dev;
3273 struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3274 struct nct6775_data *data;
3275 struct resource *res;
3276 int i, s, err = 0;
3277 int src, mask, available;
3278 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3279 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3280 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3281 int num_reg_temp, num_reg_temp_mon;
3282 u8 cr2a;
3283 struct attribute_group *group;
3284 struct device *hwmon_dev;
3285
3286 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3287 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3288 DRVNAME))
3289 return -EBUSY;
3290
3291 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3292 GFP_KERNEL);
3293 if (!data)
3294 return -ENOMEM;
3295
3296 data->kind = sio_data->kind;
3297 data->sioreg = sio_data->sioreg;
3298 data->addr = res->start;
3299 mutex_init(&data->update_lock);
3300 data->name = nct6775_device_names[data->kind];
3301 data->bank = 0xff; /* Force initial bank selection */
3302 platform_set_drvdata(pdev, data);
3303
3304 switch (data->kind) {
3305 case nct6106:
3306 data->in_num = 9;
3307 data->pwm_num = 3;
3308 data->auto_pwm_num = 4;
3309 data->temp_fixed_num = 3;
3310 data->num_temp_alarms = 6;
3311 data->num_temp_beeps = 6;
3312
3313 data->fan_from_reg = fan_from_reg13;
3314 data->fan_from_reg_min = fan_from_reg13;
3315
3316 data->temp_label = nct6776_temp_label;
3317 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3318
3319 data->REG_VBAT = NCT6106_REG_VBAT;
3320 data->REG_DIODE = NCT6106_REG_DIODE;
3321 data->DIODE_MASK = NCT6106_DIODE_MASK;
3322 data->REG_VIN = NCT6106_REG_IN;
3323 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3324 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3325 data->REG_TARGET = NCT6106_REG_TARGET;
3326 data->REG_FAN = NCT6106_REG_FAN;
3327 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3328 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3329 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3330 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3331 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3332 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3333 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3334 data->REG_PWM[0] = NCT6106_REG_PWM;
3335 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3336 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3337 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3338 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3339 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3340 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3341 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3342 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3343 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3344 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3345 data->REG_CRITICAL_TEMP_TOLERANCE
3346 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3347 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3348 data->CRITICAL_PWM_ENABLE_MASK
3349 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3350 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3351 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3352 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3353 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3354 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3355 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3356 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3357 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3358 data->REG_ALARM = NCT6106_REG_ALARM;
3359 data->ALARM_BITS = NCT6106_ALARM_BITS;
3360 data->REG_BEEP = NCT6106_REG_BEEP;
3361 data->BEEP_BITS = NCT6106_BEEP_BITS;
3362
3363 reg_temp = NCT6106_REG_TEMP;
3364 reg_temp_mon = NCT6106_REG_TEMP_MON;
3365 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3366 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3367 reg_temp_over = NCT6106_REG_TEMP_OVER;
3368 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3369 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3370 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3371 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3372 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3373 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3374
3375 break;
3376 case nct6775:
3377 data->in_num = 9;
3378 data->pwm_num = 3;
3379 data->auto_pwm_num = 6;
3380 data->has_fan_div = true;
3381 data->temp_fixed_num = 3;
3382 data->num_temp_alarms = 3;
3383 data->num_temp_beeps = 3;
3384
3385 data->ALARM_BITS = NCT6775_ALARM_BITS;
3386 data->BEEP_BITS = NCT6775_BEEP_BITS;
3387
3388 data->fan_from_reg = fan_from_reg16;
3389 data->fan_from_reg_min = fan_from_reg8;
3390 data->target_temp_mask = 0x7f;
3391 data->tolerance_mask = 0x0f;
3392 data->speed_tolerance_limit = 15;
3393
3394 data->temp_label = nct6775_temp_label;
3395 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3396
3397 data->REG_CONFIG = NCT6775_REG_CONFIG;
3398 data->REG_VBAT = NCT6775_REG_VBAT;
3399 data->REG_DIODE = NCT6775_REG_DIODE;
3400 data->DIODE_MASK = NCT6775_DIODE_MASK;
3401 data->REG_VIN = NCT6775_REG_IN;
3402 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3403 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3404 data->REG_TARGET = NCT6775_REG_TARGET;
3405 data->REG_FAN = NCT6775_REG_FAN;
3406 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3407 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3408 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3409 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3410 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3411 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3412 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3413 data->REG_PWM[0] = NCT6775_REG_PWM;
3414 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3415 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3416 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3417 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3418 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3419 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3420 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3421 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3422 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3423 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3424 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3425 data->REG_CRITICAL_TEMP_TOLERANCE
3426 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3427 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3428 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3429 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3430 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3431 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3432 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3433 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3434 data->REG_ALARM = NCT6775_REG_ALARM;
3435 data->REG_BEEP = NCT6775_REG_BEEP;
3436
3437 reg_temp = NCT6775_REG_TEMP;
3438 reg_temp_mon = NCT6775_REG_TEMP_MON;
3439 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3440 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3441 reg_temp_over = NCT6775_REG_TEMP_OVER;
3442 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3443 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3444 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3445 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3446
3447 break;
3448 case nct6776:
3449 data->in_num = 9;
3450 data->pwm_num = 3;
3451 data->auto_pwm_num = 4;
3452 data->has_fan_div = false;
3453 data->temp_fixed_num = 3;
3454 data->num_temp_alarms = 3;
3455 data->num_temp_beeps = 6;
3456
3457 data->ALARM_BITS = NCT6776_ALARM_BITS;
3458 data->BEEP_BITS = NCT6776_BEEP_BITS;
3459
3460 data->fan_from_reg = fan_from_reg13;
3461 data->fan_from_reg_min = fan_from_reg13;
3462 data->target_temp_mask = 0xff;
3463 data->tolerance_mask = 0x07;
3464 data->speed_tolerance_limit = 63;
3465
3466 data->temp_label = nct6776_temp_label;
3467 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3468
3469 data->REG_CONFIG = NCT6775_REG_CONFIG;
3470 data->REG_VBAT = NCT6775_REG_VBAT;
3471 data->REG_DIODE = NCT6775_REG_DIODE;
3472 data->DIODE_MASK = NCT6775_DIODE_MASK;
3473 data->REG_VIN = NCT6775_REG_IN;
3474 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3475 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3476 data->REG_TARGET = NCT6775_REG_TARGET;
3477 data->REG_FAN = NCT6775_REG_FAN;
3478 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3479 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3480 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3481 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3482 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3483 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3484 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3485 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3486 data->REG_PWM[0] = NCT6775_REG_PWM;
3487 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3488 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3489 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3490 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3491 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3492 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3493 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3494 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3495 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3496 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3497 data->REG_CRITICAL_TEMP_TOLERANCE
3498 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3499 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3500 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3501 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3502 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3503 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3504 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3505 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3506 data->REG_ALARM = NCT6775_REG_ALARM;
3507 data->REG_BEEP = NCT6776_REG_BEEP;
3508
3509 reg_temp = NCT6775_REG_TEMP;
3510 reg_temp_mon = NCT6775_REG_TEMP_MON;
3511 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3512 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3513 reg_temp_over = NCT6775_REG_TEMP_OVER;
3514 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3515 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3516 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3517 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3518
3519 break;
3520 case nct6779:
3521 data->in_num = 15;
3522 data->pwm_num = 5;
3523 data->auto_pwm_num = 4;
3524 data->has_fan_div = false;
3525 data->temp_fixed_num = 6;
3526 data->num_temp_alarms = 2;
3527 data->num_temp_beeps = 2;
3528
3529 data->ALARM_BITS = NCT6779_ALARM_BITS;
3530 data->BEEP_BITS = NCT6779_BEEP_BITS;
3531
3532 data->fan_from_reg = fan_from_reg13;
3533 data->fan_from_reg_min = fan_from_reg13;
3534 data->target_temp_mask = 0xff;
3535 data->tolerance_mask = 0x07;
3536 data->speed_tolerance_limit = 63;
3537
3538 data->temp_label = nct6779_temp_label;
3539 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3540
3541 data->REG_CONFIG = NCT6775_REG_CONFIG;
3542 data->REG_VBAT = NCT6775_REG_VBAT;
3543 data->REG_DIODE = NCT6775_REG_DIODE;
3544 data->DIODE_MASK = NCT6775_DIODE_MASK;
3545 data->REG_VIN = NCT6779_REG_IN;
3546 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3547 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3548 data->REG_TARGET = NCT6775_REG_TARGET;
3549 data->REG_FAN = NCT6779_REG_FAN;
3550 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3551 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3552 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3553 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3554 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3555 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3556 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3557 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3558 data->REG_PWM[0] = NCT6775_REG_PWM;
3559 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3560 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3561 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3562 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3563 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3564 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3565 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3566 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3567 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3568 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3569 data->REG_CRITICAL_TEMP_TOLERANCE
3570 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3571 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3572 data->CRITICAL_PWM_ENABLE_MASK
3573 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3574 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3575 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3576 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3577 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3578 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3579 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3580 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3581 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3582 data->REG_ALARM = NCT6779_REG_ALARM;
3583 data->REG_BEEP = NCT6776_REG_BEEP;
3584
3585 reg_temp = NCT6779_REG_TEMP;
3586 reg_temp_mon = NCT6779_REG_TEMP_MON;
3587 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3588 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3589 reg_temp_over = NCT6779_REG_TEMP_OVER;
3590 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3591 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3592 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3593 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3594
3595 break;
3596 case nct6791:
3597 data->in_num = 15;
3598 data->pwm_num = 6;
3599 data->auto_pwm_num = 4;
3600 data->has_fan_div = false;
3601 data->temp_fixed_num = 6;
3602 data->num_temp_alarms = 2;
3603 data->num_temp_beeps = 2;
3604
3605 data->ALARM_BITS = NCT6791_ALARM_BITS;
3606 data->BEEP_BITS = NCT6779_BEEP_BITS;
3607
3608 data->fan_from_reg = fan_from_reg13;
3609 data->fan_from_reg_min = fan_from_reg13;
3610 data->target_temp_mask = 0xff;
3611 data->tolerance_mask = 0x07;
3612 data->speed_tolerance_limit = 63;
3613
3614 data->temp_label = nct6779_temp_label;
3615 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3616
3617 data->REG_CONFIG = NCT6775_REG_CONFIG;
3618 data->REG_VBAT = NCT6775_REG_VBAT;
3619 data->REG_DIODE = NCT6775_REG_DIODE;
3620 data->DIODE_MASK = NCT6775_DIODE_MASK;
3621 data->REG_VIN = NCT6779_REG_IN;
3622 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3623 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3624 data->REG_TARGET = NCT6775_REG_TARGET;
3625 data->REG_FAN = NCT6779_REG_FAN;
3626 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3627 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3628 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3629 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3630 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3631 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3632 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3633 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3634 data->REG_PWM[0] = NCT6775_REG_PWM;
3635 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3636 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3637 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3638 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3639 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3640 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3641 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3642 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3643 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3644 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3645 data->REG_CRITICAL_TEMP_TOLERANCE
3646 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3647 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3648 data->CRITICAL_PWM_ENABLE_MASK
3649 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3650 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3651 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3652 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3653 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3654 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3655 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3656 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3657 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3658 data->REG_ALARM = NCT6791_REG_ALARM;
3659 data->REG_BEEP = NCT6776_REG_BEEP;
3660
3661 reg_temp = NCT6779_REG_TEMP;
3662 reg_temp_mon = NCT6779_REG_TEMP_MON;
3663 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3664 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3665 reg_temp_over = NCT6779_REG_TEMP_OVER;
3666 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3667 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3668 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3669 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3670
3671 break;
3672 default:
3673 return -ENODEV;
3674 }
3675 data->have_in = (1 << data->in_num) - 1;
3676 data->have_temp = 0;
3677
3678 /*
3679 * On some boards, not all available temperature sources are monitored,
3680 * even though some of the monitoring registers are unused.
3681 * Get list of unused monitoring registers, then detect if any fan
3682 * controls are configured to use unmonitored temperature sources.
3683 * If so, assign the unmonitored temperature sources to available
3684 * monitoring registers.
3685 */
3686 mask = 0;
3687 available = 0;
3688 for (i = 0; i < num_reg_temp; i++) {
3689 if (reg_temp[i] == 0)
3690 continue;
3691
3692 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3693 if (!src || (mask & (1 << src)))
3694 available |= 1 << i;
3695
3696 mask |= 1 << src;
3697 }
3698
3699 /*
3700 * Now find unmonitored temperature registers and enable monitoring
3701 * if additional monitoring registers are available.
3702 */
3703 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3704 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3705
3706 mask = 0;
3707 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3708 for (i = 0; i < num_reg_temp; i++) {
3709 if (reg_temp[i] == 0)
3710 continue;
3711
3712 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3713 if (!src || (mask & (1 << src)))
3714 continue;
3715
3716 if (src >= data->temp_label_num ||
3717 !strlen(data->temp_label[src])) {
3718 dev_info(dev,
3719 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3720 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3721 continue;
3722 }
3723
3724 mask |= 1 << src;
3725
3726 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3727 if (src <= data->temp_fixed_num) {
3728 data->have_temp |= 1 << (src - 1);
3729 data->have_temp_fixed |= 1 << (src - 1);
3730 data->reg_temp[0][src - 1] = reg_temp[i];
3731 data->reg_temp[1][src - 1] = reg_temp_over[i];
3732 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3733 if (reg_temp_crit_h && reg_temp_crit_h[i])
3734 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3735 else if (reg_temp_crit[src - 1])
3736 data->reg_temp[3][src - 1]
3737 = reg_temp_crit[src - 1];
3738 if (reg_temp_crit_l && reg_temp_crit_l[i])
3739 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3740 data->reg_temp_config[src - 1] = reg_temp_config[i];
3741 data->temp_src[src - 1] = src;
3742 continue;
3743 }
3744
3745 if (s >= NUM_TEMP)
3746 continue;
3747
3748 /* Use dynamic index for other sources */
3749 data->have_temp |= 1 << s;
3750 data->reg_temp[0][s] = reg_temp[i];
3751 data->reg_temp[1][s] = reg_temp_over[i];
3752 data->reg_temp[2][s] = reg_temp_hyst[i];
3753 data->reg_temp_config[s] = reg_temp_config[i];
3754 if (reg_temp_crit_h && reg_temp_crit_h[i])
3755 data->reg_temp[3][s] = reg_temp_crit_h[i];
3756 else if (reg_temp_crit[src - 1])
3757 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3758 if (reg_temp_crit_l && reg_temp_crit_l[i])
3759 data->reg_temp[4][s] = reg_temp_crit_l[i];
3760
3761 data->temp_src[s] = src;
3762 s++;
3763 }
3764
3765 /*
3766 * Repeat with temperatures used for fan control.
3767 * This set of registers does not support limits.
3768 */
3769 for (i = 0; i < num_reg_temp_mon; i++) {
3770 if (reg_temp_mon[i] == 0)
3771 continue;
3772
3773 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3774 if (!src || (mask & (1 << src)))
3775 continue;
3776
3777 if (src >= data->temp_label_num ||
3778 !strlen(data->temp_label[src])) {
3779 dev_info(dev,
3780 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3781 src, i, data->REG_TEMP_SEL[i],
3782 reg_temp_mon[i]);
3783 continue;
3784 }
3785
3786 mask |= 1 << src;
3787
3788 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3789 if (src <= data->temp_fixed_num) {
3790 if (data->have_temp & (1 << (src - 1)))
3791 continue;
3792 data->have_temp |= 1 << (src - 1);
3793 data->have_temp_fixed |= 1 << (src - 1);
3794 data->reg_temp[0][src - 1] = reg_temp_mon[i];
3795 data->temp_src[src - 1] = src;
3796 continue;
3797 }
3798
3799 if (s >= NUM_TEMP)
3800 continue;
3801
3802 /* Use dynamic index for other sources */
3803 data->have_temp |= 1 << s;
3804 data->reg_temp[0][s] = reg_temp_mon[i];
3805 data->temp_src[s] = src;
3806 s++;
3807 }
3808
3809 #ifdef USE_ALTERNATE
3810 /*
3811 * Go through the list of alternate temp registers and enable
3812 * if possible.
3813 * The temperature is already monitored if the respective bit in <mask>
3814 * is set.
3815 */
3816 for (i = 0; i < data->temp_label_num - 1; i++) {
3817 if (!reg_temp_alternate[i])
3818 continue;
3819 if (mask & (1 << (i + 1)))
3820 continue;
3821 if (i < data->temp_fixed_num) {
3822 if (data->have_temp & (1 << i))
3823 continue;
3824 data->have_temp |= 1 << i;
3825 data->have_temp_fixed |= 1 << i;
3826 data->reg_temp[0][i] = reg_temp_alternate[i];
3827 if (i < num_reg_temp) {
3828 data->reg_temp[1][i] = reg_temp_over[i];
3829 data->reg_temp[2][i] = reg_temp_hyst[i];
3830 }
3831 data->temp_src[i] = i + 1;
3832 continue;
3833 }
3834
3835 if (s >= NUM_TEMP) /* Abort if no more space */
3836 break;
3837
3838 data->have_temp |= 1 << s;
3839 data->reg_temp[0][s] = reg_temp_alternate[i];
3840 data->temp_src[s] = i + 1;
3841 s++;
3842 }
3843 #endif /* USE_ALTERNATE */
3844
3845 /* Initialize the chip */
3846 nct6775_init_device(data);
3847
3848 err = superio_enter(sio_data->sioreg);
3849 if (err)
3850 return err;
3851
3852 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3853 switch (data->kind) {
3854 case nct6775:
3855 data->have_vid = (cr2a & 0x40);
3856 break;
3857 case nct6776:
3858 data->have_vid = (cr2a & 0x60) == 0x40;
3859 break;
3860 case nct6106:
3861 case nct6779:
3862 case nct6791:
3863 break;
3864 }
3865
3866 /*
3867 * Read VID value
3868 * We can get the VID input values directly at logical device D 0xe3.
3869 */
3870 if (data->have_vid) {
3871 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3872 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3873 data->vrm = vid_which_vrm();
3874 }
3875
3876 if (fan_debounce) {
3877 u8 tmp;
3878
3879 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3880 tmp = superio_inb(sio_data->sioreg,
3881 NCT6775_REG_CR_FAN_DEBOUNCE);
3882 switch (data->kind) {
3883 case nct6106:
3884 tmp |= 0xe0;
3885 break;
3886 case nct6775:
3887 tmp |= 0x1e;
3888 break;
3889 case nct6776:
3890 case nct6779:
3891 tmp |= 0x3e;
3892 break;
3893 case nct6791:
3894 tmp |= 0x7e;
3895 break;
3896 }
3897 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3898 tmp);
3899 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3900 data->name);
3901 }
3902
3903 nct6775_check_fan_inputs(data);
3904
3905 superio_exit(sio_data->sioreg);
3906
3907 /* Read fan clock dividers immediately */
3908 nct6775_init_fan_common(dev, data);
3909
3910 /* Register sysfs hooks */
3911 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3912 data->pwm_num);
3913 if (IS_ERR(group))
3914 return PTR_ERR(group);
3915
3916 data->groups[data->num_attr_groups++] = group;
3917
3918 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3919 fls(data->have_in));
3920 if (IS_ERR(group))
3921 return PTR_ERR(group);
3922
3923 data->groups[data->num_attr_groups++] = group;
3924
3925 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3926 fls(data->has_fan));
3927 if (IS_ERR(group))
3928 return PTR_ERR(group);
3929
3930 data->groups[data->num_attr_groups++] = group;
3931
3932 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3933 fls(data->have_temp));
3934 if (IS_ERR(group))
3935 return PTR_ERR(group);
3936
3937 data->groups[data->num_attr_groups++] = group;
3938 data->groups[data->num_attr_groups++] = &nct6775_group_other;
3939
3940 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
3941 data, data->groups);
3942 return PTR_ERR_OR_ZERO(hwmon_dev);
3943 }
3944
3945 static void nct6791_enable_io_mapping(int sioaddr)
3946 {
3947 int val;
3948
3949 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
3950 if (val & 0x10) {
3951 pr_info("Enabling hardware monitor logical device mappings.\n");
3952 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
3953 val & ~0x10);
3954 }
3955 }
3956
3957 #ifdef CONFIG_PM
3958 static int nct6775_suspend(struct device *dev)
3959 {
3960 struct nct6775_data *data = nct6775_update_device(dev);
3961
3962 mutex_lock(&data->update_lock);
3963 data->vbat = nct6775_read_value(data, data->REG_VBAT);
3964 if (data->kind == nct6775) {
3965 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3966 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3967 }
3968 mutex_unlock(&data->update_lock);
3969
3970 return 0;
3971 }
3972
3973 static int nct6775_resume(struct device *dev)
3974 {
3975 struct nct6775_data *data = dev_get_drvdata(dev);
3976 int i, j, err = 0;
3977
3978 mutex_lock(&data->update_lock);
3979 data->bank = 0xff; /* Force initial bank selection */
3980
3981 if (data->kind == nct6791) {
3982 err = superio_enter(data->sioreg);
3983 if (err)
3984 goto abort;
3985
3986 nct6791_enable_io_mapping(data->sioreg);
3987 superio_exit(data->sioreg);
3988 }
3989
3990 /* Restore limits */
3991 for (i = 0; i < data->in_num; i++) {
3992 if (!(data->have_in & (1 << i)))
3993 continue;
3994
3995 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3996 data->in[i][1]);
3997 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3998 data->in[i][2]);
3999 }
4000
4001 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4002 if (!(data->has_fan_min & (1 << i)))
4003 continue;
4004
4005 nct6775_write_value(data, data->REG_FAN_MIN[i],
4006 data->fan_min[i]);
4007 }
4008
4009 for (i = 0; i < NUM_TEMP; i++) {
4010 if (!(data->have_temp & (1 << i)))
4011 continue;
4012
4013 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4014 if (data->reg_temp[j][i])
4015 nct6775_write_temp(data, data->reg_temp[j][i],
4016 data->temp[j][i]);
4017 }
4018
4019 /* Restore other settings */
4020 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4021 if (data->kind == nct6775) {
4022 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4023 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4024 }
4025
4026 abort:
4027 /* Force re-reading all values */
4028 data->valid = false;
4029 mutex_unlock(&data->update_lock);
4030
4031 return err;
4032 }
4033
4034 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4035 .suspend = nct6775_suspend,
4036 .resume = nct6775_resume,
4037 .freeze = nct6775_suspend,
4038 .restore = nct6775_resume,
4039 };
4040
4041 #define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
4042 #else
4043 #define NCT6775_DEV_PM_OPS NULL
4044 #endif /* CONFIG_PM */
4045
4046 static struct platform_driver nct6775_driver = {
4047 .driver = {
4048 .owner = THIS_MODULE,
4049 .name = DRVNAME,
4050 .pm = NCT6775_DEV_PM_OPS,
4051 },
4052 .probe = nct6775_probe,
4053 };
4054
4055 static const char * const nct6775_sio_names[] __initconst = {
4056 "NCT6106D",
4057 "NCT6775F",
4058 "NCT6776D/F",
4059 "NCT6779D",
4060 "NCT6791D",
4061 };
4062
4063 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4064 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4065 {
4066 u16 val;
4067 int err;
4068 int addr;
4069
4070 err = superio_enter(sioaddr);
4071 if (err)
4072 return err;
4073
4074 if (force_id)
4075 val = force_id;
4076 else
4077 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4078 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4079 switch (val & SIO_ID_MASK) {
4080 case SIO_NCT6106_ID:
4081 sio_data->kind = nct6106;
4082 break;
4083 case SIO_NCT6775_ID:
4084 sio_data->kind = nct6775;
4085 break;
4086 case SIO_NCT6776_ID:
4087 sio_data->kind = nct6776;
4088 break;
4089 case SIO_NCT6779_ID:
4090 sio_data->kind = nct6779;
4091 break;
4092 case SIO_NCT6791_ID:
4093 sio_data->kind = nct6791;
4094 break;
4095 default:
4096 if (val != 0xffff)
4097 pr_debug("unsupported chip ID: 0x%04x\n", val);
4098 superio_exit(sioaddr);
4099 return -ENODEV;
4100 }
4101
4102 /* We have a known chip, find the HWM I/O address */
4103 superio_select(sioaddr, NCT6775_LD_HWM);
4104 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4105 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4106 addr = val & IOREGION_ALIGNMENT;
4107 if (addr == 0) {
4108 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4109 superio_exit(sioaddr);
4110 return -ENODEV;
4111 }
4112
4113 /* Activate logical device if needed */
4114 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4115 if (!(val & 0x01)) {
4116 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4117 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4118 }
4119
4120 if (sio_data->kind == nct6791)
4121 nct6791_enable_io_mapping(sioaddr);
4122
4123 superio_exit(sioaddr);
4124 pr_info("Found %s or compatible chip at %#x:%#x\n",
4125 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4126 sio_data->sioreg = sioaddr;
4127
4128 return addr;
4129 }
4130
4131 /*
4132 * when Super-I/O functions move to a separate file, the Super-I/O
4133 * bus will manage the lifetime of the device and this module will only keep
4134 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4135 * must keep track of the device
4136 */
4137 static struct platform_device *pdev[2];
4138
4139 static int __init sensors_nct6775_init(void)
4140 {
4141 int i, err;
4142 bool found = false;
4143 int address;
4144 struct resource res;
4145 struct nct6775_sio_data sio_data;
4146 int sioaddr[2] = { 0x2e, 0x4e };
4147
4148 err = platform_driver_register(&nct6775_driver);
4149 if (err)
4150 return err;
4151
4152 /*
4153 * initialize sio_data->kind and sio_data->sioreg.
4154 *
4155 * when Super-I/O functions move to a separate file, the Super-I/O
4156 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4157 * nct6775 hardware monitor, and call probe()
4158 */
4159 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4160 address = nct6775_find(sioaddr[i], &sio_data);
4161 if (address <= 0)
4162 continue;
4163
4164 found = true;
4165
4166 pdev[i] = platform_device_alloc(DRVNAME, address);
4167 if (!pdev[i]) {
4168 err = -ENOMEM;
4169 goto exit_device_unregister;
4170 }
4171
4172 err = platform_device_add_data(pdev[i], &sio_data,
4173 sizeof(struct nct6775_sio_data));
4174 if (err)
4175 goto exit_device_put;
4176
4177 memset(&res, 0, sizeof(res));
4178 res.name = DRVNAME;
4179 res.start = address + IOREGION_OFFSET;
4180 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4181 res.flags = IORESOURCE_IO;
4182
4183 err = acpi_check_resource_conflict(&res);
4184 if (err) {
4185 platform_device_put(pdev[i]);
4186 pdev[i] = NULL;
4187 continue;
4188 }
4189
4190 err = platform_device_add_resources(pdev[i], &res, 1);
4191 if (err)
4192 goto exit_device_put;
4193
4194 /* platform_device_add calls probe() */
4195 err = platform_device_add(pdev[i]);
4196 if (err)
4197 goto exit_device_put;
4198 }
4199 if (!found) {
4200 err = -ENODEV;
4201 goto exit_unregister;
4202 }
4203
4204 return 0;
4205
4206 exit_device_put:
4207 platform_device_put(pdev[i]);
4208 exit_device_unregister:
4209 while (--i >= 0) {
4210 if (pdev[i])
4211 platform_device_unregister(pdev[i]);
4212 }
4213 exit_unregister:
4214 platform_driver_unregister(&nct6775_driver);
4215 return err;
4216 }
4217
4218 static void __exit sensors_nct6775_exit(void)
4219 {
4220 int i;
4221
4222 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4223 if (pdev[i])
4224 platform_device_unregister(pdev[i]);
4225 }
4226 platform_driver_unregister(&nct6775_driver);
4227 }
4228
4229 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4230 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4231 MODULE_LICENSE("GPL");
4232
4233 module_init(sensors_nct6775_init);
4234 module_exit(sensors_nct6775_exit);
Linux with added FPC-III support