2 * Atheros AR71XX/AR724X specific PCI setup code
4 * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
5 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
8 * Parts of this file are based on Atheros' 2.6.15 BSP
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/pci.h>
17 #include <linux/resource.h>
18 #include <linux/platform_device.h>
19 #include <asm/mach-ath79/ar71xx_regs.h>
20 #include <asm/mach-ath79/ath79.h>
21 #include <asm/mach-ath79/irq.h>
24 static int (*ath79_pci_plat_dev_init
)(struct pci_dev
*dev
);
25 static const struct ath79_pci_irq
*ath79_pci_irq_map
;
26 static unsigned ath79_pci_nr_irqs
;
28 static const struct ath79_pci_irq ar71xx_pci_irq_map
[] = {
32 .irq
= ATH79_PCI_IRQ(0),
36 .irq
= ATH79_PCI_IRQ(1),
40 .irq
= ATH79_PCI_IRQ(2),
44 static const struct ath79_pci_irq ar724x_pci_irq_map
[] = {
48 .irq
= ATH79_PCI_IRQ(0),
52 static const struct ath79_pci_irq qca955x_pci_irq_map
[] = {
57 .irq
= ATH79_PCI_IRQ(0),
63 .irq
= ATH79_PCI_IRQ(1),
67 int pcibios_map_irq(const struct pci_dev
*dev
, uint8_t slot
, uint8_t pin
)
72 if (ath79_pci_nr_irqs
== 0 ||
73 ath79_pci_irq_map
== NULL
) {
74 if (soc_is_ar71xx()) {
75 ath79_pci_irq_map
= ar71xx_pci_irq_map
;
76 ath79_pci_nr_irqs
= ARRAY_SIZE(ar71xx_pci_irq_map
);
77 } else if (soc_is_ar724x() ||
80 ath79_pci_irq_map
= ar724x_pci_irq_map
;
81 ath79_pci_nr_irqs
= ARRAY_SIZE(ar724x_pci_irq_map
);
82 } else if (soc_is_qca955x()) {
83 ath79_pci_irq_map
= qca955x_pci_irq_map
;
84 ath79_pci_nr_irqs
= ARRAY_SIZE(qca955x_pci_irq_map
);
86 pr_crit("pci %s: invalid irq map\n",
87 pci_name((struct pci_dev
*) dev
));
92 for (i
= 0; i
< ath79_pci_nr_irqs
; i
++) {
93 const struct ath79_pci_irq
*entry
;
95 entry
= &ath79_pci_irq_map
[i
];
96 if (entry
->bus
== dev
->bus
->number
&&
97 entry
->slot
== slot
&&
105 pr_crit("pci %s: no irq found for pin %u\n",
106 pci_name((struct pci_dev
*) dev
), pin
);
108 pr_info("pci %s: using irq %d for pin %u\n",
109 pci_name((struct pci_dev
*) dev
), irq
, pin
);
114 int pcibios_plat_dev_init(struct pci_dev
*dev
)
116 if (ath79_pci_plat_dev_init
)
117 return ath79_pci_plat_dev_init(dev
);
122 void __init
ath79_pci_set_irq_map(unsigned nr_irqs
,
123 const struct ath79_pci_irq
*map
)
125 ath79_pci_nr_irqs
= nr_irqs
;
126 ath79_pci_irq_map
= map
;
129 void __init
ath79_pci_set_plat_dev_init(int (*func
)(struct pci_dev
*dev
))
131 ath79_pci_plat_dev_init
= func
;
134 static struct platform_device
*
135 ath79_register_pci_ar71xx(void)
137 struct platform_device
*pdev
;
138 struct resource res
[4];
140 memset(res
, 0, sizeof(res
));
142 res
[0].name
= "cfg_base";
143 res
[0].flags
= IORESOURCE_MEM
;
144 res
[0].start
= AR71XX_PCI_CFG_BASE
;
145 res
[0].end
= AR71XX_PCI_CFG_BASE
+ AR71XX_PCI_CFG_SIZE
- 1;
147 res
[1].flags
= IORESOURCE_IRQ
;
148 res
[1].start
= ATH79_CPU_IRQ(2);
149 res
[1].end
= ATH79_CPU_IRQ(2);
151 res
[2].name
= "io_base";
152 res
[2].flags
= IORESOURCE_IO
;
156 res
[3].name
= "mem_base";
157 res
[3].flags
= IORESOURCE_MEM
;
158 res
[3].start
= AR71XX_PCI_MEM_BASE
;
159 res
[3].end
= AR71XX_PCI_MEM_BASE
+ AR71XX_PCI_MEM_SIZE
- 1;
161 pdev
= platform_device_register_simple("ar71xx-pci", -1,
162 res
, ARRAY_SIZE(res
));
166 static struct platform_device
*
167 ath79_register_pci_ar724x(int id
,
168 unsigned long cfg_base
,
169 unsigned long ctrl_base
,
170 unsigned long crp_base
,
171 unsigned long mem_base
,
172 unsigned long mem_size
,
173 unsigned long io_base
,
176 struct platform_device
*pdev
;
177 struct resource res
[6];
179 memset(res
, 0, sizeof(res
));
181 res
[0].name
= "cfg_base";
182 res
[0].flags
= IORESOURCE_MEM
;
183 res
[0].start
= cfg_base
;
184 res
[0].end
= cfg_base
+ AR724X_PCI_CFG_SIZE
- 1;
186 res
[1].name
= "ctrl_base";
187 res
[1].flags
= IORESOURCE_MEM
;
188 res
[1].start
= ctrl_base
;
189 res
[1].end
= ctrl_base
+ AR724X_PCI_CTRL_SIZE
- 1;
191 res
[2].flags
= IORESOURCE_IRQ
;
195 res
[3].name
= "mem_base";
196 res
[3].flags
= IORESOURCE_MEM
;
197 res
[3].start
= mem_base
;
198 res
[3].end
= mem_base
+ mem_size
- 1;
200 res
[4].name
= "io_base";
201 res
[4].flags
= IORESOURCE_IO
;
202 res
[4].start
= io_base
;
203 res
[4].end
= io_base
;
205 res
[5].name
= "crp_base";
206 res
[5].flags
= IORESOURCE_MEM
;
207 res
[5].start
= crp_base
;
208 res
[5].end
= crp_base
+ AR724X_PCI_CRP_SIZE
- 1;
210 pdev
= platform_device_register_simple("ar724x-pci", id
,
211 res
, ARRAY_SIZE(res
));
215 int __init
ath79_register_pci(void)
217 struct platform_device
*pdev
= NULL
;
219 if (soc_is_ar71xx()) {
220 pdev
= ath79_register_pci_ar71xx();
221 } else if (soc_is_ar724x()) {
222 pdev
= ath79_register_pci_ar724x(-1,
224 AR724X_PCI_CTRL_BASE
,
230 } else if (soc_is_ar9342() ||
234 bootstrap
= ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP
);
235 if ((bootstrap
& AR934X_BOOTSTRAP_PCIE_RC
) == 0)
238 pdev
= ath79_register_pci_ar724x(-1,
240 AR724X_PCI_CTRL_BASE
,
246 } else if (soc_is_qca9558()) {
247 pdev
= ath79_register_pci_ar724x(0,
248 QCA955X_PCI_CFG_BASE0
,
249 QCA955X_PCI_CTRL_BASE0
,
250 QCA955X_PCI_CRP_BASE0
,
251 QCA955X_PCI_MEM_BASE0
,
252 QCA955X_PCI_MEM_SIZE
,
256 pdev
= ath79_register_pci_ar724x(1,
257 QCA955X_PCI_CFG_BASE1
,
258 QCA955X_PCI_CTRL_BASE1
,
259 QCA955X_PCI_CRP_BASE1
,
260 QCA955X_PCI_MEM_BASE1
,
261 QCA955X_PCI_MEM_SIZE
,
270 pr_err("unable to register PCI controller device\n");
272 return pdev
? 0 : -ENODEV
;